To improve characteristics in a semiconductor apparatus manufactured from a wafer shared in a plurality of manufacturing processes. A semiconductor apparatus includes an opening for a pad, a wiring layer, and a dummy pattern. In the semiconductor apparatus, the opening for a pad is formed on a front surface of a substrate. In addition, in the semiconductor apparatus, a predetermined electrode pad is provided in the opening for a pad. In the semiconductor apparatus, a front surface-side wiring layer is formed in the substrate. In the semiconductor apparatus, a dummy pattern is formed around a dummy non-forming region penetrating up to the front surface-side wiring layer from a rear surface relative to the front surface.

A light deflecting device and a distance measuring device in which spread of emission light is suppressed and an effective opening for light reception is enlarged are provided.

A light deflecting device including a plurality of waveguides that extends in a first direction in parallel to each other and is provided in a semiconductor layer, and is capable of emitting light to an external space of the semiconductor layer and receiving light from the external space, and an optical system that is provided on a substrate including the semiconductor layer and converts light deflected and emitted from the plurality of waveguides in the first direction into a light beam substantially parallel to a second direction orthogonal to the first direction.

For testing or production of a semiconductor-based detector in SPECT, an interposer, such as elastomeric device with conductors, is sandwiched between a carrier and the semiconductor detector. The conductors allow for temporary separate connections of detector electrodes to signal processing circuitry, providing for testing of the detector operating with the signal processing circuitry. The interposer provides separate electrical connections for testing but may also be used in a final, fully integrated detector for use in a SPECT system.

An image sensor includes: a first substrate including: a first side, a second side, a pixel array region, and an edge region; and a micro lens array on the second side, which includes micro lenses. Each of the micro lenses includes a first lens layer and a second lens layer on the first lens layer. A second mean curvature radius of the second lens layer is smaller than a first mean curvature radius of the first lens layer. A first eccentric degree of the second lens layer on an edge of the pixel array region is greater than a second eccentric degree of the second lens layer at a center of the pixel array region.

A method of forming a semiconductor device includes: forming a patterned hard mask layer on a semiconductor substrate; performing a first etching process to form a recess in an exposed portion of the semiconductor substrate, using a first etchant that includes a first halogen species; performing a second etching process using a second etchant that includes a second halogen species, such that the second halogen species forms a barrier layer in the semiconductor substrate, surrounding the recess; and growing a detection region in the recess using an epitaxial growth process. The barrier layer is configured to reduce diffusion of the first halogen species into the detection region.

A pulse-width modulation (PWM) image sensor is described herein. The PWM image sensor may have a stacked configuration. A top wafer of the PWM image sensor may have a charge-to-time converter and a logic wafer, stacked with the top wafer, may include a time-to-digital converter. The PWM image sensor may utilize variable transfer functions to avoid highlight compression and may utilize non-linear time quantization. A threshold voltage, as input to a charge-to-time converter, may additionally be controlled to affect light detection, dynamic range, and other features associated with the PWM image sensor.

Improved is performance of a solid-state image sensor that detects presence or absence of a photon. The solid-state image sensor includes a light-receiving substrate and a logic substrate. In the solid-state image sensor, there is disposed, on the light-receiving substrate, a plurality of avalanche photodiodes, each of the avalanche photodiodes generating a current corresponding to incident of a photon. Furthermore, in the solid-state image sensor, there is disposed, on the logic substrate, a counter that counts the number of photons on the basis of a current of a selected avalanche photodiode among the plurality of avalanche photodiodes.

Provided is an imaging unit more efficiently manufacturable with high dimensional precision. The imaging unit includes: a sensor board including an imaging device, in which the imaging device has a plurality of pixels and allows generation of a pixel signal by receiving outside light in each of the plurality of pixels; a bonding layer including an inorganic insulating material; and a circuit board including a circuit chip and an organic insulating layer, in which a circuit chip has a signal processing circuit that performs signal processing for the pixel signal and is bonded to the sensor board through the bonding layer, and the organic insulating layer covers a vicinity of the circuit chip.

A photoelectric conversion apparatus includes: a first substrate including an avalanche photodiode; and a second substrate, in which the first substrate and the second substrate are stacked on each other, and further includes: a temperature detection unit arranged in at least one of the first substrate and the second substrate and having an output characteristic depending on a temperature; and a temperature value generating circuit arranged outside the first substrate and configured to convert output from the temperature detection unit into a temperature value signal that is a signal indicating temperature information.

An image sensor substrate includes an insulating layer and a conductive pattern part disposed on the insulating layer. The insulating layer includes: a first insulating part and a second insulating part disposed surrounding a periphery of the first insulating part and spaced apart from the first insulating part with a first open region interposed therebetween. The conductive pattern part includes a first conductive pattern part disposed on the first insulating part, a second conductive pattern part disposed on the second insulating part; and an extension pattern part disposed on the first open region and interconnecting the first and second conductive pattern parts. The extension pattern part includes a bent portion disposed on a corner region of the first open region.