The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a substrate and a transfer gate disposed from a front-side surface of the substrate. The CMOS image sensor further comprises a photo detecting column disposed at one side of the transfer gate within the substrate. The photo detecting column comprises a doped sensing layer comprising one or more recessed portions along a circumference of the doped sensing layer in parallel to the front-side surface of the substrate. By forming the photo detecting column with recessed portions, a junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.

An image sensor comprises at least two vertically stacked photo-sensitive devices wherein each respective photo-sensitive device comprises a stack of a top electrode, a first charge transport layer and an active layer. Each respective stack generates electrical charges in response to a corresponding predefined range of wavelengths of light incident on the image sensor. Each photo-sensitive device further comprises a second charge transport layer having a first portion, vertically aligned underneath the active layer, and a second portion, transfer region, protruding laterally to extend beyond the active layer. A dielectric layer separates the first portion from a bottom electrode providing a voltage for depleting the first portion, and the transfer region from a transfer gate providing a voltage for transferring the generated electrical charge to a floating electrical connection, shared by all stacked photo-sensitive devices. The floating electrical connection couples to a read-out-circuitry.

An imaging circuit includes a first vertical trench gate and a neighboring second vertical trench gate. The imaging circuit includes a gate control circuit. The gate control circuit operates in a first operating mode to generate a first space charge region accelerating photogenerated charge carriers of a first charge-carrier type to a first collection contact in and in a second operating mode to generate a second space charge region accelerating photogenerated charge carriers of the first charge-carrier type to the first collection contact. The imaging circuit further includes an image processing circuit which determines distance information of an object based on photogenerated charge carriers of the first charge carrier type collected at the first collection contact in the first operating mode and color information of the object based on photogenerated charge carriers of the first charge carrier type collected at the first collection contact in the second operating mode.

A complementary metal-oxide-semiconductor (CMOS) image sensor with silicon and silicon germanium is provided. A silicon germanium layer abuts a silicon layer. A photodetector is arranged in the silicon germanium layer. A transistor is arranged on the silicon layer with a source/drain region that is buried in a surface of the silicon layer and that is electrically coupled to the photodetector. A method for manufacturing the CMOS image sensor is also provided.

The present disclosure relates to a solid-state imaging device, an electronic apparatus, and a manufacturing method that are designed to further increase conversion efficiency.

A solid-state imaging device includes a pixel in which element separation is realized by a first trench element separation region having a trench structure in a region between an FD unit and an amplifying transistor among element separation elements separating the elements constituting the pixel from one another, and a second trench element separation region having a trench structure in a region other than the region between the FD unit and the amplifying transistor among the element separation regions separating the elements constituting the pixel from one another, and the first trench element separation region is deeper than the second trench element separation region. The present technology can be applied to CMOS image sensors, for example.

Provided are an image sensor and an imaging apparatus. The image sensor of a multi-layered sensor structure, the image sensor includes a plurality of sensing pixels, each of the plurality of sensing pixels including a micro lens configured to collect light, a first photoelectric converter configured to convert light of a first wavelength band into an electric signal, and a second photoelectric converter formed on a substrate configured to convert incident light into the electric signal, wherein a central axis of the second photoelectric converter is spaced apart from an optical axis of the micro lens.

Disclosed is an image sensor in which at least one pixel group including a plurality of pixels is arranged in a matrix form. The at least one pixel group includes at least one photoelectric conversion device, at least one floating diffusion area to which a charge of the photoelectric conversion device is transferred, at least one reset transistor that is connected to the floating diffusion area and that resets the floating diffusion area to a pixel voltage, a source follower transistor that is connected to the floating diffusion area and that outputs a pixel signal in response to a charge of the floating diffusion area, and a selection transistor that is connected to the source follower transistor and that outputs the pixel signal to an output node. A gate of the source follower transistor and the floating diffusion area are connected by a first connection line that integrally extends from the gate of the source follower transistor to the floating diffusion area as a single, unseparated body, and the first connection line makes contact with the gate of the source follower transistor and the floating diffusion area.

The present technique relates to a solid-state imaging device and an imaging apparatus that enable provision of a solid-state imaging device having superior color separation and high sensitivity.

The solid-state imaging device includes a semiconductor layer 11 in which a surface side becomes a circuit formation surface, photoelectric conversion units PD1 and PD2 of two layers or more that are stacked and formed in the semiconductor layer 11, and a longitudinal transistor Tr1 in which a gate electrode 21 is formed to be embedded in the semiconductor layer 11 from a surface 15 of the semiconductor layer 11. The photoelectric conversion unit PD1 of one layer in the photoelectric conversion units of the two layers or more is formed over a portion 21A of the gate electrode 21 of the longitudinal transistor Tr1 embedded in the semiconductor substrate 11 and is connected to a channel formed by the longitudinal transistor Tr1.

The present technology relates to a semiconductor device and electronic equipment in which a semiconductor device that suppresses the occurrence of noise by a leakage of light can be provided.

A semiconductor device is configured which includes a light-receiving element 34, an active element for signal processing, and a light shielding structure 40 which is between the light-receiving element 34 and the active element to cover the active element and is formed of wirings 45 and 46. The semiconductor device further includes a first substrate on which the light-receiving element is formed, a second substrate on which the active element is formed, and a wiring layer which has a light shielding structure by the wirings which is formed on the second substrate, and in which the second substrate can be bonded to the first substrate through the wiring layer.

A method for manufacturing a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor with a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A sacrificial dielectric layer is formed over a semiconductor region. A first etch is performed into the sacrificial dielectric layer to form an opening exposing a photodetector in the semiconductor region. A semiconductor column is formed in the opening. A floating diffusion region (FDR) is formed over the semiconductor column and the sacrificial dielectric layer. A second etch is performed into the sacrificial dielectric layer to remove the sacrificial dielectric layer, and to form a lateral recess between the FDR and the photodetector. A gate is formed filling the lateral recess and laterally spaced from the semiconductor column by a gate dielectric layer. The BSI CMOS image sensor resulting from the method is also provided.