A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.

Disclosed is a solar cell including a semiconductor substrate, and a dopant layer disposed over one surface of the semiconductor substrate and having a crystalline structure different from that of the semiconductor substrate, the dopant layer including a dopant. The dopant layer includes a plurality of semiconductor layers stacked one above another in a thickness direction thereof, and an interface layer interposed therebetween. The interface layer is an oxide layer having a higher concentration of oxygen than that in each of the plurality of semiconductor layers.

Provided is a solar cell, including: an N-type semiconductor substrate having a front surface and a rear surface opposite to the front surface; a boron diffusion layer arranged on the front surface of the N-type semiconductor substrate, a first passivation layer is provided on a surface of the boron diffusion layer, and a first electrode is provided passing through the first passivation layer to form an electrical connection with the N-type semiconductor substrate; and a phosphorus-doped polysilicon layer arranged on the rear surface of the N-type semiconductor substrate. A silicon oxide layer containing nitrogen and phosphorus is provided between the rear surface of the N-type semiconductor substrate and the phosphorus-doped polysilicon layer, a second passivation layer is provided on a surface of the phosphorus-doped polysilicon layer, and a second electrode is provided passing through the second passivation layer to form an electrical connection with the phosphorus-doped polysilicon layer.

Solar cells having emitter regions composed of wide bandgap semiconductor material are described. In an example, a method includes forming, in a process tool having a controlled atmosphere, a thin dielectric layer on a surface of a semiconductor substrate of the solar cell. The semiconductor substrate has a bandgap. Without removing the semiconductor substrate from the controlled atmosphere of the process tool, a semiconductor layer is formed on the thin dielectric layer. The semiconductor layer has a bandgap at least approximately 0.2 electron Volts (eV) above the bandgap of the semiconductor substrate.

A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.

A photodetection film includes at least one lower photodiode and upper photodiode layered members. The at least one lower photodiode layered member includes lower first-type, intrinsic and second-type semiconductor layers. The at least one upper photodiode layered member is disposed on the at least one lower photodiode layered member and includes upper first-type, intrinsic and second-type semiconductor layers. The upper intrinsic semiconductor layer has an amorphous silicon structure. The lower intrinsic semiconductor layer has a structure selected from one of a microcrystalline silicon structure, a microcrystalline silicon-germanium structure, and a non-crystalline silicon-germanium structure.

A back surface electrode type solar cell in which a p-type region having a p-conductive type, and an n-type region which has an n-conductive type and in which maximum concentration of additive impurities for providing the n-conductive type in a substrate width direction is equal to or higher than 5×10.sup.18 atoms/cm.sup.3 are disposed on a first main surface of a crystal silicon substrate, a first passivation film is disposed so as to cover the p-type region and the n-type region, and a second passivation film is disposed on a second main surface which is a surface opposite to the first main surface so as to cover the second main surface, the first passivation film and the second passivation film being formed with a compound containing oxide aluminum.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

Provided is a solar cell and a photovoltaic module. The solar cell includes a silicon substrate, and the silicon substrate includes a front surface and a back surface arranged opposite to each other. P-type conductive regions and N-type conductive regions are alternately arranged on the back surface of the silicon substrate. Front surface field regions are located on the front surface of the silicon substrate and spaced from each other. The front surface field regions each corresponds to one of the P-type conductive regions or one of the N-type conductive regions. At least one front passivation layer is located on the front surface of the silicon substrate. At least one back passivation layer is located on surfaces of the P-type conductive regions and N-type conductive regions.

A method of fabricating solar cell, solar laminate and/or solar module string is provided. The method may include: locating a metal foil over a plurality of semiconductor substrates; exposing the metal foil to laser beam over selected portions of the plurality of semiconductor substrates, wherein exposing the metal foil to the laser beam forms a plurality conductive contact structures having of locally deposited metal portion electrically connecting the metal foil to the semiconductor substrates at the selected portions; and selectively removing portions of the metal foil, wherein remaining portions of the metal foil extend between at least two of the plurality of semiconductor substrates.