Patent classifications
Y02E10/548
Solar cell emitter region fabrication with differentiated P-type and N-type region architectures
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.
Solar cell and method for manufacturing the same
A solar cell can include a silicon semiconductor substrate; an oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer; a diffusion region at a second surface of the silicon semiconductor substrate; a dielectric film on the polysilicon layer; a first electrode connected to the polysilicon layer through the dielectric film; a passivation film on the diffusion region; and a second electrode connected to the diffusion region through the passivation film.
PEROVSKITE/SILICON TANDEM PHOTOVOLTAIC DEVICE
A tandem photovoltaic device includes a silicon photovoltaic cell having a silicon layer, a perovskite photovoltaic cell having a perovskite layer, and an intermediate layer between a rear side of the perovskite photovoltaic cell and a front (sunward) side of the silicon photovoltaic cell. The front side of the silicon layer has a textured surface, with a peak-to-valley height of structures in the textured surface of less than 1 μm or less than 2 μm. The textured surface is planarized by the intermediate layer or a layer of the perovskite photovoltaic cell. Forming the tandem photovoltaic device includes texturing a silicon containing layer of a silicon photovoltaic cell and operatively coupling a perovskite photovoltaic cell comprising a perovskite layer to the silicon photovoltaic cell, thereby forming a tandem photovoltaic device and planarizing the textured surface of the silicon containing layer of the silicon photovoltaic cell.
SOLAR CELL AND METHOD OF MANUFACTURING THE SAME
Disclosed is a solar cell including a semiconductor substrate, and a dopant layer disposed over one surface of the semiconductor substrate and having a crystalline structure different from that of the semiconductor substrate, the dopant layer including a dopant. The dopant layer includes a plurality of semiconductor layers stacked one above another in a thickness direction thereof, and an interface layer interposed therebetween. The interface layer is an oxide layer having a higher concentration of oxygen than that in each of the plurality of semiconductor layers.
Voltage matched multijunction solar cell
A voltage matched multijunction solar cell having first and second solar cell stacks that are electrically connected parallel to each other. The first solar cell stack is optimized for absorption of incoming solar light in a first wavelength range and the second solar cell stack is optimized for absorption of incoming solar light in a second wavelength range, wherein the first and the second wavelength range do not or at most only partially overlap each other.
SOLAR CELL AND METHOD FOR MANUFACTURING SOLAR CELL
A solar cell includes a semiconductor substrate; a plurality of band-like first semiconductor layers and a plurality of second semiconductor layers provided alternatively on a back surface side of the semiconductor substrate; a band-like first electrode stacked on the first semiconductor layer and a band-like second electrode stacked on the second semiconductor layer; and a band-shaped or linear insulating body stacked on a back surface of the first semiconductor layer in a region distanced from the first electrode and an edge on a side of the second semiconductor layer.
Optical device including three-coupled quantum well structure having asymmetric multi-energy levels
Provided is an optical device including an active layer, which includes two outer barriers and a coupled quantum well between the two outer barriers. The coupled quantum well includes a first quantum well layer, a second quantum well layer, a third quantum well layer, a first coupling barrier between the first quantum well layer and the second quantum well layer, and a second coupling barrier between the second quantum well layer and the third quantum well layer. The second quantum well layer is between the first quantum well layer and the third quantum well layer. An energy band gap of the second quantum well layer is less than an energy band gap of the first quantum well layer, and an energy band gap of the third quantum well layer is equal to or less than the energy band gap of the second quantum well layer.
Photovoltaic array for a power-by-light system
A hybrid-integrated series/parallel-connected photovoltaic diode array employs 10s-to-100s of single-wavelength III-V compound semiconductor photodiodes in an array bonded onto a transparent optical plate through which the array is illuminated by monochromatic light. The power-by-light system receiver enables high-voltage, up to 1000s of volts, optical transmission of power to remote electrical systems in harsh environments.
Pin/pin stacked photodetection film and photodetection display apparatus
A photodetection film includes at least one lower photodiode and upper photodiode layered members. The at least one lower photodiode layered member includes lower first-type, intrinsic and second-type semiconductor layers. The at least one upper photodiode layered member is disposed on the at least one lower photodiode layered member and includes upper first-type, intrinsic and second-type semiconductor layers. The upper intrinsic semiconductor layer has an amorphous silicon structure. The lower intrinsic semiconductor layer has a structure selected from one of a microcrystalline silicon structure, a microcrystalline silicon-germanium structure, and a non-crystalline silicon-germanium structure.
Assembly for optical to electrical power conversion transfer
An assembly for optical to electrical power conversion including a photodiode assembly having a substrate layer and an internal side, an antireflective layer, a heterojunction buffer layer adjacent the internal side; an active area positioned adjacent the heterojunction buffer layer, a plurality of n+ electrode regions and p+ electrode regions positioned adjacent the active area, and back-contacts configured to align with the n+ and p+ electrode regions. The active area converts photons from incoming light into liberated electron hole pairs. The heterojunction buffer layer prevents electrons and holes of the liberated electron hole pairs from moving toward the substrate layer. The plurality of electrode regions are configured in an alternating pattern with gaps between each n+ and p+ electrode region. The electrode regions receive and generate electrical current from migration of the electrons and the holes, provide electrical pathways for the electrical current, and provide thermal pathways to dissipate heat.