Method for operating power semiconductors

Abstract

A method for operating power semiconductors arranged in converters, includes measuring with a temperature sensor a temperature of at least one of the power semiconductors, performing a comparison of the temperature of the at least one power semiconductor with a reference temperature and providing a result of the comparison; activating a pre-heating phase for preheating the power semiconductors as a function of the result; during the pre-heating phase, defining a pre-heating current; and impressing the pre-heating current into an electrical load.

Claims

1. A method for operating power semiconductors arranged in converters, comprising: measuring with a temperature sensor a temperature of at least one of the power semiconductors; performing a comparison of the temperature of the at least one power semiconductor with a reference temperature and providing a result of the comparison; activating a pre-heating phase for preheating the power semiconductors as a function of the result, said pre-heating phase being activated resulting in an increase in I.sub.HEAT when the result indicates that the temperature of the at least one power semiconductor is lower than the reference temperature and a collector current I.sub.C is dropped to a value approximating zero, and wherein the pre-heating phase is not activated when the result indicates that the temperature of the at least one power semiconductor is greater than or equal to the reference temperature, wherein a duration of the pre-heating phase lies within a range of seconds; during the pre-heating phase, defining a pre-heating current; and impressing the pre-heating current into an electrical load.

2. The method of claim 1, wherein the power semiconductors are arranged on an intermediate DC circuit of the converters.

3. The method of claim 1, wherein the electrical load is an electric machine connected to the power semiconductors.

4. The method as of claim 1, further comprising performing a further comparison of the temperature of the at least one power semiconductor with a further reference temperature and providing a further result of the further comparison.

5. The method of claim 1, wherein the duration of the pre-heating phase is within a range of up to one second.

6. The method of claim 1, wherein, during an activated state of the pre-heating phase, the pre-heating current is impressed into the electric machine, and wherein the pre-heating current generates no torque in the electric machine.

7. The method of claim 1, wherein the pre-heating current generates no torque on a shaft of the electric machine.

8. The method of claim 1, wherein the electric machine is operated with a torque, which acts on a mechanical shaft of the electric machine, and wherein during an activated state of the pre-heating phase the pre-heating current is impressed into the electric machine.

9. The method of claim 4, wherein the pre-heating phase, when activated in the activating step, remains active when the further result indicates that the temperature of the at least one power semiconductor is lower than the further reference temperature, and wherein the pre-heating phase when activated in the activating step is deactivated when the further result indicates that the temperature of the at least one power semiconductor is greater than or equal to the further reference temperature.

10. The method of claim 6, wherein the electric machine is constructed as an asynchronous machine and the pre-heating current is impressed into the asynchronous machine during the pre-heating phase by means of a magnetization current.

11. The method of claim 6, wherein the electric machine is a synchronous machine and the pre-heating current is impressed into the synchronous machine during the pre-heating phase by means of a field-forming current.

12. The method of claim 7, wherein the pre-heating current is provided as a function of a vector control.

13. The method of claim 8, wherein the pre-heating current is provided as a function of a vector control.

14. The method of claim 10, wherein the magnetization current is a current component of a vector control for asynchronous machines.

15. The method of claim 11, wherein the field-forming current is a current component of a vector control for synchronous machines.

16. A computing unit, comprising: a temperature input unit for receiving a measured temperature of at least one of a plurality of power semiconductors arranged in converters of an electric machine; and a signal output unit, said computing unit being configured to perform a comparison of the measured temperature with a reference temperature and to provide a result of the comparison, to activate a pre-heating phase for preheating the power semiconductors as a function of the result, said pre-heating phase being activated resulting in an increase in I.sub.HEAT when the result indicates that the temperature of the at least one power semiconductor is lower than the reference temperature and a collector current I.sub.C is dropped to a value approximating zero, and wherein the pre-heating phase is not activated when the result indicates that the temperature of the at least one power semiconductor is greater than or equal to the reference temperature, wherein a duration of the pre-heating phase lies within a range of seconds, to generate control signals which are convertible into gate activation signals for gates of the power semiconductors and which define a pre-heating current impressed into the electric machine during the pre-heating phase in response to execution of the gate activation signals, and to output the control signals via the signal output.

17. A computer program configured for operating the computing unit of claim 16.

18. An activation apparatus, comprising: a signal input configured for receiving the control signals generated by the computing unit of claim 16; and gate activation signal outputs, said activation apparatus being configured to generate the gate activation signals for the power semiconductor as a function of the control signals, and to output the gate activation signals to the gates of the power semiconductor via the gate activation signal outputs.

19. A computer program product, on which the computer program of claim 17 is stored.

20. A converter, comprising: power semiconductors arranged in the converter; a temperature sensor for measuring a temperature of the power semiconductors; a computing unit, said computing unit comprising a temperature input for receiving the temperature of at least one of the power semiconductors measured with the temperature sensor, and a signal output, said computing unit being configured to perform a comparison of the measured temperature with a reference temperature and to provide a result of the comparison, to activate a pre-heating phase for preheating the power semiconductors as a function of the result, said pre-heating phase being activated resulting in an increase in I.sub.HEAT when the result indicates that the temperature of the at least one power semiconductor is lower than the reference temperature and a collector current I.sub.C is dropped to a value approximating zero, and wherein the pre-heating phase is not activated when the result indicates that the temperature of the at least one power semiconductor is greater than or equal to the reference temperature, wherein a duration of the pre-heating phase lies within a range of seconds, to generate control signals which are convertible into gate activation signals for gates of the power semiconductors and which define a pre-heating current impressed into the electric machine during the pre-heating phase in response to execution of the gate activation signals, and to output the control signals via the signal output; a computer program product and a computer program stored on the computer program product, said computer program being configured for operating the computing unit, an activation apparatus, comprising a signal input configured for receiving the control signals of the computing unit, and gate activation signal outputs, said activation apparatus being configured to form the gate activation signals for the power semiconductor, and to output the gate activation signals to the gates of the power semiconductor via the gate activation signal outputs.

21. The converter of claim 20, further comprising an intermediate DC circuit.

22. An electric or hybrid vehicle, comprising the converter of claim 20, and an electric machine operable by the converter.

23. The electric or hybrid vehicle of claim 22, wherein the electric machine is constructed as an asynchronous machine or a synchronous machine.

Description

BRIEF DESCRIPTION OF THE DRAWING

(1) Other features and advantages of the present invention will be more readily apparent upon reading the following description of currently preferred exemplified embodiments of the invention with reference to the accompanying drawing, in which:

(2) FIG. 1 shows a diagram with a collector-emitter voltages and a collector current I.sub.C during a switch-off process AV of power semiconductors;

(3) FIG. 2 shows a schematic representation of an exemplary embodiment of the inventive method for operating power semiconductors;

(4) FIG. 3 shows a further schematic representation of an exemplary embodiment of the inventive method for operating power semiconductors;

(5) FIG. 4 shows a schematic diagram of a converter with power semiconductors on the intermediate DC circuit, having a computing unit and an activation apparatus and an electric machine, AM, SM powered by the converter; and

(6) FIG. 5 shows a schematic representation of an electric or hybrid vehicle with a converter 3 and an electric machine, AM, SM powered by the converter.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

(7) Throughout all the Figures, same or corresponding elements are generally indicated by same reference numerals. These depicted embodiments are to be understood as illustrative of the invention and not as limiting in any way. It should also be understood that the drawings are not necessarily to scale and that the embodiments are sometimes illustrated by graphic symbols, phantom lines, diagrammatic representations and fragmentary views. In certain instances, details which are not necessary for an understanding of the present invention or which render other details difficult to perceive may have been omitted.

(8) Turning now to the drawing, and in particular to FIG. 1, there is shown a diagram with a collector-emitter voltage V.sub.CE and a collector current I.sub.C, which describes, by way of example, a switch-off process AV of power semiconductors on an intermediate DC circuit by means of corresponding electrical parameters. A time t is plotted on an axis of the diagram, which displays a sequence and a duration of states of the power semiconductors, in other words a conducting state LZ and a blocking state SZ, together with the actual switch-off process of the power semiconductors.

(9) Current I and voltage V are plotted on a further axis of the diagram in FIG. 1, wherein a collector current I.sub.C and a collector-emitter voltage V.sub.CE are thus in particular identified, by means of which a typical switch-off process AV can be operated in power semiconductors. For better understanding the switch-off process AV, further electric parameters are shown in the diagram, such as a maximum blocking collector-emitter voltage V.sub.CES of the power semiconductor, which is specified for temperatures on the power semiconductor of for instance +25° C., a maximum blocking collector-emitter voltage V.sub.CES-40 of the power semiconductor at −40° C., a collector-emitter switch-off overvoltage ΔV.sub.CE on the power semiconductor and a DC voltage V.sub.DC on the intermediate DC circuit.

(10) The switch-off process AV, as can be inferred from the diagram in FIG. 1, starts from the state LZ which is conductive for the power semiconductor. The collector current I.sub.C flows in the conducting state LZ, depending on the required degree and in predetermined limits, through the power semiconductor, while the collector-emitter voltage V.sub.CE on the power semiconductor is virtually zero.

(11) The collector-emitter voltage V.sub.CE increases continuously at the start of the switch-off process AV. The collector current I.sub.C starts to drop in a time-staggered manner, until it assumes a value approaching zero. A small leakage current may if necessary continue to flow. The collector-emitter voltage V.sub.CE briefly exceeds a value which is characteristic of the DC voltage V.sub.DC on the intermediate DC circuit during a break-down of the collector current I.sub.C, which is represented by the collector-emitter switch-off overvoltage ΔV.sub.CE indicated in FIG. 1.

(12) Depending on the rate of current rise dl.sub.C/dt of the collector current I.sub.C, which is a derivative of the collector current I.sub.C after time t, a value of the collector-emitter switch-off overvoltage ΔV.sub.CE can also be determined, which is dependent on an inductance L (inductance of a commutation circuit) which is present on the direct voltage circuit. It must now generally be ensured that the collector-emitter voltage V.sub.CE, together with the collector-emitter switch-off overvoltage ΔV.sub.CE, does not exceed the maximum blocking collector-emitter voltage ΔV.sub.CES defined for the power semiconductor. FIG. 1 shows that the maximum blocking collector-emitter voltage V.sub.CES-40 occurring for instance at −40° C. is also has to be taken into consideration and should not be exceeded, since it is significantly reduced as opposed to the maximum blocking collector-emitter voltage V.sub.CES at +25° C. The switch-off process AV is concluded, if the collector current I.sub.C is virtually zero and the collector-emitter voltage V.sub.CE has reached the value which is characteristic of the DC voltage V.sub.DC, on the intermediate DC circuit and the power semiconductor is in the blocking state SZ.

(13) FIG. 2 shows a schematic representation of an exemplary embodiment of the inventive method for operating power semiconductors. In order to determine whether a pre-heating phase VP is required for pre-heating, i.e. for operating the power semiconductor, a temperature comparison V.sub.T is performed. The temperature comparison V.sub.T compares a temperature T on the power semiconductor, which was detected by means of a temperature sensor, with a reference temperature T.sub.ref., which was defined in an application-specific manner. A temperature comparison result RES.sub.T provided by the temperature comparison V.sub.T is evaluated. When the temperature T on the power semiconductor is lower than the reference temperature T.sub.ref., the pre-heating phase VP is activated and during the pre-heating phase VP, a pre-heating current I.sub.Heat is defined, which is impressed into an electrical load, in particular into an electric machine. If the evaluation of the temperature comparison result RES.sub.T indicates that the temperature T on the power semiconductor is equal to or greater than the reference temperature T.sub.ref., the pre-heating phase VP is not activated.

(14) A further schematic representation of an exemplary embodiment of the inventive method for operating power semiconductors is indicated in FIG. 3. Based on an already activated pre-heating phase VP, it is determined whether the pre-heating phase VP is still required to heat up the power semiconductors or has to be extended or reactivated. In the meantime a temperature T which is critical to the power semiconductor could also be reached during an activated pre-heating phase VP, which should result in deactivation of the pre-heating phase VP.

(15) A further temperature comparison V.sub.TX is therefore performed, in which the temperature T on the power semiconductor is compared with a further reference temperature T.sub.ref.sub.X.sub.., which was likewise defined in an application-specific manner. A temperature comparison result RES.sub.TX provided by the further temperature comparison V.sub.TX is evaluated. When the temperature T on the power semiconductor is lower than the further reference temperature T.sub.ref.sub.X.sub.., the pre-heating phase VP remains activated through its duration or the duration of the pre-heating phase VP can also be extended. Similar to the embodiment shown in FIG. 2, the pre-heating current I.sub.Heat is impressed into the electrical load, in particular into the electric machine, during the now ongoing or newly activated pre-heating phase VP. If the evaluation of the further temperature comparison result RES.sub.TX indicates that the temperature T on the power semiconductor is equal to or greater than the reference temperature T.sub.ref.sub.X.sub.., the pre-heating phase VP is deactivated.

(16) The concrete comparison conditions (>, <, =, >=, <=) for the temperature comparison V.sub.T or the further temperature comparison V.sub.TX of the inventive method may depend on the specific circumstances and can be selected by a person with skill in the art accordingly.

(17) Using the two exemplary embodiments of FIG. 2 and FIG. 3A, it is not necessary to a generally reduce the maximum blocking collector-emitter voltage V.sub.CE, when power semiconductors are also to be used at correspondingly low temperatures. After performing the pre-heating phase VP, a desired heating-up of the power semiconductor is ensured. During further operation of the power semiconductor, its power loss can be reduced, since in this case the maximum blocking collector-emitter voltage V.sub.CES-40 occurring at −40° C. no longer has to be taken into consideration.

(18) FIG. 4 shows a schematic diagram of a converter 3 with power semiconductors 1 on the intermediate DC circuit 2, having a computing unit 7 and an activation apparatus 10 and an electric machine 4, AM, SM powered by the converter 3.

(19) The converter 3 is operated on an intermediate DC circuit 2 with a DC voltage V.sub.DC, which has a positive DC voltage potential DC+ and a negative DC voltage potential DC−. Power semiconductors 1, in particular IGBTs, are arranged on the intermediate DC circuit 2 between the two DC voltage potentials DC+, DC− of the DC voltage V.sub.DC. These power semiconductors 1 in each case have a gate G, a collector C and an emitter E, (only shown on one of the power semiconductors 1 in FIG. 4). Depending on the application, power semiconductors 1 are often structurally combined in a module, which allows for a compact design. The modules can for instance be embodied as a six pulse bridge circuit (as shown in particular in FIG. 4) or also as individual half bridge circuits.

(20) The converter 3 is provided to drive an electric machine 4, AM, SM or to receive energy during the dynamic operation of the electric machine 4. The electric machine 4 is electrically connected to the power semiconductors 1 arranged on the intermediate DC circuit 2 by means of a three-phase connection.

(21) Moreover, a temperature sensor 5 for detecting a temperature T is arranged on one of the power semiconductors 1, wherein further temperature sensors 5 can be arranged on corresponding power semiconductors 1. The temperature sensor 5 is linked to a temperature input 8 of a computing unit 7, in order to provide the temperature T to the computing unit 7. The computing unit 7 is capable of performing at least one temperature comparison V.sub.T for implementing the inventive method, a further temperature comparison V.sub.TX, pre-heating phase VP and a vector control VR.

(22) When the pre-heating phase VP is activated, the computing unit 7 outputs the control signals S defined as a function of the vector control VR in order to generate gate activation signals AS.sub.Gate for gates G of the power semiconductor 1 on a signal output 9.

(23) The activation apparatus 10 receives the control signals S by means of a signal input 11, and determines the corresponding gate activation signals AS.sub.Gate. The gate activation signals AS.sub.Gate are transmitted to the gates G by means of gate activation signal outputs 12, in order to switch the gates G of the power semiconductors 1. The power semiconductors 1 now impress a pre-heating current I.sub.Heat into the electric machine 4 during an activated pre-heating phase VP.

(24) When an asynchronous machine AM is used as an electric machine 4, which is operated with or without torque on its shaft 6, the pre-heating current I.sub.Heat, during the activated pre-heating phase VP, is either part of a magnetization current I.sub.M of the asynchronous machine AM or corresponds entirely with the magnetization current I.sub.M of the asynchronous machine AM.

(25) When a synchronous machine SM is used as an electric machine 4, which is operated with or without torque on its shaft 6, the pre-heating current I.sub.Heat, during the activated pre-heating phase VP, is either part of a field-forming current I.sub.d of the synchronous machine SM or corresponds entirely with the field-forming current I.sub.d of the synchronous machine SM.

(26) FIG. 5 schematically shows an electric or hybrid vehicle 13, which has the converter 3. The converter 3 is provided to drive an electric machine 4. This electric machine can be an asynchronous machine AM or a synchronous machine SM. Moreover, the converter 3 can feed back electrical energy output by the electric machine 4, AM, SM for instance during braking into the electric or hybrid vehicle 13. The inventive method is particularly suited to use of this type in electric or hybrid vehicles 13.

(27) While the invention has been illustrated and described in connection with currently preferred embodiments shown and described in detail, it is not intended to be limited to the details shown since various modifications and structural changes may be made without departing in any way from the spirit of the present invention. The embodiments were chosen and described in order to best explain the principles of the invention and practical application to thereby enable a person skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated.