MICRO-ELECTRO-MECHANICAL SYSTEM SILICON ON INSULATOR PRESSURE SENSOR AND METHOD FOR PREPARING SAME
20220033247 · 2022-02-03
Inventors
Cpc classification
B81C1/00246
PERFORMING OPERATIONS; TRANSPORTING
H01L27/1203
ELECTRICITY
B81B3/0018
PERFORMING OPERATIONS; TRANSPORTING
International classification
B81B3/00
PERFORMING OPERATIONS; TRANSPORTING
B81C1/00
PERFORMING OPERATIONS; TRANSPORTING
Abstract
The present invention discloses a micro-electro-mechanical system silicon on insulator (MEMS SOI) pressure sensor and a method for preparing the same. The pressure sensor includes a bulk silicon layer, a buried oxide layer, a substrate, a varistor, a passivation layer, and an electrode layer. The varistor is obtained by means of photolithography and ion implantation on a device layer of an SOI wafer. The passivation layer is SiO.sub.2 formed by means of annealing treatment on the SOI wafer. An annealing atmosphere is one of pure O.sub.2, a gas mixture of O.sub.2/H.sub.2O, a gas mixture of O.sub.2/NO, a gas mixture of O.sub.2/HCl, and a gas mixture of O.sub.2/CHF.sub.3. By means of the annealing treatment, the damage to a surface of the buried oxide layer as a result of over-etching during formation of the varistor by means of photolithography is eliminated and the unstability of the sensor caused by body and interface defects of the passivation layer and trapped charges thereof is resolved. A trench is formed at the buried oxide layer and the bulk silicon layer directly below the varistor, which helps overcome defects as a result of doped impurities entering the buried oxide layer below the varistor, and helps improve the sensitivity of the sensor.
Claims
1. A micro-electro-mechanical system silicon on insulator (MEMS SOI) pressure sensor, comprising a bulk silicon layer, a buried oxide layer, a substrate, a varistor, a passivation layer, and an electrode layer, wherein the bulk silicon layer is located on an upper surface of the substrate, the buried oxide layer is located on an upper surface of the bulk silicon layer, the bulk silicon layer is provided with a cavity inside, and the bulk silicon layer directly above the cavity and the buried oxide layer jointly form a pressure sensitive film; the varistor is located on an upper surface of the buried oxide layer, the passivation layer is configured to wrap an upper surface and a peripheral side of the varistor, and an electrode connection hole is provided at a center of a top of the passivation layer; the electrode layer is located on an upper surface of the passivation layer, and is connected to the varistor through the electrode connection hole, wherein the varistor is obtained by means of photolithography and ion implantation on a device layer of an SOI wafer, the passivation layer is SiO.sub.2 formed by means of annealing treatment on the SOI wafer, an annealing atmosphere is one of pure O.sub.2, a gas mixture of O.sub.2/H.sub.2O, a gas mixture of O.sub.2/NO, a gas mixture of O.sub.2/HCl, and a gas mixture of O.sub.2/CHF.sub.3, and damage to a surface of the buried oxide layer as a result of over-etching during formation of the varistor by means of photolithography is repaired by means of the annealing treatment; and a trench is formed at the buried oxide layer and the bulk silicon layer directly below the varistor by means of trepanning.
2. The MEMS SOI pressure sensor according to claim 1, comprising four varistors, disposed on the upper surface of the buried oxide layer, wherein the four varistors are respectively disposed directly above midpoints of four sides of the cavity, and the four varistors are connected by using a Wheatstone bridge.
3. The MEMS SOI pressure sensor according to claim 1, wherein a thickness of the passivation layer is in a range of 100-1000 nm.
4. The MEMS SOI pressure sensor according to claim 1, wherein spacings between an edge of the trench and an edge of the varistor in length and width directions of the varistor are in a range of 3-20 μm.
5. The MEMS SOI pressure sensor according to claim 1, wherein a thickness of the pressure sensitive film is in a range of 2-10 μm.
6. The MEMS SOI pressure sensor according to claim 1, wherein a material of the substrate is single crystal silicon or glass, and a thickness of the substrate is in a range of 200-2000 μm.
7. A method for preparing the MEMS SOI pressure sensor according to claim 1, the method comprising the following steps: step 1: preparing an SOI wafer, wherein the SOI wafer is composed of a bulk silicon layer, a buried oxide layer, and a device layer; step 2: performing photolithography and ion implantation on the device layer of the SOI wafer to form a varistor; step 3: rinsing the SOI wafer, and then annealing the SOI wafer in an oxygen atmosphere, wherein the annealing atmosphere is one of pure O.sub.2, a gas mixture of O.sub.2/H.sub.2O, a gas mixture of O.sub.2/NO, a gas mixture of O.sub.2/HCl, and a gas mixture of O.sub.2/CHF.sub.3, an annealing temperature is in a range of 850-950 degrees Celsius, damage to a surface of the buried oxide layer as a result of over-etching during formation of the varistor by means of photolithography is repaired by means of the annealing treatment, and an SiO.sub.2 layer is formed on a surface of the varistor as a passivation layer; step 4: forming an electrode connection hole at a center of a top of the passivation layer by means of photolithography; step 5: forming, as an electrode layer, metal on a surface of the passivation layer and inside the electrode connection hole by means of magnetron sputtering and photolithography; step 6: performing photolithography on a lower surface of the bulk silicon layer to form an open cavity; step 7: forming a trench directly below the varistor by means of double-sided alignment and photolithography; and step 8: preparing a substrate, and attaching the substrate to a bottom of the SOI wafer by means of bonding to form a cavity, so as to complete the preparation of the MEMS SOI pressure sensor.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0024]
[0025]
[0026]
DETAILED DESCRIPTION
[0027] The present invention is further described in detail with reference to the accompanying drawings.
[0028] As shown in
[0029] The four varistors 3 are located on an upper surface of the buried oxide layer 2 and are respectively disposed directly above midpoints of four sides of the cavity 8. The position can generate a large stress and strain under deformed conditions, which helps improve the sensitivity of the sensor. Each varistor 3 is separately provided with a passivation layer 4 and an electrode layer 5. Specifically, the passivation layer 4 is configured to wrap an upper surface and a peripheral side of the varistor 3, and an electrode connection hole 6 is provided at a center of a top of the passivation layer 4. The electrode layer 5 is located on an upper surface of the passivation layer 4, and is connected to the varistor 3 through the electrode connection hole 6. The four varistors 3 are connected by using a Wheatstone bridge.
[0030] The varistor 3 is obtained by means of photolithography and ion implantation on a device layer of an SOI wafer. The passivation layer 4 is SiO.sub.2 formed by means of annealing treatment on the SOI wafer. An annealing atmosphere is one of pure O.sub.2, a gas mixture of O.sub.2/H.sub.2O, a gas mixture of O.sub.2/NO, a gas mixture of O.sub.2/HCl, and a gas mixture of O.sub.2/CHF.sub.3. The damage to a surface of the buried oxide layer 2 as a result of over-etching during formation of the varistor 3 by means of photolithography is repaired by means of the annealing treatment. A trench 10 is formed at the buried oxide layer 2 and the bulk silicon layer 1 directly below the varistor 3 by means of trepanning.
[0031] In the above MEMS SOI pressure sensor, a material of the substrate 9 is single crystal silicon or glass, and a thickness of the substrate is in a range of 200-2000 μm. A thickness of the pressure sensitive film is in a range of 2-20 μm. A thickness of the passivation layer 4 is in a range of 100-1000 nm. Spacings between an edge of the trench 10 and an edge of the varistor in length and width directions of the varistor 3 are in a range of 3-20 μm. This not only helps reduce the difficulty of alignment and preparation between the trench 10 and the varistor 3, but also ensures that most of the buried oxide layer directly below the varistor 3 is removed. In this way, the defects caused by the doped impurities entering the buried oxide layer under the varistor and the unstability of the sensor caused by the defects are suppressed, and it is also ensured that the varistor 3 disposed above the trench 10 generates a considerable stress concentration effect and obtains desirable mechanical strength. A material of the electrode layer 5 is metal, preferably one of Al, Ti, Au, Cr, Cu, and Pt.
[0032] The operating principle of the MEMS SOI pressure sensor of the present invention is as follows.
[0033] The pressure sensitive film deforms under the action of external pressure and causes strain on the four varistors 3 on the pressure sensitive film. Based on the piezoresistive effect, resistance values of the four varistors 3 change accordingly, and the resistance value variation is measured by using the Wheatstone bridge, thereby achieving the conversion from an environmental pressure signal to an electrical signal.
[0034] The method for preparing the MEMS SOI pressure sensor includes the following steps.
[0035] Step 1: Prepare an N-type (100) SOI wafer, where the SOI wafer is composed of a bulk silicon layer 1, a buried oxide layer 2, and a device layer.
[0036] Step 2: Perform photolithography and ion implantation on the device layer of the SOI wafer to form a varistor 3.
[0037] Step 3: Rinse the SOI wafer, and then anneal the SOI wafer in an oxygen atmosphere, where the annealing atmosphere is one of pure O.sub.2, a gas mixture of O.sub.2/H.sub.2O, a gas mixture of O.sub.2/NO, a gas mixture of O.sub.2/HCl, and a gas mixture of O.sub.2/CHF.sub.3, an annealing temperature is in a range of 850-950 degrees Celsius. The damage to a surface of the buried oxide layer 2 as a result of over-etching during formation of the varistor 3 by means of photolithography is repaired by means of the annealing treatment, and an SiO.sub.2 layer is formed on a surface of the varistor 3 as a passivation layer 4, the annealing temperature is set in a range of 850-950 degrees Celsius, so as to not only ensure high-quality SiO.sub.2, but also to avoid the problem of SOI wafer cracking caused by high-temperature annealing.
[0038] Step 4: Form an electrode connection hole 6 at a center of a top of the passivation layer 4 by means of photolithography.
[0039] Step 5: Form, as an electrode layer 5, metal on a surface of the passivation layer 4 and inside the electrode connection hole 6 by means of magnetron sputtering and photolithography.
[0040] Step 6: Perform photolithography on a lower surface of the bulk silicon layer 1 to form an open cavity.
[0041] Step 7: Form a trench 10 directly below the varistor 3 by means of double-sided alignment and photolithography.
[0042] Step 8: Prepare a substrate 9, and attach the substrate 9 to a bottom of the SOI wafer by means of bonding to form a cavity 8, so as to complete the preparation of the MEMS SOI pressure sensor.
[0043] The foregoing descriptions are exemplary implementations of the present invention. It is noted that a person of ordinary skill in the art may make some improvements and modifications without departing from the principle of the present invention, and the improvements and modifications shall fall within the protection scope of the present invention.