INTRODUCING MATERIAL WITH A LOWER ETCH RATE TO FORM A T-SHAPED SDB STI STRUCTURE
20170278925 · 2017-09-28
Inventors
Cpc classification
H01L29/785
ELECTRICITY
H01L21/3085
ELECTRICITY
H01L29/66795
ELECTRICITY
International classification
H01L29/06
ELECTRICITY
H01L21/306
ELECTRICITY
H01L29/66
ELECTRICITY
Abstract
A method of introducing SDB material with a lower etch rate during a formation of a t-shape SDB STI structure are provided. Embodiments include providing an STI region in a Si substrate; forming a hardmask over the STI region and the Si substrate; forming a cavity through the hardmask over the STI region, the cavity having a width greater than a width of the STI region; depositing a SDB material in the cavity with an etch rate lower than HDP oxide to form a t-shaped SDB STI structure; and removing the hardmask.
Claims
1. The method comprising: providing a shallow trench isolation (STI) region in a silicon (Si) substrate; forming a hardmask over the STI region and the Si substrate; forming a cavity through the hardmask over the STI region, the cavity having a width greater than a width of the STI region; depositing a single diffusion break (SDB) oxide material in the cavity with an etch rate lower than HDP oxide to form a t-shape SDB STI structure; and removing the hardmask.
2. The method according to claim 1, comprising forming the SDB material of silicon dioxide (SiO.sub.2) modified with nitrogen (N).
3. The method according to claim 2, wherein the SDB material has an etch rate ratio between etch rates of pure oxide and silicon nitride (SiN).
4. The method according to claim 2, comprising modifying the SiO.sub.2is with 10 to 40% of N.
5. The method according to claim 1, comprising forming the SDB material of silicon dioxide (SiO.sub.2) modified with carbon (C).
6. The method according to claim 5, wherein the SDB material has an etch rate ratio between etch rates of pure oxide and silicon carbide (SiC).
7. The method according to claim 5, comprising modifying the SiO.sub.2with 1 to 15% of C.
8. The method according to claim 1, comprising forming the SDB material of pure nitride.
9. The method according to claim 1, further comprising: providing trenches filled with STI material in the Si substrate perpendicular to the STI region; recessing the STI material to form Si FINs subsequent to removing the hardmask, wherein an SDB layer width is greater than the STI region width subsequent to recessing the STI material.
10. The method according to claim 9, wherein the SDB layer width is 35 to 90 nanometers (nm).
11. The method according to claim 1, further comprising: forming a cavity in the Si substrate adjacent to each side of the STI; and epitaxially growing a silicon germanium (eSiGe) or silicon phosphorus (eSiP) in the cavities.
12. The method according to claim 11, wherein the SDB layer prevents the cavity from touching the STI.
13. The device comprising: a silicon (Si) substrate with FINs; shallow trench isolation (STI) material in the substrate between the FINs; an STI region in a FIN and extending into the underlaying Si substrate; a single diffusion break (SDB) oxide material with an etch rate lower than HDP oxide over the STI forming a t-shape SDB STI structure; and source/drain (S/D) regions on opposite sides of the STI region, the S/D being separated from the STI region with silicon.
14. The device according to claim 13, wherein the SDB layer has a width of 35 to 90 nanometers (nm).
15. The device according to claim 13, wherein the SDB comprises silicon dioxide (SiO.sub.2) modified with nitrogen (N) and the SDB has an etch rate ratio between etch rates of pure oxide and silicon nitride (SiN).
16. The device according to claim 15, wherein the SiO.sub.2is modified with 10 to 40% of N.
17. The device according to claim 13, wherein the SDB comprises silicon dioxide (SiO.sub.2) modified with carbon (C) and the SDB material has an etch rate ratio between etch rates of pure oxide and silicon carbide (SiC).
18. The device according to claim 17, wherein the SiO.sub.2is modified with 1 to 15% of C.
19. The device according to claim 13, wherein the SDB material comprises pure nitride.
20. The method comprising: providing a shallow trench isolation (STI) region in a silicon (Si) substrate; depositing a hardmask silicon nitride (HM SiN) material over the STI region and the Si substrate to form a hardmask; forming a photoresist on an upper surface of the hardmask; removing a center portion of the hardmask to form an opening; removing the photoresist; etching the STI region and the Si substrate through the opening to form a cavity over the STI region, the cavity having a width greater than a width of the STI region; depositing a single diffusion break (SDB) material comprising silicon dioxide (SiO.sub.2) modified with nitrogen (N) or carbon (C) or pure nitride, the SDP material in the cavity; planarizing the SDB material down to the hardmask to form a t-shape SDB STI structure; and removing the hardmask; providing trenches filled with STI material in the Si substrate perpendicular to the STI region; recessing the STI material to form Si FINs subsequent to removing the hardmask, wherein an SDB layer width is greater than the STI region width subsequent to recessing the STI material.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawing and in which like reference numerals refer to similar elements and in which:
[0017]
[0018]
DETAILED DESCRIPTION
[0019] In the following description, for the purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of exemplary embodiments. It should be apparent, however, that exemplary embodiments may be practiced without these specific details or with an equivalent arrangement. In other instances, well-known structures and devices are shown in block diagram form in order to avoid unnecessarily obscuring exemplary embodiments. In addition, unless otherwise indicated, all numbers expressing quantities, ratios, and numerical properties of ingredients, reaction conditions, and so forth used in the specification and claims are to be understood as being modified in all instances by the term “about.”
[0020] The present disclosure addresses and solves the current problem of severe facet epitaxial (EPI) growth attendant upon forming SDBs using HDP oxide. In accordance with embodiments of the present disclosure, a t-shape SDB STI structure is achieved by replacing the HDP oxide with an SDB material having a significantly lower etch rate. Since the SDB material has a slower etch rate, the remaining SDB material has a larger lateral width and be able to protect the Si on the STI sidewalls during the S/D cavity etch, which in turn provides a more symmetric seed layer for subsequent S/D Epitaxy growth.
[0021] Methodology in accordance with embodiments of the present disclosure includes providing an STI region in a Si substrate and forming a hardmask over the STI region and the Si substrate. Then, a cavity having a width greater than a width of the STI region is formed through the hardmask over the STI region. Next, an SDB material with an etch rate lower than HDP oxide is deposited in the cavity to form a t-shape SDB STI structure. Then, the hardmask is removed.
[0022] Still other aspects, features, and technical effects will be readily apparent to those skilled in this art from the following detailed description, wherein preferred embodiments are shown and described, simply by way of illustration of the best mode contemplated. The disclosure is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
[0023]
[0024] In
[0025] Adverting to
[0026]
[0027] The embodiments of the present disclosure can achieve several technical effects, such as, improving the junction EPI facet issue to boost device performance. Devices formed in accordance with embodiments of the present disclosure enjoy utility in various industrial applications, e.g., microprocessors, smart phones, mobile phones, cellular handsets, set-top boxes, DVD recorders and players, automotive navigation, printers and peripherals, networking and telecom equipment, gaming systems, and digital cameras. The present disclosure therefore enjoys industrial applicability in any of various types of highly integrated finFET semiconductor devices, particularly for the 14 nm technology node and beyond.
[0028] In the preceding description, the present disclosure is described with reference to specifically exemplary embodiments thereof. It will, however, be evident that various modifications and changes may be made thereto without departing from the broader spirit and scope of the present disclosure, as set forth in the claims. The specification and drawings are, accordingly, to be regarded as illustrative and not as restrictive. It is understood that the present disclosure is capable of using various other combinations and embodiments and is capable of any changes or modifications within the scope of the inventive concept as expressed herein.