Adaptive voltage converter

Abstract

An adaptive voltage converter adapted to compensate for the exponential sensitivities of sub-threshold and near-threshold circuits. The converter can change its power/performance characteristics between different energy modes. The converter may comprise two or more voltage converters/regulators. A multiplexing circuit selects between the outputs of the several converters/regulators depending on the state of a control signal generated by a control facility. The converter is specially adapted to change the output of each converter/regulator based on a number of variables, including, for example, process corner, temperature and input voltage.

Claims

1. In an ultra-low power integrated circuit comprising a transistor having a threshold voltage V.sub.th, a voltage conversion method adapted to deliver to a load a regulated voltage having a selected one of a first current capability and a second current capability less than said first current capability, said method comprising the steps of: selectively developing a first voltage having said first current capability; selectively developing a second voltage having said second current capability; and selecting, as said regulated voltage, one of said first and second voltages as a function of a current consumption of said load; dynamically adjusting at least one of said first and second voltages as a function complementary to absolute temperature; and selecting at least one of said first and second voltages to be a selected one of a sub-threshold voltage less than said threshold voltage of said transistor (V.sub.dd<V.sub.th) and a near-threshold voltage greater than or equal to said threshold voltage of said transistor and less than or equal to 0.4 volts above said threshold of said transistor (V.sub.th≤V.sub.dd≤(V.sub.th+0.4 volts)); wherein a nominal value of one of said first and second voltages is selectively adjusted by a tuning parameter.

2. The method of claim 1 wherein said ultra-low power integrated circuit further comprises a first voltage regulator, and wherein said first voltage and said second voltage are each developed by said first voltage regulator.

3. The method of claim 1 wherein said ultra-low power integrated circuit further comprises a first voltage regulator and a second voltage regulator, and wherein said first voltage is developed by said first voltage regulator and said second voltage is developed by said second voltage regulator.

4. The method of claim 1 wherein said tuning parameter is developed as a function of a process corner.

5. The method of claim 1 wherein said ultra-low power integrated circuit further comprises a storage facility, and wherein said tuning parameter is stored in said storage facility.

6. The method of claim 5 wherein said storage facility is a non-volatile memory.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

(1) The several embodiments may be more fully understood by a description of certain preferred embodiments in conjunction with the attached drawings in which:

(2) FIG. 1 illustrates, in block diagram form, a general-purpose computer system adapted to instantiate any of the several embodiments;

(3) FIG. 2 illustrates, in block diagram form, a typical integrated system adapted to practice any of the several embodiments;

(4) FIG. 3 illustrates, in block schematic form, one embodiment of an adaptive voltage converter;

(5) FIG. 4 illustrates, in circuit diagram form, one other embodiment of a reference voltage generator;

(6) FIG. 5 illustrates, in flow diagram form, one method for operating the adaptive voltage converter;

(7) FIG. 6 illustrates, in circuit diagram form, one embodiment of a buck converter; and

(8) FIG. 7 illustrates, in circuit diagram form, one embodiment of a linear voltage regulator.

(9) FIG. 8 illustrates, in graphical form, sub-threshold and near-threshold voltage ranges according to some embodiments.

(10) In the drawings, similar elements will be similarly numbered whenever possible. However, this practice is simply for convenience of reference and to avoid unnecessary proliferation of numbers, and is not intended to imply or suggest that identity is required in either function or structure in the several embodiments.

DETAILED DESCRIPTION OF THE INVENTION

(11) Shown in FIG. 1 is a typical general purpose computer system 10. Although not all of the electronic components illustrated in FIG. 1 may be operable in the sub-threshold or near-threshold domains in any particular embodiment, some, at least, may be advantageously adapted to do so, with concomitant reductions in system power dissipation. In particular, in recently-developed battery-powered mobile systems, such as smart-phones and the like, many of the discrete components typical of desktop or laptop devices illustrated in FIG. 1 are integrated into a single integrated circuit chip.

(12) Shown in FIG. 2 is a typical integrated system 12 comprising, inter alia, reference voltage (“V.sub.Ref”) generator 14, reference current (“I.sub.Ref”) generator 16, several digital modules, and several analog modules. An example of an analog module is analog to digital converter (“ADC”) 18. Reference voltage generator 14 and reference current generator 16 are each common modules for supplying a stable reference to such analog modules. Reference voltage generator 14 is sometimes used to derive the output reference current provided by reference current generator 16. Also, reference voltage generator 14 and reference current generator 6 may be used to supply a stable reference to modules throughout integrated system 12.

(13) For convenience of reference, in the system illustrated in FIG. 2, one instantiation of the voltage converter 20 is illustrated. In general, the voltage converter 20 is adapted to deliver to a load, e.g., any of the several components comprising system 12, a regulated voltage having a selected one of a first current capability and a second current capability substantially less than the first current capability. In accordance with the method at least one of the first and second voltages is dynamically adjusted as a function complementary to absolute temperature.

(14) Shown in greater detail in FIG. 3 is one embodiment of the adaptive voltage converter 20. A battery 22 supplies a voltage, V.sub.Bat, to converter 20, which generates a lower regulated voltage, V.sub.Reg, that may be delivered to a load circuit 24, which can be a circuit of any type. The voltage V.sub.Reg may be sub-threshold, near-threshold or super-threshold. In general, the converter 20 may comprise two or more voltage converters/regulators 26, of which only two are illustrated in FIG. 3. A multiplexing circuit 28 selects between the outputs of the several converters/regulators 26 depending on the state of a control signal 32 generated by a control facility 34. Control 34 also selectively enables and/or disables each of the converters/regulators 26; and a voltage reference V.sub.Ref generator 36. In addition to basic voltage regulation, the converter 20 may be adapted to change the output of each converter/regulator 26 based on a number of variables, including, for example, process corner, temperature and input voltage. Details of important elements and variants of the invention will described below, as will a specific implementation.

(15) As has been noted, in the embodiment illustrated in FIG. 3, converter 20 comprises two converters: a buck converter 26a for high-efficiency conversion during active mode, and a linear voltage regulator 26b for ultra-low quiescent current operation during sleep mode. If one of the converters 26 is in use, it would be typical to power down the other unused converter 26 to save energy. In this embodiment, the buck converter 26a will generally be enabled when the system 12 is in active mode with loads on the order of 100 μA to 5 mA. In such a mode, buck converter 26a is capable of delivering power at a variety of voltages (including sub-threshold and near-threshold voltages) with power efficiencies exceeding 90%. However, load currents in a sub-threshold or near-threshold circuit may fall below 100 nA in a sleep mode, and the power efficiency of buck converter 26a could easily fall below 5%. In this sleep mode, it may be desirable to switch over to a second converter that offers better power efficiency. For example, linear voltage regulator 26b can be easily adapted to operate with quiescent current on the order of 1 nA yet be capable of delivering much great power efficiency with load currents on the order of 100 nA. Typically, such an embodiment of linear regulator 26b will be incapable of sourcing active load currents in the range of 100 μA to 5 mA, but automatic switchover to the buck converter 26a in active mode solves this problem.

(16) It is common for microcontrollers (“MCUs”) to have architected power states (e.g., an active state, a sleep state, a deep sleep state, etc.). Typically, such an MCU will have a power management unit (“PMU”) that is responsible for switching between architected power states. Since the PMU is driving transitions between power states, it may also be used as the control 34 in FIG. 3 to drive transitions between voltage converters (e.g., from buck converter 26a to linear regulator 26b) in the converter 20.

(17) As is known, transitions between voltage converters can also be driven by components in addition to the PMU. For example, a serial communications interface (“SCI”) might remain active while the MCU is in a sleep state. Normally, linear regulator 26b would be enabled because the system 12 is in a sleep state. However, the SCI is still active and may require a high-performance converter like the buck converter 26a. Consequently, it may be desirable to permit the SCI to request that the buck converter 26a remain powered on and selected despite the system 12 transitioning to a sleep state.

(18) Transitions between voltage converters can also be driven by current sense circuitry. For example, if a current sensor circuit (not shown) detects that the load current has fallen below some predetermined threshold, then the converter 20 can switch over from buck converter 26a, which has a high load capability, to linear regulator 26b, which has a low load capability.

(19) Control of the converter 20 can be achieved via software, but this may sometimes be challenging and confusing for software developers. It may therefore be desirable to automate the transitions between voltage converters 26 based on the architectural power state of the system and based on the activity of peripherals in the system (e.g., the SCI).

(20) While thus far focus has been on switching between converters 26, each individual converter 26[a::b] can also be designed to adapt to changing conditions and/or changing control signals. For example, buck converter 26a can change the on-time of the power switch transistor (“T.sub.on”)) (not shown) depending on changing input value (i.e., conversion ratio), changing load current, a changing control signal, or a variety of other inputs. In contrast, linear regulator 26b can adapt the tail current of its main amplifier (not shown) depending on its load current, a changing control signal, or a variety of other inputs.

(21) In some implementations, the converter 20 may not contain two separate converters 26. It may instead contain a single voltage converter 26 that adapts to the power state of the load circuit. For example, linear regulator 26b may be adapted to use a tail current of 1 μA in active mode to ensure adequate bandwidth for large active mode loads, while in sleep mode regulator 26b may be reconfigured to use a tail current of 1 nA.

(22) The multiplexor 28 in FIG. 3 can be implemented using any known multiplexing technique including a pass transistor multiplexor, a transmission gate multiplexor, a wired-OR multiplexor implementation, and any of a variety of other known embodiments. The multiplexor 28 may also be designed to accommodate different timing relationships during switch-over from one converter 26 to another. The multiplexor 28 can pass the outputs of two converters 26 at once during switch-over from one converter to another to ensure a reliable output voltage. Conversely, the multiplexor 28 can block both converters 26 for a period of time when switching from one to another. The multiplexor 28 can also switch instantaneously from one to another.

(23) It is typical for the converters 26 in FIG. 3 to share off-chip and on-chip passives (e.g., compensation capacitors) to save cost and area, though this is not required. In addition, converters 26 will generally share an input voltage, though they may also have different input voltages. Although converters 26 will generally provide the same output voltage, this is not required. For example, buck converter 26a used in active mode might provide a low voltage to minimize power while actively awake; but linear regulator 26b used in sleep mode might allow voltage to float higher since voltage level is not as important in sleep mode. Similarly, the converters 26 can have different compensation behavior. Thus, in the previous example, buck converter 26a might be temperature compensated while linear regulator 26b might not be temperature compensated at all.

(24) As previously mentioned, an adaptive voltage supply is one of the best available tools to manage the exponential sensitivities of sub-threshold and near-threshold circuits. In one embodiment of the adaptive voltage converter 20, the V.sub.Reg voltage level is adjusted in response to different manufacturing process variations or environmental conditions. The tuning of the voltage level can be software controlled or can be controlled by a control circuit in a closed-loop fashion. The voltage level output by a particular converter 26 can be controlled by changing the reference voltage, the voltage converter gain, or any other available tuning parameter with respect to temperature and/or process.

(25) In one embodiment, the V.sub.Reg voltage is dynamically adjusted as a function complementary to absolute temperature. Although the generation of such a function can be achieved in an open-loop manner with software that periodically measures temperature with a sensor (not shown), it may be desirable to construct a closed-loop circuit that requires no software intervention. For example, two-transistor sub-threshold reference voltage generator 36′ shown in FIG. 4 can be easily adapted to adjust the V.sub.Reg voltage as a function complementary to absolute temperature simply by changing the size of one of the transistors M1-M2. Such an embodiment, used in the converter 20, automatically forces V.sub.Reg to vary as a function complementary to absolute temperature without software intervention.

(26) The tuning of the voltage level with respect to variations in the manufacturing process is also important. In general, this tuning step is best done at the time of production test. Tuning parameters can be stored in an on-board non-volatile memory (not shown) and then loaded upon powering up for the first time. For chips that exhibit slow process characteristics (e.g., high threshold voltage or long gate length), the regulated voltage will generally be adjusted to a higher level to ensure a minimum performance level. Conversely, the regulated voltage will generally be adjusted down to save energy while maintaining performance for chips with faster process characteristics. Any known trimming algorithm may be used for determining the correct voltage level settings.

(27) Though this discussion has focused mainly on the adaptation of supply voltage in response to temperature and process fluctuations, V.sub.Reg can also be adapted to other factors. For example, as the system's workload changes, V.sub.Reg can be changed accordingly. The system might remain in a sub-threshold or near-threshold low performance, low energy mode while handling background tasks like sensing and data movement. When handling applications with real-time requirements, the system might automatically increase voltage to a super-threshold voltage to achieve higher performance at the expense of energy efficiency.

(28) Many of the aforementioned characteristics rely on tuning of the system 12 to minimize variations across process and temperature. This requires careful calibration at the time of post-manufacturing test. Manufacturing test requires a means to read out each important voltage. including reference voltages, internal nodes of feedback dividers, and regulated outputs. This is typically achieved by having an on-chip multiplexer (not shown) with a buffering amplifier (e.g., see FIG. 7 in the Related Application) that can alternately select each voltage of interest. Manufacturing test also employs a means to store calibrated values in a non-volatile manner on chip. This can be achieved using flash memory, one-time programmable memory, fuses, or any other means of non-volatile data storage. Any known trimming algorithm or method may be used to set the correct calibration settings for all previously discussed trimmable elements.

(29) In accordance with the switch-over method illustrated in FIG. 5, when the load circuit 24 initially switches into the active mode, V.sub.Reg is sourced by buck converter 26a with high power efficiency and high current drive capability. When the load circuit 24 thereafter switches into sleep mode, control 34 powers up linear regulator 26b, which exhibits excellent low current drive capability and extremely low quiescent current. After giving the regulator 26b sufficient time to warm up, control 34 switches multiplexer 28 to source the load current from the linear regulator 26b. After a short delay, the control 34 powers down the buck converter 26a. Similarly, when the load circuit 24 switches into active mode, control 34 powers up buck converter 26a. After giving buck converter 26a time to warm up, control 34 switches multiplexer 28 to source the load current from the buck converter 26a. After a short delay, control 34 powers down the linear regulator 26b.

(30) In one embodiment, V.sub.Ref generator 36 is tuned to have a low temperature coefficient (“TC”) (i.e., a near-zero coefficient). In this embodiment, control 34 provides a first tuning parameter 38a to tune the absolute value of the reference across process; and a second tuning parameter 38b to tune out process variations in the temperature coefficient of the voltage reference.

(31) As illustrated in the embodiment illustrated in FIG. 3, buck converter 26a receives multiple control signals from control 34: a first signal 40a controls the absolute value of the feedback network's divide ratio; a second signal 40b controls the temperature co-efficient of the feedback divide ratio; and a third signal 40c controls whether buck converter 26a is powered up or powered down. A more detailed diagram of the buck converter 26a is shown in FIG. 6. The buck converter 26a uses a pulse frequency modulation scheme with transistors operating in a mix of sub-threshold, near-threshold and super-threshold regimes. The feedback network 44a is a resistive divider that is highly tunable, with a current source adapted to provide a bias current as a function that is positive to absolute temperature (“PTAT”). As previously stated, the first signal 40a is used to control the divide ratio to combat process variations, and the second signal 40b is used to control the temperature coefficient; both the first signal 40a and the second signal 40b are typically set during IC manufacturing, but, if desired, may be changed dynamically to adapt to current operating conditions. The temperature co-efficient is selected to ensure that V.sub.Reg varies as a function complementary to absolute temperature, thereby ensuring that sub-threshold and near-threshold circuits have operating speeds that remain substantially constant across temperature. The feedback network 44a, and, in particular, the PTAT current source, includes active amplifiers to ensure tunability of the temperature co-efficient. One suitable PTAT current source is the band-gap reference circuit shown in FIG. 11.18 on page 391 of Design of Analog CMOS Integrated Circuits, B. Razavi, McGraw Hill 2001.

(32) As illustrated in the embodiment illustrated in FIG. 3, linear regulator 26b receives multiple control signals from control 34: a first signal 42a controls the absolute value of the feedback network's divide ratio; a second signal 42b controls the temperature co-efficient of the feedback divide ratio; and a third signal 42c controls whether linear regulator 26b is powered up or powered down. A more detailed diagram of the linear regulator 26b is shown in FIG. 7. The linear regulator 26b uses an amplifier biased in the sub-threshold region with tail current much less than 1 nA. Like the buck converter 26a, the linear regulator 26b has a feedback network 44b that is a highly tunable resistive divider. The first signal 42a is used to control the divide ratio to combat process variations, and the second signal 42b is used to control the temperature coefficient of the feedback divide ratio. The feedback network 44b includes active amplifiers to ensure tunability of the temperature co-efficient. This feedback network 44b can be shared with that of the buck converter 26a to save area and power. As in the case of the buck converter 26a, the temperature co-efficient is selected to ensure that V.sub.Reg varies as a function complementary to absolute temperature.

(33) Although described in the context of particular embodiments, one of ordinary skill in this art will readily realize that many modifications may be made in such embodiments to adapt either to specific implementations.

(34) Thus it is apparent that an adaptive voltage converter designed specifically to compensate for the exponential sensitivities of sub-threshold and near-threshold circuits has been disclosed. This adaptive voltage converter is also adapted to change its power/performance characteristics between different energy modes. Further, this method and apparatus provides performance generally superior to the best prior art techniques.