Display device and method of manufacturing the same

Abstract

A display device and a method of manufacturing the display device are disclosed. In one aspect, the method includes forming a sacrificial layer over a carrier substrate, forming a passivation barrier layer to cover upper and lateral sides of the sacrificial layer and forming a thin film transistor layer over the passivation barrier layer. The method also includes placing a mask over the thin film transistor layer so as to expose an edge portion of the passivation barrier layer, wherein the edge portion does not overlap the mask in the depth dimension of the display device. The method further includes removing the edge portion of the passivation barrier layer so as to form a barrier layer and separating the carrier substrate from the barrier layer via the sacrificial layer.

Claims

1. A method of manufacturing a display device, comprising: forming a sacrificial layer over a carrier substrate; forming a passivation barrier layer to cover upper and lateral sides of the sacrificial layer; forming a thin film transistor layer over the passivation barrier layer; placing a mask over the thin film transistor layer so as to expose an edge portion of the passivation barrier layer, wherein the edge portion does not overlap the mask in the depth dimension of the display device; removing the edge portion of the passivation barrier layer so as to form a barrier layer; and separating the carrier substrate from the barrier layer via the sacrificial layer.

2. The method of claim 1, wherein the sacrificial layer is formed of at least one of a metal oxide and a graphene oxide, and wherein the metal oxide includes at least one of oxide molybdenum (MoOx), aluminum oxide (AlOx), and oxide titanium (TiOx).

3. The method of claim 2, wherein the passivation barrier layer is formed of at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiOxNy).

4. The method of claim 2, wherein the edge portion of the passivation barrier layer includes a portion covering a lateral side of an edge portion of the sacrificial layer and an upper side of the carrier substrate.

5. The method of claim 4, further comprising forming an encapsulator over the thin film transistor layer, wherein the edge portion of the passivation barrier layer does not overlap the encapsulator in the depth dimension of the display device.

6. The method of claim 5, further comprising forming a light-emitting element layer between the thin film transistor layer and the encapsulator, wherein the encapsulator encapsulates the light-emitting element layer.

7. The method of claim 1, wherein the separating includes irradiating a laser beam onto the sacrificial layer.

8. The method of claim 1, wherein the separating includes etching the sacrificial layer with an etchant and removing the sacrificial layer.

9. The method of claim 1, wherein the forming of the sacrificial layer includes: depositing a metal or a graphene onto the carrier substrate through sputtering; and oxidizing the deposited metal or graphene.

10. The method of claim 1, wherein the thickness of the sacrificial layer is substantially equal to or less than about 3000 Å.

11. The method of claim 1, wherein the mask includes a shadow mask.

12. The method of claim 1, further comprising attaching a lower substrate to a lower side of the barrier layer after the carrier substrate is separated.

13. The method of claim 12, wherein the lower substrate is flexible.

14. The method of claim 1, wherein an edge of the barrier layer is formed on an upper side of the sacrificial layer.

15. A method of manufacturing a display device, comprising: forming a sacrificial layer over a carrier substrate having a top surface, wherein the sacrificial layer does not cover a portion of the top surface of the carrier substrate; forming a passivation barrier layer to cover upper and lateral sides of the sacrificial layer, wherein the passivation barrier layer covers the portion of the top surface of the carrier substrate; forming a thin film transistor layer over the passivation barrier layer so as to partially cover the passivation barrier layer, wherein the thin film transistor layer has a width less than that of the sacrificial layer, and wherein the width is defined in a direction perpendicular to the depth dimension of the display device; placing a mask over the thin film transistor layer so as to expose an edge portion of the passivation barrier layer, wherein the edge portion does not overlap the mask in the depth dimension of the display device; and removing the edge portion of the passivation barrier layer so as to form a barrier layer.

16. The method of claim 15, wherein the width of the barrier layer is greater than that of the thin film transistor layer and less than that of the sacrificial layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a cross-sectional view of a display device according to an exemplary embodiment.

(2) FIGS. 2, 3, 4, 5, 6, 7 and 8 show cross-sectional views of a plurality of processes of a method for manufacturing a display device according to an exemplary embodiment.

DETAILED DESCRIPTION OF CERTAIN INVENTIVE EMBODIMENTS

(3) The described technology will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. As those skilled in the art would realize, the described embodiments can be modified in various different ways, all without departing from the spirit or scope of the described technology.

(4) In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements can also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.

(5) Parts that are unrelated to the description of the exemplary embodiments are not shown to make the description clear, and like reference numerals designate like elements throughout the specification.

(6) Throughout this specification and the claims that follow, when it is described that an element is “coupled” to another element, the element can be “directly coupled” to the other element or “electrically coupled” to the other element through a third element. In addition, unless explicitly described to the contrary, the word “comprise” and variations such as “comprises” or “comprising” will be understood to imply the inclusion of stated elements, but not the exclusion of any other elements. In this disclosure, the term “substantially” includes the meanings of completely, almost completely or to any significant degree under some applications and in accordance with those skilled in the art. The term “connected” can include an electrical connection.

(7) A display device according to an exemplary embodiment and a method for manufacturing the same will now be described with reference to accompanying drawings.

(8) A display device according to an exemplary embodiment will now be described with reference to FIG. 1.

(9) FIG. 1 shows a cross-sectional view of a display device according to an exemplary embodiment.

(10) Referring to FIG. 1, the display device includes a display panel (not shown), and the display panel includes a display area for displaying an image and a peripheral area provided near the display area. A matrix of pixels PX and a plurality of display signal lines (not shown) connected to the pixels PX and transmitting a driving signal are provided in the display area.

(11) The display signal lines include a plurality of gate signal lines (not shown) for transmitting a gate signal and a plurality of data lines (not shown) for transmitting a data signal. The gate signal lines and the data lines can extend to cross each other. The display signal lines can extend to the peripheral area to form a pad (not shown).

(12) The pixels PX can be substantially arranged in a matrix form, but the present embodiment is not limited thereto. Each pixel PX can include at least one switching element (not shown) connected to the gate line and the data line, and a pixel electrode (not shown) connected thereto. The switching element can be a three-terminal element such as a thin film transistor integrated on the display panel. The switching element can be turned on or off by the gate signal transmitted by the gate line to selectively transmit the data signal transmitted by the data line to the pixel electrode.

(13) In order to implement a color display, each pixel can display one of the primary colors, and a desired color can be recognized by combining the primary colors. An example of the primary colors can include three primary colors or four primary colors, such as red, green, blue, and the like.

(14) Referring to FIG. 1, the display device according to an exemplary embodiment includes a lower substrate 110. The lower substrate 110 can be formed of glass and plastic. In the case of a flexible display device, the lower substrate 110 can be a film and can be flexible. In this case, the lower substrate 110 can be formed of plastic, such as, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), polyarylate (PAR), polyetherimide (PEI), polyethersulfone (PES), or polyimide (PI), a metal thin film, or very thin glass

(15) At least one barrier layer 30a is provided on the lower substrate 110. The barrier layer 30a can prevent external impurities from being provided to an upper portion through the lower substrate 110. The barrier layer 30a can include at least one of an inorganic layer and an organic layer. For example, the barrier layer 30a is formed of at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiOxNy).

(16) A residual sacrificial layer 20a can be provided between the lower substrate 110 and the barrier layer 30a. The residual sacrificial layer 20a can be formed of an inorganic material, and for example, at least one metal oxide, such as oxide molybdenum (MoOx), aluminum oxide (AlOx), and oxide titanium (TiOx), and a graphene oxide. For example, when the residual sacrificial layer 20a includes molybdenum, the residual sacrificial layer 20a is formed of MoO2 and/or MoO3. The residual sacrificial layer 20a can also include a reduction material of a material such as the metal oxide or the graphene oxide, for example, a metal such as molybdenum (Mo) and graphene.

(17) In some embodiments, the residual sacrificial layer 20a is not provided.

(18) Although not shown, an adhesive layer can be further provided between the lower substrate 110 and the residual sacrificial layer 20a.

(19) A barrier layer 111 can be provided on the barrier layer 30a. In a like manner as the barrier layer 30a, the barrier layer 111 can prevent external impurities from being provided to an upper portion through the lower substrate 110. The barrier layer 111 can include at least one of an inorganic layer and an organic layer. For example, the barrier layer 111 is formed of at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiOxNy). The barrier layer 111 can be omitted.

(20) A plurality of semiconductors 154 are provided on the barrier layer 111. The semiconductor 154 can include a channel region 152 and a source region 153, as well as a drain region 155 provided on respective sides of the channel region 152, doped, and formed. The semiconductor 154 can include an amorphous silicon, polysilicon, or oxide semiconductor.

(21) A gate insulating layer 140 formed of silicon nitride (SiNx) or silicon oxide (SiOx) is provided on the semiconductor 154.

(22) A plurality of gate signal lines (not shown) and a plurality of gate conductors including the gate electrode 124 are provided on the gate insulating layer 140. The gate electrode 124 can overlap at least a part of the semiconductor 154, particularly the channel region 152.

(23) A first passivation layer 180a is provided on the gate insulating layer 140 and the gate conductor. The first passivation layer 180a and the gate insulating layer 140 can include a contact hole 183 for exposing a source region 153 of the semiconductor 154 and a contact hole 185 for exposing a drain region 155.

(24) A plurality of data conductors, including a plurality of data lines 171, a plurality of input electrodes 173, and a plurality of output electrodes 175, are provided on the first passivation layer 180a. The data line 171 can transmit a data signal and can cross the scanning signal line. The input electrode 173 is connected to the data line 171. The output electrode 175 is separated from the data line 171. The input electrode 173 faces the output electrode 175 on the semiconductor 154.

(25) The input electrode 173 and the output electrode 175 can be connected to the source region 153 and the drain region 155 of the semiconductor 154 through the contact holes 183 and 185.

(26) The gate electrode 124, the input electrode 173, and the output electrode 175 configure a driving thin film transistor Qd with the semiconductor 154. The configuration of the driving thin film transistor Qd is not limited to the above description and can be modified in various ways.

(27) A second passivation layer 180b can be provided on the data conductor. The second passivation layer 180b can be formed of an inorganic insulator such as silicon nitride or silicon oxide. The second passivation layer 180b can include a contact hole 185b for exposing the output electrode 175.

(28) For convenience, the layers from the barrier layer 111 to the second passivation layer 180b will be referred to as a thin film transistor layer (TFL).

(29) A plurality of pixel electrodes 191 are provided on the second passivation layer 180b.

(30) The pixel electrode 191 of each pixel PX is physically and electrically connected to the output electrode 175 through the contact hole 185b of the second passivation layer 180b. The pixel electrode 191 can be formed of a semi-transmittable conductive material or a reflective conductive material.

(31) A pixel defining layer (also called a partition) 360 can be provided on the second passivation layer 180b. The pixel defining layer 360 includes a plurality of openings for exposing the pixel electrode 191. The opening of the pixel defining layer 360 for exposing the pixel electrode 191 can define a display area for the pixel PX to emit light. The pixel defining layer 360 can be omitted.

(32) An emission member 370 is provided on the pixel defining layer 360 and the pixel electrode 191. The emission member 370 can include a first organic common layer 371, a plurality of emission layers 373, and a second organic common layer 375 that are sequentially deposited.

(33) The first organic common layer 371 can exemplarily include at least one of a hole injecting layer and a hole transport layer that are sequentially deposited. The first organic common layer 371 can be formed over the entire surface of the display area in which the pixels PX are disposed or can be formed in the pixel PX.

(34) The emission layer 373 can be provided on the pixel electrode 191 of the corresponding pixel PX. The emission layer 373 can be formed of an organic material for properly emitting light of the primary colors, such as red, green, and blue, and it can have a configuration in which a plurality of organic material layers for emitting different colors of light are deposited.

(35) The second organic common layer 375 can exemplarily include at least one of the electron transport layer and the electron injecting layer that are sequentially deposited. The second organic common layer 375 can be formed over the entire surface of the display area in which the pixels PX are disposed or it can be formed in each pixel PX.

(36) The first and second organic common layers 371 and 375 are used to improve emission efficiency of the emission layer 373 and one of the first and second organic common layers 371 and 375 can be omitted.

(37) An opposed electrode 270 for transmitting a common voltage is provided on the emission member 370. The opposed electrode 270 can be formed of a transparent conductive material. For example, the opposed electrode 270 is formed of a transparent conductive material or by depositing a thin metal such as calcium (Ca), barium (Ba), magnesium (Mg), aluminum (Al), or silver (Ag) so that it can be photo-transmittable.

(38) The pixel electrode 191, the emission member 370, and the opposed electrode 270 of the pixel PX configure a light-emitting element, one of the pixel electrodes 191 and the opposed electrode 270 is a cathode, and the other is an anode.

(39) For convenience, the layers from the pixel defining layer 360 and the pixel electrode 191 to the opposed electrode 270 are referred to as a light-emitting element layer (EL).

(40) The display device according to an exemplary embodiment can be a top emission type for outputting light provided by the emission member 370 in an upper direction and displaying an image.

(41) An encapsulator 380 is provided on the opposed electrode 270. The encapsulator 380 can prevent permeation of moisture and/or oxygen from the outside by encapsulating the light-emitting element layer (EL), i.e., the emission member 370 and the opposed electrode 270.

(42) The encapsulator 380 can include a plurality of encapsulating thin film layers (380_1, 380_2, 380_3, . . . 380_n). The encapsulating thin film layers (380_1, 380_2, 380_3, . . . 380_n) include at least one inorganic layer and at least one organic layer, which can be alternately deposited. The organic layer is formed of an organic material and can have a planarization characteristic. The inorganic layer can be formed of an inorganic material such as oxide aluminum (AlOx), silicon oxide (SiOx), or silicon nitride (SiNx).

(43) Referring to FIG. 2, the encapsulating thin film layer 380_1 provided at the lowest position among the encapsulating thin film layers (380_1, 380_2, 380_3, . . . 380_n) can be an inorganic layer or an organic layer. The encapsulating thin film layer 380_n provided at the highest position among the encapsulating thin film layers (380_1, 380_2, 380_3, . . . 380_n) can be an inorganic layer or an organic layer. The encapsulating thin film layer 380_n provided at the highest position can prevent permeation well toward the encapsulator 380 when it is an inorganic layer.

(44) An edge of the barrier layer 30a can be provided outside the edge of the encapsulator 380 or can be substantially aligned with the edge of the encapsulator 380.

(45) A plurality of patterns can be provided on the encapsulator 380. A plurality of patterns can exemplarily include a touch electrode 410 for sensing a touch.

(46) In the present exemplary embodiment, the OLED display has been described as the display device, but the display device according to an exemplary embodiment is not limited thereto. The display device can be one of various kinds of display devices, such as a liquid crystal display, and in this case, the thin film transistor layer (TFL) and the light-emitting element layer (EL) can have different configurations depending on the respective display devices.

(47) A method for manufacturing a display device according to an exemplary embodiment will now be described with reference to FIG. 1 and FIG. 2 to FIG. 8.

(48) FIG. 2 to FIG. 8 show cross-sectional views of a plurality of processes of a method for manufacturing a display device according to an exemplary embodiment.

(49) Referring to FIG. 2, a carrier substrate 10 is formed of a material that is hard and resists heat. For example, the carrier substrate 10 is formed of quartz glass or heat-resistant glass. A heat-resistant temperature of the carrier substrate 10 can be greater than a maximum temperature in a process for manufacturing a thin film transistor. Laser transmittance of the carrier substrate 10 can be greater than about 50%.

(50) A sacrificial layer 20 is formed on the carrier substrate 10. The sacrificial layer 20 can include a metal oxide such as oxide molybdenum (MoOx), aluminum oxide (AlOx), or oxide titanium (TiOx), or a graphene oxide. For example, the sacrificial layer 20 is formed by depositing a metal such as molybdenum (Mo) and a graphene on the carrier substrate 10 by sputtering, and then oxidizing the same. When the metal such as molybdenum (Mo) is deposited through sputtering, argon gas (Ar) and oxygen gas (O.sub.2) can be used. A volume ratio of argon gas (Ar) and oxygen gas O.sub.2 can be about 1:2, a sputtering setting temperature can be about 150° C., and the actual temperature in a sputtering chamber can be greater than about 80° C. A sputtering condition for forming the sacrificial layer 20 is not limited thereto.

(51) The sacrificial layer 20 can be equal to or less than about 3,000 Å thick, but is not limited thereto.

(52) Referring to FIG. 3, a passivation barrier layer 30 for covering the sacrificial layer 20 is formed on the sacrificial layer 20 and the carrier substrate 10. In some embodiments, the passivation barrier layer 30 can cover an upper side and a lower portion of the sacrificial layer 20 so that it is not exposed. The passivation barrier layer 30 can include at least one of an inorganic material and an organic material. For example, the passivation barrier layer 30 is formed of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiOxNy).

(53) When the sacrificial layer 20 contacts an etchant of gas or liquid used in a process for manufacturing a thin film transistor layer (TFL) or an impurity such as plasma gas, the sacrificial layer 20 can be reduced. For example, when a material including hydrogen (H), such as water (H.sub.2O) and hydrogen gas (H.sub.2), or an impurity, such as an acid-based etchant, contacts the sacrificial layer 20, the sacrificial layer 20 is reduced and damaged and the carrier substrate 10 provided below the sacrificial layer 20 can be separated. However, when the sacrificial layer 20 is covered with the passivation barrier layer 30 and a subsequent process is performed according to an exemplary embodiment, the sacrificial layer 20 can be prevented from contacting the material including hydrogen (H), such as water (H.sub.2O) and hydrogen gas (H.sub.2), and the impurity, such as the acid-based etchant, thereby preventing the sacrificial layer 20 from being damaged and the carrier substrate 10 from being separated in advance in the manufacturing process prior to the stage for separating the carrier substrate 10.

(54) Referring to FIG. 4, a thin film transistor layer (TFL) is formed by depositing a plurality of thin films on the passivation barrier layer 30. The thin film transistor layer (TFL) can include a plurality of thin film transistors and at least one insulating layer. For example, referring to FIG. 1, the thin film transistor layer (TFL) may include a barrier layer 111 as previously described, a plurality of semiconductors 154 (though FIG. 1 shows only a semiconductor for simplicity), a gate insulating layer 140, gate conductors including a plurality of gate electrodes 124 (though FIG. 1 shows only a gate electrode for simplicity), a first passivation layer 180a, a plurality of data lines 171 (though FIG. 1 shows only a data line for simplicity), data conductors including a plurality of input electrodes 173 and a plurality of output electrodes 175, and a second passivation layer 180b that are sequentially provided upward. The exemplary constituent elements have been previously described, thus no detailed descriptions will be provided here.

(55) Referring to FIG. 5, a light-emitting element layer (EL) is formed on the thin film transistor layer (TFL). For example, referring to FIG. 1, the light-emitting element layer (EL) may include a plurality of pixel electrodes 191 (though FIG. 1 shows only a pixel electrode corresponding to a pixel PX for simplicity), a pixel defining layer 360, an emission member 370, and an opposed electrode 270 that are sequentially provided upward. The exemplary constituent elements have been previously described, thus no detailed descriptions will be provided here. The formation of the light-emitting element layer (EL) can be omitted, and another process can be added for a different type of display device.

(56) An encapsulator 380 can be formed on the light-emitting element layer (EL). The encapsulator 380 can be formed by alternately depositing the organic material layer and the inorganic material layer. A detailed example of the encapsulator 380 has been described, thus no detailed description thereof will be provided. The formation of the encapsulator 380 can be omitted, and another process can be added for a different type of display device.

(57) Referring to FIG. 6, a mask 500 is arranged on the carrier substrate 10 on which the thin film transistor layer (TFL) is formed to expose an edge portion 35 of the passivation barrier layer 30. The mask 500 can be separated from the carrier substrate 10 by a predetermined distance, and can include an opening for exposing the edge portion 35 of the passivation barrier layer 30.

(58) The edge portion 35 of the passivation barrier layer 30 not covered by the mask 500 can be formed along an edge of the carrier substrate 10, and can include a side of the edge portion of the sacrificial layer 20 and a portion for covering an upper side of the carrier substrate 10. The side of the edge portion of the sacrificial layer 20 can signify a surface of a portion connected to an upper side of the carrier substrate 10.

(59) The edge portion 35 of the passivation barrier layer 30 not covered by the mask 500 can include a portion not covered by the encapsulator 380 and not overlapping the encapsulator 380. The mask 500 can cover the encapsulator 380. An edge of the mask 500 can be substantially aligned with the edge of the encapsulator 380.

(60) The edge portion 35 of the passivation barrier layer 30 not covered by the mask 500 is removed. In this case, the edge portion 35 of the passivation barrier layer 30 can be removed by dry etching. Dry etching gas can use various types of conventionally known gasses and the edge portion 35 of the passivation barrier layer 30 not covered by the mask 500 can be removed by dry etching.

(61) The mask 500 can be a shadow mask having an opening, and a portion covered by the mask 500 can be covered so that dry etching gas does not reach the same.

(62) Referring to FIG. 7, the edge portion 35 of the passivation barrier layer 30 is removed to form a barrier layer 30a. An edge of the barrier layer 30a can be provided outside the edge of the encapsulator 380 or can be substantially aligned with the edge of the encapsulator 380. The edge of the barrier layer 30a can also be provided on an upper side of the sacrificial layer 20.

(63) The carrier substrate 10 is separated from the barrier layer 30a through the sacrificial layer 20. Here, the sacrificial layer 20 can be damaged, and there can be many methods for separating the carrier substrate 10 depending on the damage.

(64) For example, as shown in FIG. 7, the carrier substrate 10 is attached or detached by irradiating a laser beam (LB) provided by a laser beam device 600 to the sacrificial layer 20. The laser beam (LB) is transmitted through the carrier substrate 10 and is irradiated to the sacrificial layer 20. A source of the laser beam (LB) can exemplarily be one of excimer laser beam with a wavelength of about 308 nm, Yb:YAG laser beam with a wavelength of about 343 nm, Nd:YAG laser beam with a wavelength of about 355 nm, and green laser beam with a wavelength of about 532 nm, but the present embodiment is not limited thereto. The excimer laser beam does not damage the carrier substrate 10 and the thin film transistor layer (TFL) but outputs high energy with a short wavelength so the sacrificial layer 20 can be removed in a short time.

(65) Part of the sacrificial layer 20 can remain on the upper side of the separated carrier substrate 10, and can also remain on the lower side of the separated barrier layer 30a. The sacrificial layer 20 remaining on the lower side of the barrier layer 30a will be referred to as a residual sacrificial layer 20a. The residual sacrificial layer 20a can include a material for configuring the sacrificial layer 20 and/or a reduced material thereof. For example, when the sacrificial layer 20 includes oxide molybdenum (MoOx), the residual sacrificial layer 20a includes MoO2 and/or MoO3.

(66) The residual sacrificial layer 20a can be removed or remain in a subsequent stage.

(67) To separate the carrier substrate 10, a method that is different from the method for using a laser beam can be used.

(68) For example, referring to FIG. 8, the carrier substrate 10 is separated by rinsing or etching the sacrificial layer 20 exposed by removing the edge portion 35 of the passivation barrier layer 30. An etchant for rinsing or etching the sacrificial layer 20 can melt or reduce the material configuring the sacrificial layer 20. For example, the etchant includes an etchant based on an acid such as water (H2O) or hydrogen fluoride (HF). In this case, part of the sacrificial layer 20 can remain on the upper side of the carrier substrate 10 and can remain on the lower side of the barrier layer 30a. The sacrificial layer 20 remaining on the lower side of the barrier layer 30a will be referred to as a residual sacrificial layer 20a.

(69) Referring to FIG. 1, the lower substrate 110 including various types of plastic, such as, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polycarbonate (PC), polyarylate (PAR), polyetherimide (PEI), polyethersulfone (PES), or polyimide (PI), a metal thin film, or very thin glass is attached to the lower side of the residual sacrificial layer 20a or the barrier layer 30a to finish the display device.

(70) According to the exemplary embodiment, the sacrificial layer 20 for separating the carrier substrate 10 is covered by the passivation barrier layer 30 so that it does not get damaged during the process for manufacturing a display device, thereby preventing the carrier substrate 10 from being separated during the process for manufacturing a display device.

(71) Further, the number of flexible substrates such as the polyimide film (PI) supplied to the process for manufacturing the flexible display device can be minimized or they are not needed, thereby simplifying the process for manufacturing a display device and reducing the material costs.

(72) While the described technology has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.