Electronic Device and Method for Producing an Electronic Device

Abstract

An electronic device and a method for producing an electronic device are disclosed. In an embodiment the electronic device includes a first component and a second component and a sinter layer connecting the first component to the second component, the sinter layer comprising a first metal, wherein at least one of the components comprises at least one contact layer which is arranged in direct contact with the sinter layer, which comprises a second metal different from the first metal and which is free of gold.

Claims

1-15. (canceled)

16. An electronic device comprising: a first component and a second component; and a sinter layer connecting the first component to the second component, the sinter layer comprising a first metal, wherein at least one of the components comprises at least one contact layer which is arranged in direct contact with the sinter layer, which comprises a second metal different from the first metal and which is free of gold.

17. The device according to claim 16, wherein the sinter layer is permeable to oxygen.

18. The device according to claim 16, wherein the sinter layer comprises silver.

19. The device according to claim 16, wherein the sinter layer comprises copper.

20. The device according to claim 16, wherein the contact layer comprises a noble metal.

21. The device according to claim 16, wherein the contact layer comprises rhodium and/or iridium.

22. The device according to claim 16, wherein the contact layer comprises platinum.

23. The device according to claim 16, wherein the contact layer has a layer thickness of equal to or greater than 5 nm and equal to or less than 500 nm.

24. The device according to claim 16, wherein the contact layer is located on a layer of an oxidizable material.

25. The device according to claim 24, wherein the contact layer is located directly on the layer of the oxidizable material.

26. The device according to claim 24, wherein the oxidizable material comprises titanium, nickel, chromium and/or aluminum.

27. The device according to claim 16, wherein each of the components comprises at least one contact layer, which is in each case arranged in direct contact to the sinter layer, which comprises a metal different from the first metal and which is free of gold.

28. The device according to claim 16, wherein the first component comprises a first carrier element, which is selected from the group consisting of a lead frame, a plastic carrier, a plastic housing, a ceramic carrier, a circuit board, a metal core board and a combination thereof.

29. The device according to claim 16, wherein the second component is an electronic semiconductor chip.

30. A method for producing the electronic device according to claim 16, the method comprising: placing a sintering material between the first component and the second component; and sintering the sintering material thereby forming the sinter layer between the first and second components.

31. An electronic device comprising: a first component and a second component; and a sinter layer connecting the first component to the second component, the sinter layer comprising a first metal, wherein at least one of the components comprises at least one contact layer, which is arranged in direct contact to the sinter layer, which comprises a second metal different from the first metal and which is free of gold, and wherein the contact layer is directly located on a layer of an oxidizable material.

32. The device according to claim 31, wherein the contact layer comprises rhodium and/or iridium,

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Further advantages, advantageous embodiments and developments result from the exemplary embodiments described in the following in conjunction with the figures.

[0021] The figures show in:

[0022] FIG. 1 a schematic illustration of a device according to an exemplary embodiment,

[0023] FIGS. 2 to 4 schematic illustrations of devices according to further exemplary embodiments, and

[0024] FIG. 5 temperature-dependent diffusion coefficients of some metals.

[0025] In the exemplary embodiments and figures, like, similar or equivalent elements may in each case be provided with like reference numerals. The elements illustrated and the dimensional relations among them are not drawn to scale, individual elements such as layers, components, elements and regions may rather be illustrated in an exaggerated size for a better understanding and/or illustration.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0026] FIG. 1 shows an exemplary embodiment for an electronic device 100 comprising a first component 1 and a second component 2. A sinter layer 3 having a first metal is arranged between the first component 1 and the second component 2, the sinter layer connecting the first and second component 1, 2. For example, the first component 1 may be a carrier element and the second component 2 may be an electronic semiconductor chip, e.g., in the form of an optoelectronic semiconductor chip such as a light-emitting diode chip, a laser diode chip or a photo diode chip, or in the form or a power semiconductor component such as a transistor. Particularly preferably, the sinter layer 3 may comprise or be made of silver and/or copper.

[0027] For the production of the electronic device 100, the first component 1 is provided. A sintering material is applied on the first component 1, which is applied in the form of a solvent-containing paste by means of a doctor blade or by printing, for example. The sintering material can comprise particles, for example, powder grains and/or flakes, of the first metal. If a sinter layer 3 is produced from silver, for example, a paste having silver particles can be applied as the sintering material. Alternatively, a pre-compacted dry body with the sintering material can be arranged between the first component 1 and the second component 2. The sintering material may contain further materials and additives, which may influence the processability of the sintering material and/or the sintering process.

[0028] By sintering the sintering material, a connection between individual particles of the sintering material is effected only by a baking of the particles in the solid phase without melting of the sintering material. Sintering can be effected under the influence of heat and/or pressure and/or ultrasound during a required sintering time. Organic binders, solvents or other additives present in the sintering material for a better processability are decomposed by the sintering process or removed from the sintering material, which is why no organic matrix remains the in the connection layer produced by sintering. The particles of the sintering material can be sintered into a porous joining body in the finished sinter layer. The connection between the individual particles is very strong and will be operated in normal operation temperatures for electronic devices below 200° C. far below the melting point of the described sintering materials.

[0029] The first component 1 comprises a contact layer 4, which is arranged on the carrier 5. For example, the carrier 5 may be a ceramic body. Furthermore, the carrier 5 and the contact layer 4 may be parts of a circuit board, in which the second component 2 is mounted by means of the sinter layer 3.

[0030] The contact layer 4 is arranged in direct contact to the sinter layer 3. The contact layer 4 comprises a second metal, which is different from the first metal of the sinter layer 3 and which is free of gold. In particular, the second metal of the contact layer 4 is in direct contact to the first metal of the sinter layer 3. The sinter layer 3 may be permeable to oxygen, while the contact layer 4 may form a protection for underlying layers and regions, which might easily be oxidized by oxygen from the surroundings. To that end, the contact layer 4 comprises a metal, which has a miscibility gap to the first metal of the sinter layer 3 or which at least passivates itself via the formation of intermetallic compounds with the first metal of the sinter layer 3. In particular, in the exemplary embodiment shown, the contact layer 4 comprises or is made of platinum and/or rhodium and/or iridium.

[0031] In this context, FIG. 5 shows diffusion coefficients D depending on a temperature T for Pt in Ag (curve 51), for Ag in Pt (curve 52), for Au in Ag (curve 53), for Ag in Au (curve 54) and for Pd in Ag (curve 55), the data taken from the publication “Zahlenwerte und Funktionen aus Naturwissenschaft und Technik”, Landolt-Bornstein, Berlin, Springer, Vol. 26, 1990. It can be easily discerned in the curves of FIG. 5 that the susceptibility to a diffusion of platinum in silver and vice versa is significantly lower than the susceptibility to a diffusion for gold in silver and vice versa as well as for palladium in silver. A similar behavior can be assumed for rhodium and iridium. Accordingly, the diffusion constant for the first metal of the sinter layer 3 in the second metal of the contact layer 4 in typical operation temperatures for semiconductor chips such as light-emitting diode chips can preferably be equal to or less than 1×10.sup.−24 m.sup.2s.sup.−1, or equal to or less than 1×10.sup.−25 m.sup.2s.sup.−1, or equal to or less than 1×10.sup.−26 m.sup.2s.sup.−1, or equal to or less than 1×10.sup.−28 m.sup.2s.sup.−1. Furthermore, platinum, rhodium and iridium are not or at least not substantially soluble in silver, so that a mixing of these materials with silver is significantly reduced when compared to gold. Since for instance platinum is impermeable to oxygen, while silver has a permeability for oxygen, as described in the publication F. K. Moghadam et al., “Oxygen Diffusion and Solubility Studies in Ag and Pt Using AC Impedance Spectroscopy”, J. Electrochem. Soc., pp. 1329 to 1332 (1986), the contact layer 4 can ensure connection, which is stable in the long run, in an oxygen-containing environment.

[0032] Due to the described properties of platinum, rhodium and iridium, the contact layer 4 can be kept relatively thin and the use of additional noble metal layers, e.g., of palladium or gold, can be omitted. In particular, the contact layer 4 may have a thickness of equal to or greater than 5 nm and equal to or less than 500 nm, preferably of equal to or greater than 15 nm and equal to or less than 100 nm, and particularly preferably of equal to or greater than 30 nm and equal to or less than 60 nm. For example, the contact layer 4 may have a thickness of 40 nm in the illustrated exemplary embodiment, which achieved very good results in a test.

[0033] If the contact layer 4 is to be suitable both for applying a sinter layer and for soldering with customary lead-free soft solders such as SAC (tin-silver-copper), use of, e.g., platinum can avoid problems that might result when using gold contact layers. Thus, the use of a thick gold contact layer in conjunction with SAC may result in the formation of AuSn.sub.4 phases, which put the reliability of the solder connection at risk, while a very thin gold contact layer may lead to a higher risk of losing grip in the course of the use of the component.

[0034] FIG. 2 shows another exemplary embodiment for an electronic device 100, in which the first component 1 on the carrier 5 comprises a layer 6 of an oxidizable material, on which the contact layer 4 is arranged in turn. In particular, the contact layer 4 is applied directly on the layer 6 of the oxidizable material and covers this layer. The contact layer 4 and the layer 6 may be part of a contact arrangement, for example. The oxidizable material of the layer 6 can comprise or be made of titanium, nickel, chromium and/or aluminum. Since the contact layer 4 covers the layer 6, the problems that have been described above in the general part in terms of gold contact layers and silver sinter layers can be avoided.

[0035] As an alternative to the exemplary embodiments illustrated in FIGS. 1 and 2, it is also possible that only the second component 2 or both components 1, 2 comprise a contact layer 4 or a contact layer 4 and at least one underlying layer 6 made of an oxidizable material.

[0036] FIGS. 3 and 4 show further exemplary embodiments for electronic devices in a merely exemplary manner. The first and second components 1, 2 specifically described in FIGS. 3 and 4 are merely exemplary and do not limit the present invention.

[0037] FIG. 3 shows an exemplary embodiment for an electronic device 100, which comprises an AlN ceramic carrier 5 as a first component 1, which is coated with a layer 6 of titanium having a thickness of 100 nm and a contact layer 4 having a thickness of 20 nm. By means of a sinter layer 3, a second component 2 in the form of a gallium nitride HEMT is mounted in the first component 1, which also comprises a contact layer 4′ over layers 6′ of nickel and 6″ of aluminum. The first and/or the second component 1, 2 may comprise further contact layers, which are not shown for the sake of clarity.

[0038] The sinter layer 3 comprises a first metal, while the contact layers 4, 4′ each comprise a second metal, which is different from the first metal and which is free of gold. The contact layers 4, 4′ are in each case arranged in direct contact to the sinter layer 3 and each comprise or are made of the same material, in particular platinum in the exemplary embodiment shown. Alternatively, the contact layer 4 may comprise a second metal and the contact layer 4′ may comprise a third metal, which are different both from another and from the first metal of the sinter layer 3. Both joining partners, i.e., the first component 1 and the second component 2, are connected using a silver sintered paste in the exemplary embodiment shown, wherein optionally a uni-axial pressure, besides a heat treatment during the sintering process, may contribute to the formation of the connection.

[0039] FIG. 4 shows another exemplary embodiment for an electronic device 100, in which a second component 2 formed as an optoelectronic semiconductor chip is mounted on a first component 1 formed as a metal core circuit board by means of a silver sinter layer 3. In particular, the semiconductor chip is formed as a light-emitting diode chip in the exemplary embodiment shown.

[0040] The first component 1 formed as a metal core circuit board comprises silver-plated electrode layers 8 on a carrier 5, while the semiconductor chip forming the second component 2 comprises electrodes having a nickel layer 6 with a thickness of 200 nm and a contact layer 4 of platinum having a thickness of 15 nm, which is in direct contact to the sinter layer 3.

[0041] The semiconductor chip forming the second component 2 may comprise a semiconductor body 7 on the basis of various semiconductor material systems depending on the radiated wavelength. For example, a semiconductor layer sequence on the basis of In.sub.yGa.sub.yAl.sub.1-x-yAs is suitable for long-waved, infrared to red radiation, a semiconductor layer sequence on the basis of In.sub.xGa.sub.yAl.sub.1-x-yP is suitable for red to green radiation and for short-waved visible radiation, i.e., in particular in the range of green to blue light, and/or for UV radiation a semiconductor layer sequence on the basis of In.sub.xGa.sub.yAl.sub.1-x-yN is suitable, with 0≦x≦1 and 0≦y≦1 in each case.

[0042] In particular, the semiconductor body 7 of the semiconductor chip may comprise or be made of a semiconductor layer sequence, particularly preferably an epitaxially grown semiconductor layer sequence. To that end, the semiconductor layer sequence can be grown on a growth substrate, e.g., by means of an epitaxy method such as metal organic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE), and be provided with electric contacts. Singulation of the growth substrate having the semiconductor layer sequence grown thereon allows providing a plurality of optoelectronic semiconductor chips.

[0043] Furthermore, the semiconductor layer sequence can be transferred to a carrier substrate prior to the singulation and the growth substrate can be thinned or completely removed. Such semiconductor chips, which comprise a carrier substrate in place of the growth substrate, can be referred to as so-called thin film semiconductor chips. The basic principle of a thin film light-emitting diode chip is described, for example, in the publication of I. Schnitzer et al., Appl. Phys. Lett. 63 (16), 18 Oct. 1993, pp. 2174 to 2176.

[0044] Like in the exemplary embodiment shown, the electric contacts of the semiconductor chip can be arranged on the same side, or they can be arranged on different sides of the semiconductor layer sequence. In the exemplary embodiment shown, the semiconductor chip comprises the electric contact surfaces on the same side as the sinterable contact layers 4 and is formed as a so-called flip chip with a sapphire substrate, which flip chip is mountable and connectable with the contact layers 4. Alternatively, the semiconductor chip may comprise an electric contact in the form of a sinterable contact layer on a side of a substrate opposite the semiconductor layer sequence, while another contact surface can be formed on a side of the semiconductor layer sequence opposite the substrate, e.g., in the form of a so-called bond pad for contacting by means of a bond wire.

[0045] As an alternative to the exemplary embodiment shown, in which the electric connection is established via the sinter layer, it can also be possible to use the sinter layer for a purely thermal connection. To that end, the semiconductor chip can be formed with electric contacts on a side of the semiconductor layer sequence facing away from a substrate, in analogy to the exemplary embodiment of FIG. 4, while a contact layer in the form of a thermal contact layer can be formed on the side of the substrate facing away from the semiconductor layer sequence. The contact layer can be configured as described in conjunction with the preceding exemplary embodiments. The substrate, on which the contact layer is formed, can be electrically insulating. The semiconductor chip can be connected to a heat sink via the thermal contact layer by means of the sinter layer, for example, so that the electric contacts can be used as top side contacts for an electric connection via wire connections. For example, a suitable semiconductor chip may be an AlGaInN-based semiconductor chip with an electrically insulating substrate, e.g., a sapphire substrate. The semiconductor chip can be connected to the thermal contact layer via the sinter layer, for example, with a heat sink that is made of or comprises copper.

[0046] Alternatively, or additionally, the exemplary embodiments described in conjunction with the figures may comprise further features described in the general part above. Furthermore, the exemplary embodiments described in conjunction with the figures can be combined with one another according to further exemplary embodiments.

[0047] The invention is not limited to the exemplary embodiments through the description by means of these exemplary embodiments. The invention rather includes every new feature as well as every combination of features, which particularly includes any combination of features in the claims, even though this feature or this combination per se is not explicitly indicated in the claims or exemplary embodiments.