METHOD OF FORMING TIN OXIDE LAYER USING TIN METAL TARGET

Abstract

Provided is a method of forming a tin oxide layer using a tin metal target which forms the tin oxide layer on a glass substrate using the tin metal target. The present invention provides the method of forming a tin oxide layer using a tin metal target, which includes forming a tin oxide buffer layer (SnO.sub.2) on the glass substrate by sputtering using the tin metal target and forming a tin oxide (SnO.sub.2−x) semiconductor layer (0<x≦0.01) on the tin oxide buffer layer by sputtering using the tin metal target.

Claims

1. A method of forming a tin oxide layer using a tin metal target, comprising: forming a tin oxide (SnO.sub.2) buffer layer on a glass substrate by a first sputtering using the tin metal target; and forming a tin oxide (SnO2−x) semiconductor layer (0<x≦0.01) on the tin oxide buffer layer by a second sputtering using the tin metal target.

2. The method of claim 1, wherein in the forming of the tin oxide buffer layer, the first sputtering is performed at a pressure of 5 to 20 mTorr in a mixed atmosphere of oxygen gas and an inert gas.

3. The method of claim 2, wherein in the forming of the tin oxide semiconductor layer, the second sputtering is performed at a pressure of 0.1 to 3 mTorr in a mixed atmosphere of oxygen gas and an inert gas.

4. The method of claim 3, wherein a supply quantity of oxygen gas in the forming the tin oxide buffer layer is more than a supply quantity of oxygen gas in the forming of the tin oxide semiconductor layer.

5. The method of claim 3, wherein a composition ratio of oxygen in the tin oxide semiconductor layer is in the range of 0.0000001 to 0.0001.

6. The method of claim 3, further comprising: performing a heat treatment in the range of 300to 450° C. ° C. in an oxygen atmosphere for 30 minutes to 90 minutes after forming the tin oxide semiconductor layer.

7. The method of claim 1, wherein the first and the second sputtering are reactive sputtering.

8. The method of claim 1, wherein the tin oxide semiconductor layer is formed to be thinner than the tin oxide buffer layer.

Description

DESCRIPTION OF DRAWINGS

[0031] FIG. 1 is a view illustrating a sputtering apparatus using a tin metal target according to an embodiment of the present invention.

[0032] FIG. 2 is a flowchart of a method for forming a tin oxide layer using the tin metal target according to the embodiment of the present invention.

[0033] FIGS. 3 to 5 are views illustrating each operation according to the method of forming a tin oxide layer shown in FIG. 2.

[0034] FIG. 6 is a cross sectional view illustrating a top-gate field effect transistor including the tin oxide layer formed by the forming method shown in FIG. 2.

[0035] FIG. 7 is a flowchart according to a method of manufacturing the top-gate field effect transistor shown in FIG. 6.

[0036] FIGS. 8 and 9 are graphs of current-voltage characteristics of the top-gate field effect transistor shown in FIG. 6.

MODES OF THE INVENTION

[0037] In the following description, only the elements necessary for understanding embodiments of the present invention will be described, and it should be understood that description of the other elements will be omitted within the scope of not disturbing the sprit or the essentials of the present invention.

[0038] Those terminologies or words designated otherwise in this specification and the scope of claims in the following description are not limited or interpreted as a normal or lexical meaning. Based on the principle that an inventor may define terminologies to give a better understanding about the invention, those terminologies should be interpreted as a meaning and concept according to the aspects of the inventive concept. Therefore, since embodiments of the invention described in this specification and constitutions illustrated in the drawings are merely preferred embodiments and do not represent the entire inventive concept, it should be understood that various equivalents or modifications that may substitute these embodiments at the time of present application are included in the scope of the invention.

[0039] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings.

[0040] FIG. 1 is a view illustrating a sputtering apparatus using a tin metal target according to an embodiment of the present invention.

[0041] Referring to FIG. 1, a sputtering apparatus 70 supplies an inert gas and oxygen gas into a chamber 73 in which a tin metal target 71 and a glass substrate 10 are located to form a tin oxide layer 20 on the glass substrate 10. The tin oxide layer 20 includes a tin oxide buffer layer 21 formed on the glass substrate 10 and a tin oxide semiconductor layer 23 formed on the tin oxide buffer layer 21.

[0042] The sputtering to form the tin oxide layer 20 is performed in an atmosphere in which the inert gas and oxygen gas are supplied, and sequentially forms the tin oxide buffer layer 21 and the tin oxide semiconductor layer 23 by adjusting a supply quantity of oxygen gas regulated by pressure.

[0043] When supplying oxygen gas and the inert gas, the inert gas may be supplied toward a part close to the tin metal target 71 and the oxygen gas may be supplied toward a part close to the glass substrate so that the tin oxide layer is easily formed on the glass substrate.

[0044] Descriptions below are with reference to FIGS. 1 to 5 and refer to a method of forming the tin oxide layer 20 using the sputtering apparatus 70 which uses the tin metal target 71 according to the embodiment of the present invention. Here, FIG. 2 is a flowchart of the method for forming the tin oxide layer 20 using the tin metal target 71 according to the embodiment of the present invention. In addition, FIGS. 3 to 5 are views illustrating each step according to the method of forming the tin oxide layer 20 shown in FIG. 2.

[0045] First, the glass substrate 10 on which the tin oxide layer 20 is to be formed is provided as illustrated in FIG. 3.

[0046] Then, the tin oxide buffer layer 21 is formed on the glass substrate 10 in operation S81 as shown in FIG. 4. The tin oxide buffer layer 21 is formed by sputtering using the tin metal target 71. The tin oxide buffer layer 21 may have a composition of SnO.sub.2. A reactive sputtering may be employed as the sputtering method.

[0047] For instance, the tin oxide buffer layer 21 may be formed by reactive sputtering using the tin metal target 71 at a pressure of 5 to 20 mTorr in a mixed atmosphere of oxygen gas and an inert gas. For example, a supply ratio of the oxygen gas to the inert gas may be 6:4 but is not limited thereto. As the inert gas, argon gas or nitrogen gas may be used. A temperature of the glass substrate 10 may be in the range of room temperature to 600° C.

[0048] Then, as illustrated in FIG. 5, the tin oxide semiconductor layer 23 is formed on the tin oxide buffer layer 21 in operation S83. The tin oxide semiconductor layer 23 is formed by sputtering using the tin metal target 71. The reactive sputtering may be employed as the sputtering method.

[0049] The tin oxide semiconductor layer 23 may have a composition of SnO.sub.2−x(0<x≦0.01).

[0050] Here, the reason that oxygen has the composition ratio of 0<x≦0.01 is to allow the tin oxide semiconductor layer 23 to have semiconductor properties. That is, in the case when x is 0, for example, the SnO.sub.2 reveals properties of an insulator, thus x should be more than 0. When x is more than 0.01 by being doped with oxygen, the SnO.sub.2 reveals metallicity, thus x should have the composition ratio equal to or less than 0.01. Therefore, the composition ratio of oxygen is in the range of 0<x≦0.01 so that the tin oxide semiconductor layer 23 according to the embodiment of the present invention has semiconductor properties.

[0051] For example, the tin oxide semiconductor layer 23 may be formed by reactive sputtering using the tin metal target 71 at the pressure range of 0.1 to 3 mTorr in a mixed atmosphere of oxygen gas and an inert gas. For instance, a supply ratio of the oxygen gas to the inert gas may be 6:4 but is not limited thereto. Argon gas or nitrogen gas may be used as the inert gas. The temperature range of the glass substrate 10 may be in the range from room temperature to 600° C. Here, the composition ratio of oxygen in the tin oxide semiconductor layer 23 may be in the range of 0.0000001≦x≦0.0001.

[0052] Operations S81 and S83 are performed consecutively, and the tin oxide buffer layer 21 and the tin oxide semiconductor layer 23 are formed sequentially by adjusting the supply quantity of oxygen gas regulated by pressure while maintaining a constant supply ratio of the oxygen gas to the inert gas. Here, the supply quantity of the oxygen gas in the formation of the tin oxide buffer layer 21 is more than the supply quantity of the oxygen gas in the formation of the tin oxide semiconductor layer 23.

[0053] In addition, in operation S85, the tin oxide layer 20 which includes the tin oxide buffer layer 21 and the tin oxide semiconductor layer 23 is formed by a heat treatment on the tin oxide semiconductor layer 23 and the tin oxide buffer layer 21 formed on the glass substrate 10. Here, the heat treatment may be performed in the range of 300° C. to 450° C. in an oxygen gas atmosphere for 30 to 90 minutes.

[0054] Here, the tin oxide semiconductor layer 23 is formed to be thinner than the tin oxide buffer layer 21. For instance, the tin oxide buffer layer 21 is formed in the thickness range of 50 nm to 300 nm, and the tin oxide semiconductor layer 23 may be formed in the thickness range of 5 nm to 20 nm

[0055] According to the method of forming the tin oxide layer 20 according to the embodiment of the present invention, the tin oxide layer 20 is formed by a sputtering method using the tin metal target which facilitates the control of process conditions to form the tin oxide layer 20, and thereby the tin oxide layer 20 can be easily formed on the glass substrate.

[0056] In addition, when forming the tin oxide layer 20 on the glass substrate 10, since the tin oxide semiconductor layer 23 is formed after forming the tin oxide buffer layer 21 on the glass substrate 10, the tin oxide layer 20 including the tin oxide semiconductor layer 23 having suitable charge density, high charge mobility, and excellent stability may be formed on the glass substrate 10.

[0057] In addition, since the tin metal target 71 is used as a target, it is advantageous in that manufacturing cost to form the tin oxide layer 20 on the glass substrate 10 can be saved.

[0058] To find characteristics of the tin oxide layer 20 formed by the forming method according to the embodiment of the present invention, a top-gate field effect transistor 100 according to an embodiment including the tin oxide layer 20 was manufactured as illustrated in FIGS. 6 and 7, and characteristics of the top-gate field effect transistor 100 were tested.

[0059] FIG. 6 is a cross sectional view illustrating the top-gate field effect transistor 100 according to the embodiment including the tin oxide layer 20 formed by the forming method shown in FIG. 2.

[0060] Referring to FIG. 6, the top-gate field effect transistor 100 according to the embodiment includes a glass substrate 10, the tin oxide layer 20 having the tin oxide buffer layer 21 and the tin oxide semiconductor layer 23, a source electrode 30, a drain electrode 40, a gate insulating layer 50, and a gate electrode 60.

[0061] The tin oxide layer 20 is formed on the glass substrate 10. That is, the tin oxide layer 20 includes the tin oxide buffer layer 21 formed on the glass substrate 10, and the tin oxide semiconductor layer 23 formed on the tin oxide buffer layer 21.

[0062] The source electrode 30 and the drain electrode 40 are formed at opposite sides of the tin oxide layer 20 and are formed to cover opposing edge portions of the tin oxide layer 20. For example, indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), Al dopedZinc oxide (AZO), or gallium zinc oxide (GZO), may be used as the source electrode 30 and the drain electrode 40, but the source electrode 30 and the drain electrode 40 are not limited thereto.

[0063] The gate insulating layer 50 is formed to cover the tin oxide layer 20 exposed between the source electrode 30 and the drain electrode 40, and a portion of the source electrode 30 and the drain electrode 40. HfO.sub.2, a silicon dioxide (SiO.sub.x), alumina (Al.sub.2O.sub.3), TiO.sub.x, sapphire, polyvinyl alcohol, polyvinyl acetate, polyimide, parylene, polyvinyl phenol (PVP), acryl, fluoropolymer, polymethyl methacrylate, or the like may be used as the gate insulating layer 50, but the gate insulating layer 50 is not limited thereto.

[0064] In addition, the gate electrode 60 is formed on the gate insulating layer 50, and is formed above the tin oxide layer 20 exposed between the source electrode 30 and the drain electrode 40. ITO, IZO, ITZO, AZO, GZO or the like may be used as the gate electrode 60, but the gate electrode 60 is not limited thereto.

[0065] Descriptions below are with reference to FIGS. 6 and 7 and refer to a method of manufacturing the top-gate field effect transistor 100 according to the embodiment.

[0066] First, the glass substrate 10 is provided.

[0067] Then, in operation S81, the tin oxide buffer layer 21 is formed on the glass substrate 10. The tin oxide buffer layer 21 is formed by reactive sputtering using the tin metal target 71. The tin oxide buffer layer 21 has a composition of SnO.sub.2. That is, the tin oxide buffer layer 21 is formed to have a thickness of 100 nm by reactive sputtering using the tin metal target at a pressure of 15 mTorr, in an atmosphere of oxygen gas and argon gas, and at room temperature. Here, the composition ratio of the oxygen gas to the argon gas may be 6:4.

[0068] Then, in operation 83, the tin oxide semiconductor layer 23 is formed on the tin oxide buffer layer 21. The tin oxide semiconductor layer 23 is formed by reactive sputtering using the tin metal target. The tin oxide semiconductor layer 23 has a composition of SnO.sub.2−x.

[0069] That is, the tin oxide semiconductor layer 23 is formed to have a thickness of 10 nm by reactive sputtering using the tin metal target at a pressure of 2 mTorr and in a mixed atmosphere of oxygen gas and argon gas at room temperature. Here, the composition ratio of the oxygen gas to the argon gas may be 6:4.

[0070] Operations S81 and S83 are performed consecutively, and the tin oxide buffer layer 21 and the tin oxide semiconductor layer 23 are formed sequentially by regulating pressure while maintaining the supply ratio of the oxygen gas to the argon gas as 6:4.

[0071] Here, the supply quantity of oxygen gas in the formation of the tin oxide buffer layer 21 is more than the supply quantity of oxygen gas in the formation of the tin oxide semiconductor layer 23. That is, when forming the tin oxide buffer layer 21, in the case of a pressure of 15 mTorr, a pressure ratio of the argon gas to the oxygen gas is 6 mTorr : 9 mTorr. When forming the tin oxide semiconductor layer 23, in the case of a pressure of 2 mTorr, the pressure ratio of the argon gas to the oxygen gas is 0.8 mTorr : 1.2 mTorr.

[0072] Then, in operation S85, the tin oxide layer 20 is formed by a first heat treatment on the tin oxide semiconductor layer 23 and the tin oxide buffer layer 21 formed on the glass substrate 10. The first heat treatment is performed at 400° C. in an oxygen gas atmosphere for 60 minutes.

[0073] After the first heat treatment according to operation S85, a patterning is performed on the tin oxide layer 20.

[0074] Then, in operation S87, the source electrode 30 and the drain electrode 40 are formed at opposite sides of the tin oxide layer 20 to cover an edge portion of the tin oxide layer 20. The source electrode 30 and the drain electrode 40 are formed to have a thickness of 50 nm using ITO.

[0075] Then, in operation S89, the gate insulating layer 50 is formed between the source electrode 30 and the drain electrode 40. The gate insulating layer 50 is formed to cover the tin oxide layer 20 exposed between the source electrode 30 and the drain electrode 40, and a portion of the source electrode 30 and the drain electrode 40. The gate insulating layer 50 is formed to have a thickness of 80 nm using HfO.sub.2. Here, the reason of using HfO.sub.2 for the gate insulating layer 50 is due to better depletion properties of HfO.sub.2 as compared to Al.sub.2O.sub.3.

[0076] Then, in operation S91, a second heat treatment is performed at 400° C. in an oxygen gas atmosphere for 120 minutes.

[0077] In addition, in operation S93, the gate electrode 60 is formed on the gate insulating layer 50. Here, the gate electrode 60 is formed above the tin oxide layer 20 exposed between the source electrode 30 and the drain electrode 40. The gate electrode 60 is formed to have a thickness of 50 nm using the ITO.

[0078] FIGS. 8 and 9 are current-voltage characteristics of the top-gate field effect transistor 100 manufactured according to the above-described embodiment. Here, FIGS. 8 and 9 are current-voltage characteristics graphs of the top-gate field effect transistor shown in FIG. 6.

[0079] Referring to FIG. 8, according to the embodiment of the top-gate field effect transistor, a top-gate field effect transistor having the tin oxide layer 20 which featured 15.3 cm.sup.2/Vs of charge mobility at a pressure condition of 2 mTorr was manufactured.

[0080] It may be verified through FIG. 8 that the top-gate field effect transistor according to the embodiment effectively performs an operation of accumulating or losing electric charge according to an electric field.

[0081] Referring to FIG. 9, I.sub.DS-V.sub.GS of the top-gate field effect transistor according to the embodiment were measured below. That is, a result of measuring in the voltage range of the gate electrode from −5 V to 5 V and setting V.sub.DS to 1 V, the charge mobility was calculated as 16.3 cm.sup.2/Vs, which was the same level as the charge mobility of 15.3 cm.sup.2/Vs of the thin film of the tin oxide layer formed on the glass.

[0082] It may be verified that the top-gate field effect transistor including the tin oxide layer using the tin metal target has good charge mobility.

[0083] Meanwhile, the embodiments disclosed in this specification and the drawings are merely for providing a specific example for better understanding, but are not for limiting the scope of the present invention. Besides the embodiments disclosed here, it should be obvious to those skilled in the art that various changes and modifications may be made in these embodiments based on the technical concept and sprit of the invention.

REFERENCE NUMERALS

[0084] 10: GLASS SUBSTRATE [0085] 20: TIN OXIDE LAYER [0086] 21: TIN OXIDE BUFFER LAYER [0087] 23: TIN OXIDE SEMICONDUCTOR LAYER [0088] 30: SOURCE ELECTRODE [0089] 40: DRAIN ELECTRODE [0090] 50: GATE INSULATING LAYER [0091] 60: GATE ELECTRODE [0092] 70: SPUTTERING APPARATUS [0093] 71: TIN METAL TARGET [0094] 100: TOP-GATE FIELD EFFECT TRANSISTOR