The present description concerns a method of manufacturing a device comprising at least one radio frequency component on a semiconductor substrate comprising: a) a laser anneal of a first thickness of the substrate on the upper surface side of the substrate; b) the forming of an insulating layer on the upper surface of the substrate; and c) the forming of said at least one radio frequency component on the insulating layer.

A method of forming a semiconductor device is provided. The method includes providing a substrate having a first region and a second region; forming a plurality of trenches in the first region of the substrate; forming a multi-layer stack over the substrate and in the trenches; and patterning the multi-layer stack and the substrate to form first nanostructures over first fins in the first region and second nanostructures over second fins in the second region, where the multi-layer stack includes at least one of first semiconductor layers and at least one of second semiconductor layer stacked alternately, and the plurality of trenches are in corresponding ones of the first fins.

A semiconductor structure is provided. The semiconductor structure includes a first nanostructure stacked over and spaced apart from a second nanostructure, a gate stack wrapping around the first nanostructure and the second nanostructure, a source/drain feature adjoining the first nanostructure and the second nanostructure, and a first inner spacer layer interposing the gate stack and the source/drain feature and interposing the first nanostructure and the second nanostructure. A dopant in the source/drain feature has a first concentration at an interface between the first inner spacer layer and the source/drain feature and a second concentration at a first distance away from the interface. The first concentration is higher than the second concentration.

A semiconductor structure is provided. The semiconductor structure includes a first nanostructure stacked over and spaced apart from a second nanostructure, a gate stack wrapping around the first nanostructure and the second nanostructure, a source/drain feature adjoining the first nanostructure and the second nanostructure, and a first inner spacer layer interposing the gate stack and the source/drain feature and interposing the first nanostructure and the second nanostructure. A dopant in the source/drain feature has a first concentration at an interface between the first inner spacer layer and the source/drain feature and a second concentration at a first distance away from the interface. The first concentration is higher than the second concentration.

An electronic device comprises a semiconductor die, a layer stack disposed on the semiconductor die and comprising one or more functional layers, wherein the layer stack comprises a protection layer which is an outermost functional layer of the layer stack, and a sacrificial layer disposed on the protection layer, wherein the sacrificial layer comprises a material which decomposes or becomes volatile at a temperature between 100° and 400° C.

An electronic device comprises a semiconductor die, a layer stack disposed on the semiconductor die and comprising one or more functional layers, wherein the layer stack comprises a protection layer which is an outermost functional layer of the layer stack, and a sacrificial layer disposed on the protection layer, wherein the sacrificial layer comprises a material which decomposes or becomes volatile at a temperature between 100° and 400° C.

A display panel includes a base layer, a signal line which is disposed on the base layer and includes a first layer including aluminum and a second layer disposed directly on the first layer and consisting of niobium, a first thin film transistor connected to the signal line, a second thin film transistor disposed on the base layer, a capacitor electrically connected to the second thin film transistor, and a light emitting element electrically connected to the second thin film transistor.

A heat treatment apparatus includes: a processing container configured to accommodate and process a plurality of substrates in multiple tiers under a reduced-pressure environment; a first heater configured to heat the plurality of substrates accommodated in the processing container; a plurality of gas supply pipes configured to supply a gas to positions having different heights in the processing container; and a second heater provided on a gas supply pipe that supplies a gas to a lowermost position among the plurality of gas supply pipes, and configured to heat the gas in the gas supply pipe.

A heat treatment apparatus includes: a processing container configured to accommodate and process a plurality of substrates in multiple tiers under a reduced-pressure environment; a first heater configured to heat the plurality of substrates accommodated in the processing container; a plurality of gas supply pipes configured to supply a gas to positions having different heights in the processing container; and a second heater provided on a gas supply pipe that supplies a gas to a lowermost position among the plurality of gas supply pipes, and configured to heat the gas in the gas supply pipe.

The disclosure relates to a method of joining two semi-conductor substrates by molecular adhesion comprising: a step a) of bringing a first and a second substrate into intimate contact in order to form an assembly having a bonding interface; a step b) of reaction-annealing the bonding interface at a first temperature higher than a predetermined first temperature, this step b) generating bubbles at the joining interface; a step c) of at least partially debonding the two substrates at the bonding interface in order to eliminate the bubbles; and a step d) of bringing the first and the second substrate into intimate contact at the bonding interface in order to reform the assembly.