Pixel array of a thermal pattern sensor, sensor associates with coil heating lines

Abstract

The invention relates to a pixel matrix of a thermal pattern sensor comprising several rows and several columns of pixels, said matrix comprising: an active thermal element formed by a thermosensitive material disposed between a lower layer and an upper layer, the lower layer being constituted by a plurality of first tracks made of electrically conductive material and extending along a first direction, said first tracks forming pixel columns; a heating element, disposed on the active thermal element and forming a serpentine path, said heating element being constituted by a plurality of second tracks (L1, L2, L3, L4, L5, L6) made of electrically conductive material and connecting segments (w1, w2, w3, w4, w5, w6) made of electrically conductive material connected to the ends of the second tracks (L1, L2, L3, L4, L5, L6), said second tracks (L1, L2, L3, L4, L5, L6) extending in a second direction different from the first direction and forming lines of pixels, the second tracks being connected except for the first and last second tracks (L1, L2, L3, L4, L5, L6), by their respective ends to one of the ends of a second preceding track and a second following track by way of said connecting segments (w1, w2, w3, w4, w5, w6), the first and last second tracks each having a free end connected to a connecting segment.

Claims

1. A thermal pattern sensor including: a support (S); a pixel matrix (1′), disposed on the support (S); an integrated circuit (2′) disposed under the support (S), the pixel matrix comprising several rows and several columns of pixels, said matrix comprising: an active thermal element (10, 20, 30) formed by a thermosensitive material (20) disposed between a lower layer (10, c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.N) and an upper layer (30, Es), the lower layer (10, c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.N) being constituted by a plurality of first tracks made of electrically conductive material and extending along a first direction, said first tracks forming pixel columns; a heating element (50), disposed on the active thermal element (10, 20, 30) and forming a serpentine path, said heating element being constituted by a plurality of second tracks (L1, L2, L3, L4, L5, L6) made of electrically conductive material and is also constituted by connecting segments (w1, w2, w3, w4, w5, w6) made of electrically conductive material connected to the ends of the second tracks (L1, L2, L3, L4, L5, L6), the connecting segments connecting second tracks (L1, L2, L3, L4, L5, L6) to one another, said second tracks (L1, L2, L3, L4, L5, L6) extending in a second direction different from the first direction and forming lines of pixels, the second tracks being connected except for the first and last second tracks (L1, L2, L3, L4, L5, L6), by their respective ends to one of the ends of a second preceding track and a second following track by way of said connecting segments (w1, w2, w3, w4, w5, w6), the first and last second tracks each having a free end connected to a connecting segment, the control circuit being connected to the pixel matrix (1′) by routing lines (lm, zm) made of an electrically conductive material extending from each of the segments.

2. The thermal pattern sensor as claimed in claim 1, wherein the second direction is perpendicular to the first direction.

3. The thermal pattern sensor as claimed in claim 1 or claim 2, comprising the following successive layers, deposited on a substrate (S), a first layer (10) made of electrically conductive material comprising the first tracks constituting the electrode; a second layer (20) made of thermosensitive material covering the first tracks and leaving clear at least a part of the first tracks; a third layer (30) made of electrically conductive material superimposed on the second layer, said third layer constituting the second electrode; a fourth layer (40) made of dielectric material superimposed on the third layer; a fifth layer (50) made of electrically conductive material comprising the heating element constituted by the plurality of second tracks and the connecting segments; a sixth protective layer (60).

4. The thermal pattern sensor as claimed in claim 1, wherein the active thermal element is a pyroelectric capacitor, said thermosensitive material being a pyroelectric material (20), the lower layer (10) forming a lower electrode and the upper layer forming an upper electrode.

5. The thermal pattern sensor as claimed in claim 1, wherein the active thermal element is constituted by diodes or thermistors.

6. The thermal pattern sensor as claimed in claim 1, wherein the routing lines (lr) and the connecting segments are disposed on different layers, the contact between the routing lines and the connecting segments being made by vias.

7. The thermal pattern sensor as claimed in claim 1, wherein the routing lines and the connecting segments are made on the same layer.

8. The thermal pattern sensor as claimed in claim 7, wherein the integrated circuit (2′) is configured to let a time period T elapse between two powerings of two successive segments, a time period T during which all the segments are set to the same potential.

9. The thermal pattern sensor as claimed in claim 1, wherein the integrated circuit (2′) is configured to set each of the routing lines to a zero potential, i.e. to the ground, or +Vcc in order to allow the heating of one or more second tracks at once.

10. The thermal pattern sensor as claimed in claim 1, wherein the integrated circuit (2′) is configured to make it possible to heat one line after another by applying a first same potential to the first segment corresponding to the line in the direction of the serpentine path and to the segments above and by applying a second potential, preferably different from the first, to the segments below.

Description

OVERVIEW OF THE FIGURES

(1) Other features, aims and advantages of the invention will become apparent from the following description, which is purely illustrative and non-limiting, and which must be read with reference to the appended drawings wherein, besides FIGS. 1 to 2 already discussed:

(2) FIGS. 3, 3′ and 3″ illustrate a pixel matrix according to different embodiments of the invention;

(3) FIGS. 4 and 5 illustrate two examples of arrangement of vias and routing lines of a sensor according to the invention;

(4) FIG. 6 illustrates a stack of layers of a sensor according to the invention. On all the figures similar elements bear identical reference numbers.

DETAILED DESCRIPTION OF THE INVENTION

(5) A sensor according to the invention has the same structure as that in the introduction and comprises a support S comprising a lower surface S.sub.0 and an upper surface S.sub.1. Such a support S is for example a substrate made of PET or PEN or PI or else of CIU type (ABF, FR4) or else made of glass.

(6) On the upper surface S.sub.1 is disposed a sensitive element 1′, a top view of which is illustrated in FIG. 3 and is constituted by a pixel matrix comprising several rows and several columns of pixels.

(7) On the lower surface S0 are disposed an integrated circuit 2′ such as an ASIC, an element 4 (optional) and where applicable contacts 3 making it possible to connect the sensor to the contacts of a chip card when such a sensor is disposed on such a card. Of course, it can be connected to other systems (telephone, access control terminal etc.)

(8) The invention described here notably aims to replace the pixel matrix 1 of FIGS. 1 and 2 with the pixel matrix 1′ which will be described below, particularly in order to facilitate the connection of the pixel matrix by avoiding having complex routing lines. Such a pixel matrix 1′ is illustrated in FIG. 3.

(9) The matrix illustrated on FIG. 3 particularly comprises the following elements. An active thermal element formed by a thermosensitive material 20 disposed between a lower layer 10 and an upper layer 30. Preferably the active thermal element is a pyroelectric capacitor formed by a pyroelectric material disposed between a lower electrode c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.N and an upper electrode, Es. The lower electrode c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.N is constituted by a plurality of first tracks made of electrically conductive material which extend along a first direction. These first tracks form pixel columns.

(10) A heating element Ec which forms a serpentine trace and which is constituted by a plurality of second tracks L1, L2, L3, L4, L5, L6 made of electrically conductive material and connecting segments w1, w2, w3, w4, w5, w6 made of electrically conductive material connected to the ends of the first tracks L1, L2, L3, L4, L5, L6.

(11) The first tracks L1, L2, L3, L4, L5, L6 extend in a second direction, different from the first direction, and form lines of pixels. Advantageously, the second direction is perpendicular to the first direction. Furthermore, as will be further discussed below, the heating element Ec is above the pyroelectric material and is therefore not at the same level as that of the lower electrode c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.N. Furthermore, the lines are straight here but this is not compulsory. Other shapes, for example zig-zags, can be envisioned.

(12) It is the serpentine path of the heating element that makes it possible to facilitate the connection.

(13) Specifically, this serpentine shape is made by connecting the rows pairwise, with the exception of the first and second rows of the pixel matrix 1′.

(14) In particular, the rows are connected with the exception of the first and last, by their respective ends to one of the ends of a preceding row and of a following row by way of the connecting segments w1, w2, w3, w4, w5, w6, the first and second rows having a free end connected to a connecting segment.

(15) For example on the example of FIG. 3: The left end of the row L1 is connected alone to the segment w1; The right end of the row L1 is connected with the right end of the row L2 to a segment w2; The left end of the row L2 is connected with the left end of the row L3 to a segment w3; The right end of the row L3 is connected with the right end of the row L4 to a segment w4; The left end of the row L4 is connected with the left end of the row L5 to a segment w5; The right end of the row L5 is connected with the right end of the row L6 to a segment w6; The left end of the row L6 is connected alone to a segment w7.

(16) Thus, it appears that on each side of the matrix, the pitch between two adjacent segments is the double of that of the rows. Consequently, the connection of the matrix is therefore facilitate as it is less dense than if all the rows had to be connected. This is true whatever the type of connection chosen: contact with the routing tracks if they are made at another level (the alignment and/or resolution requirements of this other level are relaxed) or with vias toward a metallic level on one face of the substrate which is not that directly in contact with the matrix. Concerning the columns c.sub.1, c.sub.2, c.sub.3, c.sub.4, c.sub.N, they are meanwhile each connected to routing lines.

(17) In FIG. 3, the connecting segments are connected to routing lines Ir themselves connected to vias v which are preferably aligned.

(18) Still on this FIG. 3, the vias associated with each column are on the same side of the matrix but of course, provision can be made for them to be alternately on one side or the other, or else distributed irregularly on one side or the other of the matrix depending on the restrictions related to the connection of the matrix.

(19) In this way the vias are distributed on each side of the pixel matrix and not on a single side as could be the case in particular of the pixel matrix of FIG. 2, where all the vias were of necessity on the side of the free end of the row of each heating element.

(20) Alternatively, as illustrated in FIGS. 3′ and 3″, the integrated circuit 2′ is placed on the same face as the pixel matrix 1′ and preferably beside the pixel matrix 1′. In this case, it is favorable for the integrated circuit 2′ to be assembled by flip-chip technology on a single metal level, for example the level embodying the columns (layer 10). It is then still necessary to make contacts between the metal level embodying the rows constituting the heating element (layer 50) and the connecting segments and the routing lines located on the same layer as the columns (layer 10).

(21) As a replacement for the routing lines and the vias of FIG. 3, here provision is made for routing elements zm located on the same layer as the columns c.sub.2, c.sub.3, c.sub.4, c.sub.N which are in contact with the metal segments.

(22) Such a configuration makes it possible to relax restrictions on the alignment tolerances which are lower than when routing lines and vias are used.

(23) FIG. 4 illustrates an example of arrangement of the routing lines from the connecting segments of the heating element and the vias that extend from the routing lines. There is an alternation of routing lines of different dimensions, while the vias are of identical dimensions. With such an arrangement, provision can be made for vias of a diameter of 150 μm and routing lines of a thickness of 60 μm. Furthermore, the matrix typically has a pitch of 80 μm.

(24) FIG. 5 illustrates an example of an arrangement on which the vias have a diameter of 130 μm with a spacing of 30 μm. Unlike the arrangement of FIG. 4 the vias are aligned with a pitch of 160 μtwice the pitch of 80 μm of the lines of the heating element (thickness of 40 μm and spacing of 40 μm).

(25) In order to control the different lines of the heating element to heat them, provision must be made for a control logic taking into account the pairwise connection of the rows. To do this, the integrated circuit is programmed to set each of the rows to a potential of zero or +Vcc in order to permit the heating of one or more rows at once. Furthermore, between two heatings of rows, the integrated circuit is preferably programmed to let a cooling time elapse that is longer than the time period during which the rows are heated. To do this, the integrated circuit 2′ is configured to allow a time period T to elapse between two powerings of two successive segments, a time period T during which all the segments are set to the same potential.

(26) Below is a description of a control logic according to several heating configurations.

(27) To heat a single row it is necessary that, in the direction of the serpentine path, the first segment corresponding to the row to be heated be at a first potential (for example +Vcc) as well as the preceding segments, while the following segments are set to a second potential (for example to the ground).

(28) According to this logic it is therefore possible to heat each row one after another in a sort of voltage wave that propagates along the serpentine path (from top to bottom in FIG. 3).

(29) The logic can be as follows: off: all to the ground; row L1: w1=Vcc, w2 w3 w4 w5 w6 w7=ground; row L2: w1 w2=Vcc, w3 w4 w5 w6 w7=ground; row L3: w1 w2 w3=Vcc, w4 w5 w6 w7=ground; row L4: w1 w2 w3 w4=Vcc, w5 w6 w7=ground; row L5: w1 w2 w3 w4 w5=Vcc, w6 w7=ground; row L6: w1,2,3,4,5,6=Vcc, w7=ground; off: all to the ground or all to Vcc.

(30) When all the rows are heated one after another, it may be advantageous to leave the row that has just been heated to cool before heating the next one.

(31) The logic can therefore be as follows: off: all to the ground; row L1: w1=Vcc, w2 w3 w4 w5 w6 w7=ground during 1 ms (for example); off: all to the ground during 3 ms (for example); row L2: w1 w2=Vcc, w3 w4 w5 w6 w7=ground; off: all to the ground; row L3: w1 w2 w3=Vcc, w4 w5 w6 w7=ground; off: all to the ground row L4: w1 w2 w3 w4=Vcc, w5 w6 w7=ground; off: all to the ground row L5: w1 w2 w3 w4 w5=Vcc, w6 w7=ground; off: all to the ground row L6: w1 w2 w3 w4 w5 w6=Vcc, w7=ground; off: all to the ground (it is possible to go back to row 1 to start again).

(32) The order of heating of the rows is not limiting and it is possible to heat the rows out of order. This is especially beneficial in the case of an active matrix (with selection and/or amplification elements in each pixel).

(33) To heat several rows at once, the logic can be the following, which involves the heating of rows L1 and L3 at once: w1=Vcc; w2=ground; w3=ground; w4 w5 w6 w7=Vcc.

(34) According to this logic there is a change of voltage across the terminals of any row that must heat up. Thus, the starting point is an end (for example w1) with an arbitrary voltage (for example Vcc or ground) and if the first must be heated then the voltage for the following segment is changed (w2 is set to the ground if w1 is set to Vcc for example) otherwise the same voltage is retained, and so on for the following rows.

(35) To heat all the rows at once a first same potential is applied to all the segments located on one and the same side of the pixel matrix, while also applying a second different potential to all the segments located on one and the same side opposite the side to which the first same potential is applied.

(36) For example, in relation to FIG. 3, all the even-numbered segments (on the right) are set to Vcc, and all the odd-numbered ones (on the left) to the ground.

(37) It is also possible to set the last segment w7 to the ground and the first segment w1 to Vcc (or else a higher voltage), having been careful to set all the other segments to “high impedance”, i.e. that no potential is applied (it is necessary to use 3-state drivers: either ground, or Vcc, or nothing (the 2 transistors of the output inverter that controls the connecting segments are not conductive).

(38) This configuration makes it possible to check the continuity of the serpentine shape and therefore of all the rows in a single measurement (whereas with the preceding structure of FIG. 2, it was advisable to test each row).

(39) The above matrix that is shown comprises, as illustrated in FIG. 6, several successive layers, disposed on the upper surface S1 of the support S, which is preferably a substrate made of PET, PEN, PI or else of CIU type (ABFn, FR4, . . . ) or else made of glass.

(40) The support S has a thickness between 75 and 200 μm when it is made of PET or PEN. When it is made of PI, the thickness of the support S can be between 20 and 100 μm, typically 25 μm. When it is made of glass, the thickness of the support S is typically between 300 and 700 μm.

(41) A first layer 10 is constituted by a pattern made of electrically conductive material (for example, Au, Ag, Al or Cu) including the columns. A second layer 20 is constituted by a pyroelectric material composed of a copolymer P(VDF-TrFE) (Poly(vinylidene fluoride-co-trifluoroethylene)) which covers the columns of the first layer 10. The third layer 30 is made of electrically conductive material (for example, Au, Ag, Al or Cu). The fourth layer 40 is made of dielectric material. The fifth layer 50 is constituted by a pattern made of electrically conductive material delineating the heating element (for example, Au, Ag, Al or Cu). The sixth layer 60 is a protective layer made of polymer material (for example acrylate or siloxane) where applicable filled with inorganic particles (e.g. SiO2 or TiO2), or an inorganic layer such as DLC (Diamond-like carbon), SiO2 or Al2O3 or a stack of several layers. Advantageously, the different layers have the following thicknesses:

(42) First layer 10: less than 1 μm, typically between 50 nm and 250 nm or else between 3 μm and 15 μm.

(43) Second layer 20: between 2 and 5 μm

(44) Third layer 30: less than 1 μm, typically between 50 nm and 700 nm

(45) Fourth layer 40: between 0.5 nm and 1.5 μm

(46) Fifth layer between 50 nm and 3 μm;

(47) Sixth layer between 1 and 25 μm or 50 μm or 10 μm.

(48) The second, third, fourth, fifth and sixth layers are considered as thin films given their thickness and make it possible to provide quick transfer of heat along a vertical axis of the matrix. Furthermore, when the layer has a thickness of less than 1 μm then this layer is considered as thin which facilitates the production of the matrix. The first layer 10 (lower electrode), the second layer 20 and the third layer 30 (upper electrode) constitute the pyroelectric capacitance and the fifth layer 50 constitutes the heating element.

(49) Alternatively, the third and fifth layers can be exchanged or else merged (if the fourth layer 40 between the two is removed).

(50) Of course, the matrix and the sensor described here are not limited to those based on PVDF but can be adapted to other types of thermal sensor.