Abstract
There is disclosed a multi-band reconfigurable antenna device having at least one radiating element. The radiating element is connected to a single port by way of at least first and second matching circuits arranged in parallel. A high pass filter is provided between the first matching circuit and the radiating element so as to allow passage of a first, higher frequency RF signal through the first matching circuit. A low pass filter is provided between the second matching circuit and the at least one radiating element so as to allow passage of a second, lower frequency RF signal through the second matching circuit. The high pass filter blocks passage of the second, lower frequency RF signal through the first matching circuit, and the low pass filter blocks passage of the first, higher frequency RF signal through the second matching circuit. The first and second matching circuits are adjustable independently of each other so as to allow the first and second RF signals to be tuned independently of each other.
Claims
1. A multi-band reconfigurable antenna device comprising: at least one radiating element having a single feed, the single feed of the at least one radiating element being connected to a single port by way of at least first and second matching circuits arranged in parallel, wherein a high pass filter is provided between the first matching circuit and the single feed so as to allow passage of a first, higher frequency RF signal through the first matching circuit, wherein a low pass filter is provided between the second matching circuit and the single feed so as to allow passage of a second, lower frequency RF signal through the second matching circuit, wherein the high pass filter blocks passage of the second, lower frequency RF signal through the first matching circuit, and wherein the low pass filter blocks passage of the first, higher frequency RF signal through the second matching circuit, the first and second matching circuits being adjustable independently of each other so as to allow the first and second RF signals to be simultaneously dynamically tuned independently of each other before the first and second RF signals are applied together to the single port for subsequent signal processing.
2. A device as claimed in claim 1, further comprising a conductive groundplane.
3. A device as claimed in claim 2, wherein the first and second RF signals of different frequencies excite first and second simultaneous different resonances on the groundplane.
4. A device as claimed in claim 3, wherein the matching circuit and groundplane geometry are configured such that the first and second simultaneous resonances comprise surface currents distributed over different regions of the groundplane so as to reduce interactions with each other.
5. A device as claimed in claim 1, wherein the at least one radiating element is connected to a first high pass filter and a first low pass filter arranged in parallel, and wherein each of the first high pass filter and the first low pass filter is connected to a respective second high pass filter and a respective second low pass filter, each of which is connected to an independent matching circuit.
6. A device as claimed in claim 1, wherein the at least one radiating element is connected to a first high pass filter and a first low pass filter arranged in parallel, wherein each of the first high pass filter and the first low pass filter is connected to a respective second high pass filter and a respective second low pass filter, and wherein each of the second high pass filters and second low pass filters is connected to a respective third high pass filter and a respective third low pass filter, each of which is connected to an independent matching circuit.
7. A device as claimed in claim 1, in combination with a mixed signal RF module connected to the port.
8. (canceled)
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Embodiments of the invention are further described hereinafter with reference to the accompanying drawings, in which:
[0021] FIG. 1 shows an antenna suitable for use with embodiments of the present invention;
[0022] FIG. 2 shows a system block of a first embodiment;
[0023] FIG. 3 shows a first exemplary circuit schematic for the first embodiment;
[0024] FIG. 4 shows a first return loss plot for the first embodiment;
[0025] FIG. 5 shows a second return loss plot for the first embodiment;
[0026] FIG. 6 shows a second exemplary circuit schematic for the first embodiment;
[0027] FIG. 7 shows a third exemplary circuit schematic for the first embodiment;
[0028] FIG. 8 shows a fourth exemplary circuit schematic for the first embodiment;
[0029] FIG. 9 shows a system block of a second embodiment;
[0030] FIG. 10 shows an exemplary circuit schematic for the second embodiment;
[0031] FIG. 11 shows a return loss plot for the second embodiment;
[0032] FIG. 12 shows a system block of a third embodiment;
[0033] FIG. 13 shows an exemplary circuit schematic for the third embodiment; and
[0034] FIG. 14 shows a return loss plot for the third embodiment.
DETAILED DESCRIPTION
[0035] FIG. 1 shows an example of an antenna that may be used with the present invention. There is provided a substrate 1, for example a PCB, having a conductive groundplane 2 over a majority of one surface thereof. One end of the substrate 1 is free of the groundplane 2, and is provided with a radiating element 3 formed as a conductive strip. The radiating element 3 is fed at a feed point 4, which is connected to matching circuitry and a signal port (not shown) mounted on the substrate 1. In this particular example, the radiating element 3 is an unbalanced chassis antenna that is driven against the groundplane 2, but other antennas, including balanced antennas, monopoles, dipoles, PIFAs, PILAs, loop antennas etc. may be used with certain embodiments.
[0036] FIG. 2 is a system block showing a first embodiment. An antenna 5 (for example as shown in FIG. 1) is connected to a high pass filter 6 and a low pass filter 7 that are arranged in parallel. The high pass filter 6 is in turn connected to a first matching circuit 8, and the low pass filter 7 to a second matching circuit 9. The first and second matching circuits 8, 9 are arranged in parallel, and are both in turn connected to a single signal port 10. The high pass filter 6 allows passage of a first, higher frequency RF signal through the first matching circuit 8. The low pass filter 7 allows passage of a second, lower frequency RF signal through the second matching circuit 9. The high pass filter 6 blocks passage of the second, lower frequency RF signal through the first matching circuit 8, and the low pass filter 7 blocks passage of the first, higher frequency RF signal through the second matching circuit 9. The first and second matching circuits 8, 9 are adjustable independently of each other so as to allow the first and second RF signals to be tuned independently of each other.
[0037] FIG. 3 is a circuit schematic showing details of one possible implementation of the system block of FIG. 2. The high pass filter 6 may be configured as a capacitor 11, and the low pass filter 7 may be configured as an inductor 12. The first matching circuit 8 may comprise an inductor 13 in series with a variable capacitor 14, with a connection to ground by way of a further inductor 15 and a connection 16 to the signal port 10. The second matching circuit 9 is similarly configured, comprising an inductor 13′ in series with a variable capacitor 14′, with a connection to ground by way of a further inductor 15′ and a connection 16′ to the signal port 10.
[0038] FIG. 4 shows an S11 return loss plot showing how the first, higher frequency RF signal can be tuned between 1500 MHz and 2700 MHz while the second, lower frequency RF signal is kept tuned to 700 MHz. This is done by adjusting the variable capacitor 14 in the first matching circuit 8.
[0039] FIG. 5 shows an S11 return loss plot showing how the second, lower frequency RF signal can be tuned between 700 MHz and 960 MHz while the first, higher frequency RF signal is kept tuned to 1500 MHz. This is done by adjusting the variable capacitor 14′ in the second matching circuit 9.
[0040] FIG. 6 is a circuit schematic showing an alternative implementation to that of FIG. 3, where the high pass filter 6 includes an additional inductive connection 17 to ground, and the low pass filter 7 includes an additional capacitive connection 18 to ground.
[0041] FIG. 7 is a circuit schematic showing a further alternative implementation to that of FIG. 3, where the variable capacitor 14, 14′ in each matching circuit 8, 9 is provided on one side with a connection to ground by way of an inductor 19, 19′ and a variable capacitor 20, 20′, and on the other side with a connection to ground by way of an inductor 21, 21′ and a variable capacitor 22, 22′.
[0042] FIG. 8 is a circuit schematic showing a further alternative implementation, in which the first matching circuit 8 is configured as in FIG. 7, and the second matching circuit 9 is configured as in FIG. 3.
[0043] FIG. 9 is a system block showing a further development. Here, the mixed RF signal from the antenna 5 is split by a first high pass filter 23 and a first low pass filter 24. The first high pass filter 23 is in turn connection to a high pass filter 6 and a low pass filter 7 that are arranged in parallel. The high pass filter 6 is connected to a first matching circuit 8, and the low pass filter 7 to a second matching circuit 9. The first and second matching circuits 8, 9 are arranged in parallel, and are both in turn connected to a single signal port 10. The first low pass filter 24 is in turn connection to a high pass filter 6′ and a low pass filter 7′ that are arranged in parallel. The high pass filter 6′ is connected to a first matching circuit 8′, and the low pass filter 7′ to a second matching circuit 9′. The first and second matching circuits 8′, 9′ are arranged in parallel, and are both in turn connected to a single signal port 10. In this way, four separate RF signals can be independently tuned by the four matching circuits 8, 9, 8′, 9′.
[0044] FIG. 10 shows a circuit schematic illustrating one possible way in which the system block of FIG. 9 may be implemented, which will be understood with reference to
[0045] FIG. 3.
[0046] FIG. 11 shows a return loss plot for the embodiment of FIGS. 9 and 10. Four RF signals are shown, respectively at 710 MHz, 1560 MHz, 2360 MHz and 3540 MHz. Each of these RF signals is tuneable independently of the others by adjusting the variable capacitor(s) in the respective matching circuits 8, 9, 8′, 9′.
[0047] FIG. 12 is a system block showing a further development. Here, the mixed RF signal from the antenna 5 is split by a first high pass filter 25 and a first low pass filter 26. The first high pass filter 25 is in turn connection to a second high pass filter 23 and a second low pass filter 24. The first low pass filter 26 is in turn connected to a second high pass filter 23′ and a second low pass filter 24′. Each of the second high pass filters 23, 23′ and low pass filters 24, 24′ are in turn connected to a high pass filter 6, 6′, 6″, 6′″ and a low pass filter 7, 7′, 7″, 7′″ that are arranged in parallel. Each high pass filter 6, 6′, 6″, 6′″ is connected to a respective matching circuit 8, 8′, 8″, 8′″, and each low pass filter 7, 7′, 7″, 7′″ to a respective matching circuit 9, 9′, 9″, 9′″.
[0048] It will be understood that additional high pass and low pass filters may be provided following this pattern so as to allow any given number of independent matching circuits to be implemented.
[0049] FIG. 13 shows a circuit schematic illustrating one possible way in which the system block of FIG. 12 may be implemented, which will be understood with reference to FIGS. 3 and 10.
[0050] FIG. 14 shows a return loss plot for the embodiment of FIGS. 12 and 13. Eight RF signals are shown, respectively at 700 MHz, 1270 MHz, 1540 MHz, 2080 MHz, 2930 MHz, 3440 MHz, 3810 MHz and 4360 MHz. Each of these RF signals is tuneable independently of the others by adjusting the variable capacitor(s) in the respective matching circuits 8, 9, 8′, 9′, 8″, 9″, 8′″, 9′″.
[0051] Throughout the description and claims of this specification, the words “comprise” and “contain” and variations of them mean “including but not limited to”, and they are not intended to (and do not) exclude other moieties, additives, components, integers or steps. Throughout the description and claims of this specification, the singular encompasses the plural unless the context otherwise requires. In particular, where the indefinite article is used, the specification is to be understood as contemplating plurality as well as singularity, unless the context requires otherwise.
[0052] Features, integers, characteristics, compounds, chemical moieties or groups described in conjunction with a particular aspect, embodiment or example of the invention are to be understood to be applicable to any other aspect, embodiment or example described herein unless incompatible therewith. All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive. The invention is not restricted to the details of any foregoing embodiments. The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.
[0053] The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.
