Manufacturable spin and spin-polaron interconnects

Abstract

Manufacturable spin and spin-polaron interconnects are disclosed that do not exhibit the same increase in resistivity shown by Cu interconnects associated with decreasing linewidth. These interconnects rely on the transmission of spin as opposed to charge. Two types of graphene based interconnect approaches are explored, one involving the injection and diffusive transport of discrete spin-polarized carriers, and the other involving coherent spin polarization of graphene charge carriers due to exchange interactions with localized substrate spins. Such devices are manufacturable as well as scalable (methods for their fabrication exist, and the interconnects are based on direct growth, rather than physical transfer or metal catalyst formation). Performance at or above 300 K, as opposed to cryogenic temperatures, is the performance criteria.

Claims

1. An interconnect for connecting two electrical transistors of an integrated circuit that are otherwise electrically insulated from each other, comprising: a film of ferromagnetic material deposited on a substrate; a film of boron nitride of at least one atomic layer thickness overlaying said film of ferromagnetic material; a film of graphene overlaying said film of boron nitride; and wherein said interconnect extends from one of said transistors to a second of said transistors.

2. The interconnect of claim 1, wherein said boron nitride is at least two atomic layers thick.

3. The interconnect of claim 1, wherein said ferromagnetic material is selected from the group consisting of ruthenium, cobalt, nickel, iron and mixtures and alloys thereof.

4. The interconnect of claim 3, wherein said ferromagnetic material comprises cobalt.

5. An interconnect for connecting two electrical transistors of an integrated circuit formed on a silicon base that are otherwise electrically insulated from each other, said interconnect comprising: a film of ferromagnetic material formed on said base; a film of a metal oxide overlaying said ferromagnetic material; a film of graphene overlaying said metal oxide; and wherein said interconnect extends from one of said transistors to a second of said transistors.

6. The interconnect of claim 5, wherein said interconnect further comprises a layer of boron nitride between said magnetic oxide and said graphene.

7. The interconnect of claim 5, wherein said ferromagnetic material is cobalt, and said magnetic oxide is chromia.

8. The interconnect of claim 5, wherein said ferromagnetic material is cobalt, and said magnetic oxide is cobalt oxide.

Description

DESCRIPTION OF THE DRAWINGS

(1) The accompanying drawings, which are incorporated herein and constitute part of this specification, illustrate exemplary embodiments of the invention, and, together with the general description given above and the detailed description given below, serve to explain the features of the invention.

(2) FIG. 1 illustrates spin polaron formation. (a) Interfacial spin exchange interactions between graphene carriers and localized substrate spins (1) induce uniform carrier polarization—spin polarons (2); (b) The spin polarized state is stabilized relative to the ground state by interfacial exchange; (c) A spin valve/interconnect structure involving graphene/Co.sub.3O.sub.4/Co trilayer.

(3) FIG. 2 reflects graphene CVD on ALD BN(0001) on Ru(0001). Low energy electron diffraction (LEED) and STM dI/dV data for BN monolayer (ML) and graphene/BN heterojunctions grown on Ru(0001): (a) LEED image for h-BN(0001)/Ru. Main LEED spots are bifurcated, as shown by enlarged spot image (in red); model at right illustrates R30 (⅓×⅓) unit cell derived from LEED image; (b) corresponding STM dI/dV data showing interfacial orbital hybridization (note features near +/−1 V.sub.g (c) LEED image for graphene/h-BN/Ru(0001), also with orbital hybridization; (d) corresponding STM dI/dV data [1].

(4) FIG. 3 is LEED and corresponding line scan data for (a,b) 0.4 ML graphene on Co.sub.3O.sub.4(111), and (c,d) 3 ML graphene on Co.sub.3O.sub.4(111). Arrows (a,c) mark diffraction spots associated with Co.sub.3O.sub.4(111), as do inner spots in the outer ring of bifurcated features (e.g., O1, O2—b,d). Outer spots in the outer ring of bifurcated features (e.g., G1, G2—b,d) are graphene-related. LEED beam energy is 65 eV.

(5) FIG. 4 reflects longitudinal magneto-optic Kerr effect (MOKE) hysteresis of graphene (three layers) on Co.sub.3O.sub.4(111) [1 nm]/Co(0001) [5.6 nm] trilayer measured at T=300 K (solid circles) and 400 K (open circles). Inset of the main panel shows a sketch of the graphene/Co.sub.3O.sub.4(111)/Co(0001) trilayer.

(6) FIG. 5 illustrates three approaches to spin interconnects: (a) graphene/BN/Ru (or, e.g., tungsten) with tunneling-based spin injection/diffusion; (b) graphene interconnects with tunneling-based spin injection/diffusion, integrated on SiO.sub.2/Si; (c) magnetic-polaron coherent spin transport, based on polarization of graphene. FM=ferromagnet (Fe, Co, or Ni). Structures will be fabricated of variable length (L) and width (W) as shown in (a).

(7) FIG. 6 illustrates in cross-section view the interconnect of this invention. As shown, on a substrate 1000 (which may be silicon) a film 1002 of ferromagnetic material is deposited. A film 1004 of boron nitride at least one atomic layer thick overlays the film 1002. A film 1006 of graphene is formed on layer 1004 of boron nitride.

DETAILED DESCRIPTION OF THE INVENTION

(8) Various embodiments will be described in detail with reference to the accompanying drawings. The structures illustrated in the drawings are renderings not photomicrographs. They are intended to be illustrative, not limiting. In contrast, the data of FIGS. 2-4 is verified, and relied on to demonstrate projected performance.

(9) Proposed Interconnects and Related Structures

(10) Spin diffusion vs. spin polaron transport Spin interconnect structures are fabricated as shown in FIG. 5. These manufacturable structures demonstrate spin transport by two different methods. The most direct approach, as in FIG. 5a,b, involves the injection/diffusion of discrete spins through graphene [4, 11-16]. The interconnects illustrate the degree to which such discrete spin transport is affected by both spin diffusion vs. length (L, FIG. 5a)) and potential sidewall scattering for decreasing linewidths (W, FIG. 5a), in comparison with existing models [7].

(11) An alternative inventive approach herein to spin transport involves spin polaron formation [9, 17]. Coherent spin polarization and transport can arise from strong RKKY-type exchange interactions between delocalized carriers and localized spins on metal cations, as in CdTe/Mn.sup.+2 quantum wells [9, 17] and, apparently, in graphene/Co.sub.3O.sub.4/Co structures (FIG. 4) [10]. Because the basic phenomenon here is uniform graphene carrier polarization, rather than injection/diffusion of discrete spins, such structures may exhibit more uniform scaling vs. L and W, without L dependent polarization characteristic of discrete spin diffusion [6], and without sidewall-induced scattering characteristic of discrete spin transport.

(12) (1) Spin Injection/Diffusion: Graphene/BN/Ru (or W) Heterostructures (FIG. 5a)

(13) Graphene/BN/Ru heterostructures are readily manufacturable, based on our existing results using ALD to form the BN single layer [1] or multilayers [18], on Ru, followed by graphene CVD [2]. Literature results [19] also suggest the viability of MBE or PVD. Tungsten affords a CMOS-compatible alternative to Ru, with potentially useful interfacial chemical interactions and effects on graphene properties.

(14) (2) Spin Injection/Diffusion—Integration with SiO2/Si(100) (FIG. 5b)

(15) The demonstrated ability to grow (111)-oriented Co.sub.3O.sub.4 on SiO.sub.2/SiO(100) by PECVD [20] provides a direct route towards the integration of spin interconnects and related structures with Si CMOS. This structure would still operate by tunneling injection/diffusion of discrete spins, although graphene carrier/Co ion RKKY-type interactions [10] may also be observed.

(16) (3) Magnetic Polaron Formation/Transport with Substrate Gating. (FIG. 5c)

(17) Graphene/BN/FM (=Co, Ni, Fe) heterojunctions should exhibit strong interfacial orbital hybridization and charge transfer [1, 21, 22], with important consequences for substrate-induced BN and graphene magnetic behavior [23, 24], including uniform polarization of graphene charge carriers and coherent magnetic polaron spin transport. Such behavior (without interfacial orbital hybridization) has been demonstrated for graphene/Co.sub.3O.sub.4/Co structures [10] and likely will also be observed for graphene on other magnetic oxides such as chromia and alumina. Such structures will be fabricated by established methods [2, 18, 19]. These devices will rely on spin transport (magnetoresistance) behavior for longer L and smaller W, and we here demonstrate how spin polaron transport scales in a manner fundamentally different from discrete spin injection/diffusion. Spin transport in this structure may be gated by the ferromagnetic substrate, which would permit switching between different states with large and small magnetoresistance, leading to hybrid interconnect/device structures without analogy in Si-CMOS architecture.

(18) Fabrication of these heterojunctions is accompanied by characterization using an array of surface science methods, including low energy electron diffraction (LEED), Raman, core and valence band photoemission (XPS, UPS), and scanning tunneling microscopy/spectroscopy (STM/STS). Basic magnetic behavior is also be probed by magneto-optic Kerr effect (MOKE) measurements. Interconnect structures with varying L and W (e.g., FIG. 5a) are then produced, coupled with SEM/TEM characterization, and conductivity measurements. Magnetoresistance measurements, coupled with spin-polarized photoemission/inverse photoemission studies will similarly be conducted.

(19) Previous experience showing that graphene-covered heterostructures are largely inert towards ambient exposure for periods of several weeks or longer, makes this invention possible. Incorporation of the interconnect structures permitting shipment of samples between fabrication facilities and assembly points.

(20) Initially, as reflected in FIG. 5a and FIG. 5b—interconnects readily manufacturable based on existing results are made, and spin transport measurements are taken to determine magneto-resistance scaling as a function of interconnect length and width. Decreased conductivity with decreasing W is expected [7].

(21) Various graphene/BN or magnetic oxides/Co heterostructures (FIG. 5c), including the possibility of Co substrate “gating” of interconnect performance is explored as well. Scaling of magnetoresistance with interconnect behavior is compared to results for structures involving spin tunneling injection and diffusion demonstrating improved performance for the heterostructures of the invention.

(22) Structures are then optimized for spin transmission at and above room temperature, and comparisons are made of switching, power usage, durability, and other factors, with variations in structure and interface chemistry as predicted by previous results.

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