Method of producing semiconductor epitaxial wafer, semiconductor epitaxial wafer, and method of producing solid-state image sensor
11211423 · 2021-12-28
Assignee
Inventors
Cpc classification
H01L27/14698
ELECTRICITY
International classification
Abstract
A method of producing a semiconductor epitaxial wafer is provided. The method includes irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, in which the modified layer includes a constituent element of the cluster ions in solid solution. The method further includes forming an epitaxial layer on the modified layer of the semiconductor wafer. The irradiating is performed such that a portion of the modified layer in a thickness direction becomes an amorphous layer, and an average depth of an amorphous layer surface from a semiconductor wafer surface-side of the amorphous layer is at least 20 nm from the surface of the semiconductor wafer.
Claims
1. A method of producing a semiconductor epitaxial wafer, the method comprising: irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer in a surface portion of the semiconductor wafer, the modified layer including a constituent element of the cluster ions in solid solution; and forming an epitaxial layer on the modified layer of the semiconductor wafer, wherein the irradiating is performed such that a portion of the modified layer in a thickness direction becomes an amorphous layer, the amorphous layer having a first surface and a second surface disposed on a side opposite of the first surface, the first surface being closer to the surface of the semiconductor wafer than the second surface, an average depth of the first surface of the amorphous layer from the surface of the semiconductor wafer is at least 20 nm, and the semiconductor wafer is free of the amorphous layer for at least 20 nm from the surface of the semiconductor wafer.
2. The method of producing the semiconductor epitaxial wafer of claim 1, wherein the irradiating is performed such that the average depth is at least 20 nm and no greater than 200 nm from the surface of the semiconductor wafer.
3. The method of producing the semiconductor epitaxial wafer of claim 1, wherein the irradiating is performed such that an average thickness of the amorphous layer is no greater than 100 nm.
4. The method of producing the semiconductor epitaxial wafer of claim 1, wherein the cluster ions include carbon as the constituent element.
5. The method of producing the semiconductor epitaxial wafer of claim 1, wherein the cluster ions include at least two elements as constituent elements of which one is carbon.
6. The method of producing the semiconductor epitaxial wafer of claim 4, wherein the cluster ions have a carbon number of no greater than 16.
7. The method of producing the semiconductor epitaxial wafer of claim 1, wherein the average depth is no greater than 80 nm from the surface of the semiconductor wafer.
8. The method of producing the semiconductor epitaxial wafer of claim 1, wherein a carbon dose no greater than 1×10.sup.16 atoms/cm.sup.2 is used in the irradiating.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) In the accompanying drawings:
(2)
(3)
(4)
(5)
(6)
(7)
DETAILED DESCRIPTION
(8) The following provides a detailed description of embodiments of the present disclosure with reference to the drawings. Note that thicknesses of a modified layer 14, an amorphous layer 16, and an epitaxial layer 18 are exaggerated relative to a semiconductor wafer 10 in
(9) (Semiconductor Epitaxial Wafer Production Method)
(10) As illustrated in
(11) The semiconductor wafer 10 is for example a bulk monocrystalline wafer that is made from silicon or a compound semiconductor (GaAs, GaN, or SiC) and that does not have an epitaxial layer at the surface. In the case of production of a back-illumination solid-state image sensor, the semiconductor wafer 10 is normally a bulk monocrystalline silicon wafer. The semiconductor wafer 10 can for example be obtained by growing a monocrystalline silicon ingot through the Czochralski method (CZ method) or the floating zone melting method (FZ method) and slicing the ingot using a wire saw or the like. Carbon and/or nitrogen may be added to the semiconductor wafer 10 in order to obtain higher gettering ability. Furthermore, a freely selected dopant may be added to the semiconductor wafer 10 in a prescribed concentration to obtain an n+ type, p+ type, n− type, or p− type substrate.
(12) Alternatively, the semiconductor wafer 10 may be an epitaxial semiconductor wafer in which a semiconductor epitaxial layer has been formed on the surface of a bulk semiconductor wafer. For example, the semiconductor wafer 10 may be an epitaxial silicon wafer in which a silicon epitaxial layer has been formed on the surface of a bulk monocrystalline silicon wafer. The silicon epitaxial layer can be formed through CVD under normally used conditions. The thickness of the epitaxial layer is preferably in a range from 0.1 μm to 10 μm and more preferably in a range from 0.2 μm to 5 μm.
(13) Herein, a cluster ion irradiation step illustrated in
(14) Note that the present description uses the term “cluster ion” to refer to an ionized product formed by applying positive charge or negative charge to a cluster of a plurality of atoms or molecules that are assembled into a single mass. The cluster is a lump-shaped group of atoms or molecules (normally from approximately 2 to 2,000) that are bound to one another.
(15) Irradiation with the cluster ions 12 in the present embodiment allows higher gettering ability to be obtained than in a situation in which monomer ions are implanted. The inventor considers the action by which this effect is achieved to be as follows.
(16) In a situation in which, for example, carbon monomer ions are implanted in a silicon wafer, the monomer ions knock against silicon atoms forming the silicon wafer and become implanted at a prescribed depth position in the silicon wafer as illustrated in
(17) On the other hand, in a situation in which a silicon wafer is irradiated with cluster ions formed, for example, from carbon and hydrogen, upon irradiation with the cluster ions 12 as illustrated in
(18) Furthermore, a feature of the present embodiment is that irradiation with cluster ions is performed such that, as illustrated in
(19) From a viewpoint of more effectively suppressing epitaxial defects, the average depth of the surface 16A of the amorphous layer 16 is preferably at least 20 nm and no greater than 200 nm from the semiconductor wafer surface 10A, and more preferably at least 20 nm and no greater than 80 nm from the semiconductor wafer surface 10A.
(20) The average thickness of the amorphous layer 16 is preferably no greater than 100 nm and more preferably no greater than 60 nm. An average thickness of greater than 100 nm may make it difficult to select cluster irradiation conditions that ensure the depth of the surface 16A is at least 20 nm from the semiconductor wafer surface 10A.
(21) Note that as illustrated in
(22) The cluster ions may include a variety of clusters depending on the binding mode and can be generated by commonly known methods such as described, for example, in the following documents. Gas cluster beam generation methods are described in (1) JP H9-41138 A and (2) JP H4-354865 A. Ion beam generation methods are described in (1) Charged Particle Beam Engineering, Junzo Ishikawa, ISBN 978-4-339-00734-3, Corona Publishing Co., Ltd.; (2) Electron/Ion Beam Engineering, The Institute of Electrical Engineers of Japan, ISBN 4-88686-217-9, Ohmsha, Ltd.; and (3) Cluster Ion Beam Fundamentals and Applications, ISBN 4-526-05765-7, Nikkan Kogyo Shimbun, Ltd. In general, a Nielsen ion source or a Kaufman ion source is used for generating positively charged cluster ions, whereas a high current negative ion source using volume generation is used for generating negatively charged cluster ions.
(23) The following describes conditions of the cluster ion irradiation.
(24) No specific limitations are placed on elements used for irradiation other than being elements that contribute to gettering. Examples of elements that can be used include carbon, boron, phosphorous, and arsenic. However, it is preferable that the cluster ions include carbon as a constituent element from a viewpoint of obtaining higher gettering ability. Carbon atoms at lattice positions have a small covalent radius compared to the silicon monocrystal and form contraction sites in the silicon crystal lattice, which results in high gettering ability of attracting interstitial impurities.
(25) The irradiated elements are preferably at least two elements of which one is carbon. In particular, it is preferable that one or more dopant elements selected from the group consisting of boron, phosphorus, arsenic, and antimony are irradiated in addition to carbon. The types of metals that can be effectively gettered differ depending of the types of elements that are in solid solution. Therefore, providing at least two elements in solid solution makes it possible to deal with a wider range of metal contaminants. For example, nickel can be effectively gettered using carbon, whereas copper and iron can be effectively gettered using boron.
(26) No specific limitations are placed on compounds that are ionized. Examples of carbon source compounds that can be ionized include ethane, methane, and carbon dioxide (CO.sub.2), whereas examples of boron source compounds that can be ionized include diborane and decaborane (B.sub.10H.sub.14). For example, in a situation in which a mixed gas of dibenzil and decaborane is used as a material gas, hydrogenated compound clusters in which carbon, boron, and hydrogen are aggregated can be produced. Alternatively, in a situation which cyclohexane (C.sub.6H.sub.12) is used as a material gas, cluster ions formed from carbon and hydrogen can be produced. Clusters C.sub.nH.sub.m (3≤n≤16, 3≤m≤10) produced from pyrene (C.sub.16H.sub.10), dibenzil (C.sub.14H.sub.14), or the like are particularly preferable as a carbon source compound. The reason for the above is that a beam of small cluster ions can be easily controlled.
(27) The compound that is ionized is preferably a compound that includes both carbon and the previously mentioned dopant element. When a compound such as described above is irradiated as cluster ions, carbon and the dopant element can both be provided in solid solution through a single irradiation.
(28) Whether or not an amorphous layer is formed in the modified layer and the average depth of the surface 16A of the amorphous layer 16 when formation does occur are controlled through cluster ion dose, cluster size, cluster ion acceleration voltage, beam current, and so forth, and are particularly dependent on the dose and the cluster size. The present description uses the term “cluster size” to refer to the number of atoms or molecules forming a single cluster.
(29) The cluster size can be set as appropriate as from 2 to 100 atoms/molecules, preferably no greater than 60 atoms/molecules, and more preferably no greater than 50 atoms/molecules. In the examples described further below, C.sub.3H.sub.5 having a cluster size of 8 and C.sub.3H.sub.3 having a cluster size of 6 were used. The cluster size can for example be adjusted by adjusting the pressure of gas sprayed from a nozzle, the pressure in a vacuum vessel, and the voltage applied to a filament during ionization. Note that the cluster size can be calculated by obtaining a cluster number distribution by mass spectrometry using a quadrupole high frequency electric field or time-of-flight mass spectrometry and taking an average value of the cluster numbers.
(30) The dose of cluster ions can be adjusted by controlling the ion irradiation time. In the present embodiment, the dose is required to be roughly at least 1×10.sup.15 atoms/cm.sup.2 in order to form the amorphous layer 16 in the modified layer 14. In the examples described further below, an amorphous layer was formed in a modified layer through a carbon dose of at least 1.7×10.sup.15 atoms/cm.sup.2 when C.sub.3H.sub.5 cluster ions were used (refer to
(31) The acceleration voltage of the cluster ions, in combination with the cluster size, influences the position of a peak in the depth direction concentration profile of a constituent element in the modified layer 18 and thus also indirectly influences the depth of the amorphous layer. In a situation in which C.sub.nH.sub.m (3≤n≤16, 3≤m≤10) cluster ions are used, the acceleration voltage per one carbon atom is required to be greater than 0 keV/atom and no greater than 50 keV/atom, and preferably no greater than 40 keV/atom, in order that the average depth of the surface 16A at the semiconductor wafer surface-side of the amorphous layer 16 is at least 20 nm from the semiconductor wafer surface 10A.
(32) Adjustment of the acceleration voltage is usually performed by two methods: (1) electrostatic acceleration and (2) high-frequency acceleration. The former method is for example a method in which electrodes are arranged at equal intervals and the same voltage is applied between the electrodes such that a constant accelerating field is formed in an axial direction. The latter method is for example a linac (linear accelerator) method in which ions are caused to travel along a straight line while being accelerated by high-frequency waves.
(33) The beam current is required to be roughly at least 100 μA and no greater than 1,000 μA in order that the amorphous layer 16 is formed in the modified layer 14 and in order that the average depth of the surface 16A of the amorphous layer 16 is at least 20 nm from the semiconductor wafer surface 10A.
(34) The following describes heat treatment in the present embodiment. Monomer ions are normally implanted with an acceleration voltage of approximately 150 keV to 2,000 keV and as a result of each of the ions colliding with a silicon atom with this energy, crystallinity of a surface portion of the silicon wafer in which the monomer ions are implanted is disturbed and crystallinity of an epitaxial layer subsequently grown on the wafer surface is also disturbed. On the other hand, cluster ions are normally irradiated with an acceleration voltage of approximately 10 keV/cluster to 100 keV/cluster and the cluster ions can be caused to impact with a small energy per one atom or molecule because each cluster is an aggregate of a plurality of atoms or molecules. Consequently, the extent of damage to the semiconductor wafer crystal is small. Therefore, in one embodiment, the semiconductor epitaxial wafer 100 having high gettering ability can be effectively produced by performing the first step and then transferring the semiconductor wafer to an epitaxial growth apparatus to carry out the second step without subjecting the semiconductor wafer to heat treatment after the first step to allow recovery of crystallinity. In other words, it is not necessary to perform recovery heat treatment using a rapid heating and cooling heat treatment apparatus such as a rapid thermal annealing (RTA) apparatus or a rapid thermal oxidation (RTO) apparatus that is separate to the epitaxial apparatus.
(35) The reason for this is that crystallinity of the semiconductor wafer 10 can sufficiently recover during hydrogen baking treatment that is performed in advance of epitaxial growth in the epitaxial apparatus for forming the epitaxial layer 18, which is described further below. Normal conditions for the hydrogen baking treatment involve providing a hydrogen environment in the epitaxial growth apparatus, loading the semiconductor wafer 10 into a furnace of the apparatus at an internal furnace temperature of at least 600° C. and no greater than 900° C., heating at a rate of at least 1° C./s and no greater than 15° C./s to a temperature of at least 1,100° C. and no greater than 1,200° C., and holding the semiconductor wafer 10 for at least 30 seconds and no greater than 1 minute at the aforementioned temperature. Although the original purpose of this hydrogen baking treatment is to remove a natural oxide film formed on the wafer surface due to washing treatment prior to epitaxial layer growth, hydrogen baking performed under the conditions described above also enables sufficient recovery of crystallinity of the semiconductor wafer 10.
(36) It should be noted that alternatively, recovery heat treatment may of course be performed after the first step and prior to the second step using a heat treatment apparatus that is separate from the epitaxial apparatus. The recovery heat treatment is performed for at least 10 seconds and no greater than 1 hour at at least 900° C. and no greater than 1,200° C. The recovery heat treatment can for example be performed using a rapid heating and cooling heat treatment apparatus, such as an RTA apparatus or an RTO apparatus, or a batch heat treatment apparatus (vertical heat treatment apparatus or horizontal heat treatment apparatus) before transferring the semiconductor wafer 10 into the epitaxial growth apparatus.
(37) The epitaxial layer 18 formed on the modified layer 14 is for example a silicon epitaxial layer and can be formed under normally used conditions. For example, a source gas such as dichlorosilane or trichlorosilane may be introduced into a chamber using hydrogen as a carrier gas and epitaxial growth may be performed on the semiconductor wafer 10 by CVD at a temperature in range of roughly 1,000° C. to 1,200° C., although the growth temperature does differ depending on the source gas. The epitaxial layer 18 preferably has a thickness in a range of from 1 μm to 15 μm. A thickness of less than 1 μm may cause a change in resistivity of the epitaxial layer 18 due to outward diffusion of dopant from the semiconductor wafer 10 and a thickness of greater than 15 μm may affect spectral sensitivity characteristics of the solid-state image sensor.
(38) (Semiconductor Epitaxial Wafer)
(39) The following describes the semiconductor epitaxial wafer 100 that is obtained through the production method described above. As illustrated in
(40) The modified layer 14 is defined as previously explained and can be identified as a steep peak section in a depth direction concentration profile of the prescribed element which is obtained by performing elemental analysis in the depth direction from the surface 10A of the semiconductor wafer 10 using a secondary ion mass spectrometer (SIMS). The modified layer 14 normally extends from the surface 10A of the semiconductor wafer 10 to a depth in a range of from 50 nm to 400 nm from the surface 10A.
(41) As illustrated in
(42) The mechanism by which black spot defects occur is thought to be as described below. Specifically, it is presumed that in a recrystallization step in which the amorphous layer formed in the modified layer prior to epitaxial layer formation undergoes crystallinity recovery due to heat energy received during epitaxial growth, not only silicon atoms, but also cluster elements (for example, carbon atoms) introduced through cluster irradiation, oxygen atoms in the silicon wafer, and so forth are taken into the recrystallized region such that the recrystallized region is in a composite clustered defect form, which is observed as black spot-shaped defects.
(43) According to investigation by the inventor, high gettering ability is obtained by the semiconductor epitaxial wafer 100 in which the black spot defects 20 are present. Furthermore, the inventor discovered that occurrence of epitaxial defects can be suppressed when the average depth of the amorphous layer surface 16A is at least 20 nm from the semiconductor wafer surface 10A, whereas a line-shaped defect layer of connected black spots is formed when the amorphous layer becomes so thick that the average depth is less than 20 nm, and this line-shaped defect layer acts as a starting point for formation of epitaxial defects.
(44) In the present embodiment, the density of epitaxial defects in the epitaxial layer 18 can be kept to no greater than 0.04 defects/cm.sup.2 as a result of the average depth of the amorphous layer surface 16A in the modified layer 14 being at least 20 nm from the semiconductor wafer surface 10A prior to formation of the epitaxial layer 18.
(45) From a viewpoint of suppressing occurrence of epitaxial defects, the black spot defects are preferably present at a depth of at least 30 nm from the semiconductor wafer surface.
(46) In terms of size, the black spot defects have a width (wafer radial direction) of approximately 30 nm to 100 nm and a height (wafer thickness direction) of approximately 20 nm to 60 nm. The density of the black spot defects is preferably from 1.0×10.sup.8 defects/cm.sup.2 to 1.0×10.sup.10 defects/cm.sup.2. A density of at least 1.0×10.sup.8 defects/cm.sup.2 enables the effect of suppressing occurrence of epitaxial defects to be sufficiently realized. A density of no greater than 1.0×10.sup.10 defects/cm.sup.2 ensures that a line-shaped defect layer such as described above is not formed.
(47) No specific limitations are placed on the prescribed element other than being an element that is not a main material of the semiconductor wafer (i.e., silicon in the case of a silicon wafer). As explained above, the prescribed element is preferably carbon or at least two elements of which one is carbon.
(48) The semiconductor epitaxial wafer 100 according to the present embodiment has high gettering ability and occurrence of epitaxial defects therein is suppressed.
(49) (Solid-State Image Sensor Production Method)
(50) A solid-state image sensor production method according to an embodiment of the present disclosure includes forming a solid-state image sensor in the epitaxial layer at the surface of the semiconductor epitaxial wafer described above or of a semiconductor epitaxial wafer produced by the production method described above (in other words, in the epitaxial layer 18 at the surface of the semiconductor epitaxial wafer 100). The solid-state image sensor obtained through the above-described production method can more sufficiently suppress occurrence of white spot defects than conventionally.
EXAMPLES
Experimental Example 1
Comparative Example
(51) An n type silicon wafer (diameter: 300 mm, thickness 725 μm, dopant: phosphorus, dopant concentration: 5.0×10.sup.14 atoms/cm.sup.3) was prepared from a CZ monocrystalline silicon ingot. Next, a cluster ion generating apparatus (model: CLARIS, produced by Nissin Ion Equipment Co., Ltd.) was used to generate C.sub.3H.sub.5 clusters from cyclohexane and irradiate the surface of the silicon wafer with a carbon dose of 1.0×10.sup.15 atoms/cm.sup.2 to form a modified layer. The acceleration voltage per one carbon atom was 23.4 keV/atom and the beam current was 400 μA.
(52)
(53) Next, the silicon wafer was transferred into a single wafer epitaxial growth apparatus (produced by Applied Materials, Inc.) and was subjected to hydrogen baking treatment in the apparatus for 30 seconds at 1,120° C. Thereafter, a silicon epitaxial layer (thickness: 8 μm, dopant: phosphorous, dopant concentration: 1.0×10.sup.15 atoms/cm.sup.3) was grown on the modified layer of the silicon wafer by CVD at 1,150° C. using hydrogen as a carrier gas and trichlorosilane as a source gas. A silicon epitaxial wafer was obtained as a result.
(54) Concentration profiles of carbon and hydrogen were measured by SIMS. The modified layer could be identified by confirming the presence of a steep peak within a range of 80 nm from the silicon wafer surface. A cross-section around the modified layer of the silicon epitaxial wafer was observed using a TEM. The modified layer is indicated by the black belt-shaped section in the image shown in
Example
(55) An experiment was conducted in the same way as in the comparative example with the exception that the carbon dose was changed to 2.0×10.sup.15 atoms/cm.sup.2. After cluster ion irradiation, a cross-section around a modified layer was observed using a TEM. As shown in
(56) Concentration profiles of carbon and hydrogen were measured by SIMS after epitaxial layer formation. The modified layer could be identified by confirming the presence of a steep peak within a range of 80 nm from the silicon wafer surface. A cross-section around the modified layer of the silicon epitaxial wafer was observed. The modified layer is indicated by the black belt-shaped section in the image shown in
(57) <Evaluation of Gettering Ability>
(58) The surface of the silicon epitaxial wafer produced in each of the comparative example and the example was deliberately contaminated by a spin coating contamination method using a Ni contaminant liquid and an Fe contaminant liquid (each 1.2×10.sup.13/cm.sup.2) and was then subjected to heat treatment for 30 minutes at 900° C. Thereafter, the concentrations of Ni and Fe captured in the modified layer were measured by SIMS. The results are shown in Table 1.
(59) TABLE-US-00001 TABLE 1 Comparative example Example Amount of captured Ni 5.0 × 10.sup.12 1.1 × 10.sup.13 [atoms/cm.sup.2] Amount of captured Fe 1.0 × 10.sup.12 9.0 × 10.sup.12 [atoms/cm.sup.2]
(60) The example exhibited higher gettering ability than the comparative example. In the example, it is thought that formation of the amorphous layer in the modified layer led to recrystallization in a region of the amorphous layer after epitaxial layer formation and that this region also contributed as a gettering site.
Experimental Example 2
(61) As illustrated by the plot in
(62) After cluster ion irradiation, a cross-section around each modified layer was observed using a TEM. Measurements were performed to determine whether or not an amorphous layer was formed in each of the modified layers and, in a situation in which an amorphous layer was formed, to determine the average depth of the amorphous layer surface at the semiconductor wafer surface-side of the amorphous layer and the average thickness of the amorphous layer. Representative examples of TEM images are shown in
(63) The surface of the silicon epitaxial layer of each of the epitaxial silicon wafers was measured by a Surfscan SP1 (produced by KLA-Tencor Corporation) in normal mode and among defects counted as LPDs of at least 90 nm, each defect counted as an LPD-N was defined as an epitaxial defect.
(64) The results explained above demonstrate that when an acceleration voltage per one carbon atom of 23.4 keV/atom and a beam current of 400 μA are fixed in a situation in which C.sub.3H.sub.5 cluster ions are used, a dose of at least 1.7×10.sup.15 atoms/cm.sup.2 enables formation of an amorphous layer and provision of high gettering ability, whereas a dose of no greater than 2.0×10.sup.15 atoms/cm.sup.2 enables an average depth of at least 20 nm and suppression of epitaxial defects.
(65) Moreover, when the dose was at least 1.7×10.sup.15 atoms/cm.sup.2 and no greater than 2.0×10.sup.15 atoms/cm.sup.2, black spot defects were observed after epitaxial layer formation as representatively illustrated in
(66) Table 2 shows the depth of black spot defects from the silicon wafer surface, the width of black spot defects, and the density of black spot defects for four sets of experimental conditions in which black spot defects were observed.
(67) TABLE-US-00002 TABLE 2 Black spot Carbon dose [atoms/cm.sup.2] defects 1.70E+15 1.80E+15 1.90E+15 2.00E+15 Depth [nm] 58 46 39 30 Width [nm] 31 47 62 79 Density 3.8 × 10.sup.8 7.4 × 10.sup.8 2.4 × 10.sup.9 8.9 × 10.sup.9 [defects/cm.sup.2]
Experimental Example 3
(68) An experiment was conducted in the same way as in Experimental Example 2 with the exception that the type of cluster ions was changed to C.sub.3H.sub.3 clusters generated from cyclohexane.
(69) Moreover, when the dose was at least 2.2×10.sup.15 atoms/cm.sup.2 and no greater than 2.6×10.sup.15 atoms/cm.sup.2, black spot defects were observed after epitaxial layer formation. Black spot defects were not observed when the dose was less than 2.2×10.sup.15 atoms/cm.sup.2. When the dose was greater than 2.6×10.sup.15 atoms/cm.sup.2, black spot defects were not observed, but a line-shaped defect layer of connected black spots was observed.
(70) Table 3 shows the depth of black spot defects from the silicon wafer surface, the width of black spot defects, and the density of black spot defects for five sets of experimental conditions in which black spot defects were observed.
(71) TABLE-US-00003 TABLE 3 Black spot Carbon dose [atoms/cm.sup.2] defects 2.20E+15 2.30E+15 2.40E+15 2.50E+15 2.60E+15 Depth [nm] 65 54 42 38 32 Width [nm] 30 45 58 73 89 Density 1.3 × 10.sup.8 6.7 × 10.sup.8 1.6 × 10.sup.9 4.3 × 10.sup.9 9.4 × 10.sup.9 [defects/cm.sup.2]
INDUSTRIAL APPLICABILITY
(72) The present disclosure can provide a semiconductor epitaxial wafer having high gettering ability and in which occurrence of defects in an epitaxial layer is suppressed and can provide a method for producing this semiconductor epitaxial wafer.
REFERENCE SIGNS LIST
(73) 100 semiconductor epitaxial wafer 10 semiconductor wafer 10A semiconductor wafer surface 12 cluster ion 14 modified layer 16 amorphous layer 16A surface at semiconductor wafer surface-side of amorphous layer 18 epitaxial layer 20 black spot defect