ASSEMBLY OF NETWORK SWITCH ASIC WITH OPTICAL TRANSCEIVERS

Abstract

The invention relates to a switch system comprising one or more optical transceiver assemblies (14) connected to a switch ASIC (29).

Claims

1-62. (canceled)

63. Switch system comprising one or more optical transceiver assemblies connected to a switch ASIC, wherein the switch ASIC switches electrical signals, wherein the transceiver assembly comprises a layer stack, and wherein the layer stack includes the following features: an optical transceiver chip, optical beam forming layers, which contain lenses or lens arrays etched into the layer material of the layer stack and configured to form an optical beam, a pluggable optical interface including mechanical guide pins inside the layer assembly, and an optical imaging system expanding and collimating the optical beam.

64. Switch system of claim 1 wherein a fiber interface layer in a pluggable optical connector is using V-grooves to align and fix fibers, and wherein an anisotropically etched mirror facet reflects the optical beam towards the transceiver chip.

65. Switch system of claim 1 wherein the optical transceiver assembly is realized as an electronic photonic integrated circuit (EPIC) including TSVs with pads on the bottom side of the EPIC chip as electrical interfaces and grating couplers as optical interfaces to the other layers of the transceiver assembly on the top side of the EPIC chip.

66. Optical transceiver system of claim 1 wherein the transceiver chip has the following functionalities: modulator driver and modulator, photodetector and transimpedance amplifier, monitor and control functionalities with respect to one or more of the following transceiver's performance parameters: optical modulation amplitude, extinction ratio and/or optical output power, Serial Peripheral Interface (SPI) or Inter-Integrated Circuit (I.sup.2C) communication to the DSP chip and/or to the external laser source and/or to the host board and/or to a central communication unit.

67. Switch system of claim 1 comprising a switch ASIC which is electrically and mechanically connected to a high-speed substrate and a transceiver assembly in which the optical transceiver chip is located on a primary high-speed substrate which is electrically and mechanically connected to the same high-speed substrate.

68. Optical transceiver system of claim 1 wherein the transceiver chip has the following monitoring and diagnostic functionalities: Pseudo-random Binary Sequence (PRBS) generator and checker, loopbacks on line- and/or network side, detect and signal a loss-of-signal (LOS) event at the receiver optical input, monitor of the average power and/or frequency response of the optical signal and the modulator output, internal voltage monitor, internal temperature sensors, generation of interrupt signals.

69. Switch system of claim 1 wherein a digital signal processing chip (DSP) is located next to the optical transceiver chip on the same primary high-speed substrate.

70. Optical transceiver system of claim 1 wherein the transceiver chip has the following monitoring and diagnostic functionalities: connection to the DSP according to IEEE-Standard 1149.1 (JTAG), check locking status of the DSP on transmitter and receiver.

71. Switch system of claim 1 wherein electronic and photonic building blocks comprising a single transceiver channel in the optical transceiver chip are multiplied to form an arrayed structure.

72. Optical transceiver system of claim 1 wherein a pair of fine alignment features of the optical connector to a transceiver receptacle is implemented in the layer stack of one or both, the optical connector and the transceiver receptacle.

73. Switch system of claim 10 wherein the pair of fine alignment features consists of guide pins and their corresponding feed holes.

74. Switch system of claim 10 wherein the pair of fine alignment features comprises self-alignment features.

75. Switch system of claim 12 wherein the self-alignment features consist of at least two anisotropically etched recesses in the transceiver chip and a at least two spherical objects located in the etched recesses.

76. Switch system of claim 1 wherein the transceiver assembly has distinct alignment features for coarse alignment and for fine alignment.

77. Optical transceiver system of claim 14 wherein a pair of coarse alignment features of the pluggable optical connector to the transceiver receptacle is implemented in the enclosure of each, the pluggable optical connector and the transceiver receptacle.

78. Switch system of claim 14 wherein the pair of coarse alignment features consists of guide pins and their corresponding feed holes.

79. Switch system of any of claim 2 wherein the fibers in the fiber array or fiber ribbon in the pluggable optical connector have a constant spacing between the fibers from 80 μm to 255 μm.

80. Switch system of claim 1 wherein each four signal paths in the optical transceiver chip are combined, respectively by wavelength division multiplexing (WDM) in one fiber resulting in a reduced fiber count.

81. Switch system of claim 18 wherein the wavelength division multiplexing functionality is integrated in the pluggable optical connector.

82. Switch system of claim 19 wherein the wavelength division multiplexing is realized by waveguide structures in a Planar Lightguide Circuit.

83. Switch system of claim 18 wherein the first side of a wavelength division multiplexing device is connected to a fiber array or fiber ribbon connected to the transceiver assembly and the second side of the wavelength division multiplexing device is connected to a second fiber array or fiber ribbon connected to a front plate.

84. Switch system of claim 1 wherein the fiber array or fiber ribbon terminates in at least two distinct connectors at the front plate, where at least one first connector comprises the fibers guiding light from an external laser source outside the switch system to the optical transceiver chip and at least one second connector comprises fibers for input and output data signals.

85. Switch system of claims 1: wherein the switch system comprises one or more switch ASIC(s) with one or more array(s) of optical transceivers assemblies, wherein RF high-speed lines between the switch ASIC and the transceiver assembly are routed within the high-speed substrate, wherein electrical interfaces on the transceiver chip are routed by through silicon vias (TSV) to metal pads on the bottom side of the transceiver chip, wherein the lens array is placed on the top side of the transceiver chip, wherein the fiber array is mounted inside the pluggable optical connector and are extending horizontally away from the transceiver assembly, wherein the Transceiver assembly is reflow-solderable to contact the electrical interfaces when the pluggable optical connector is plugged off, wherein the pluggable optical connector and the transceiver receptacle mainly consists of silicon, and wherein one or more heat spreaders are mounted on the transceiver assembly to hold the pluggable optical connector into position and to dissipate the heat.

86. Switch system of claims 5 wherein the switch system comprises one or more switch ASIC(s) with one or more array(s) of optical transceivers assemblies. wherein switch ASIC(s) and optical transceivers assemblies are co-packaged on a high-speed substrate with a ball grid array or land grid array on the bottom, wherein RF high-speed lines between the switch ASIC and the transceiver assembly are routed within the high-speed substrate, and wherein DC and controls are connected via a ball grid array or land grid array interface to the main board.

87. Switch system of claims 1 wherein the switch system comprises different modulation formats, such as: NRZ, PAM-N, especially PAM-4, QPSK, DP-QPSK or Nyquist pulses.

88. Switch system of claim 1 wherein the switch system comprises an arrangement and/or a layer system wherein all layers of the transceiver assembly are based on silicon substrates as the base material, wherein a transceiver assembly is soldered onto the high-speed substrate, wherein a pluggable optical connector connects the fiber array mechanically and optically to the EPIC chip, wherein 32 transmitter output and 32 receiver input channels per transceiver assembly are present, and wherein a net data rate per channel of 100 Gbit/s e.g. using PAM-4 modulation format, and wherein the Transceiver assemblies have external laser inputs via fiber interfaces.

89. Switch system of claim 1 wherein the External laser input comprises one or more fibers which are polarization independent by a special arrangement in the EPIC chip.

90. Switch system of claim 1 wherein the switch system comprises second high-speed substrates and the electrical and mechanical connection of each of the second high-speed substrates to the high-speed substrate is realized by a flexible high-speed substrate.

Description

[0117] In order that the manner in which the above-recited and other advantages of the invention are obtained will be readily understood, specific embodiments of the invention are illustrated in the appended FIGS. 1-16. The drawings depict only typical embodiments of the invention in an exemplary fashion and are therefore not to be considered to be limiting of its scope.

[0118] In FIGS. 1-16, the reference numerals refer to the following elements: [0119] 1: Optical transceiver chip (2 layers) [0120] 2: Primary high-speed substrate [0121] 3: Digital signal processing chip [0122] 4: Coarse alignment feature (Feed hole) [0123] 5: Coarse alignment feature (guide pin) [0124] 6: Fine alignment feature (Feed hole) [0125] 7: Fine alignment feature (guide pin) [0126] 8: Fiber mount [0127] 9: Heat spreader [0128] 10: Fiber ribbon [0129] 11: Ball grid array (between optical transceiver chip and primary high-speed substrate) [0130] 12: Ball grid array (on the bottom of the high-speed substrate) [0131] 13: Lenses on the optical transceiver chip [0132] 14: Transceiver assembly [0133] 15: Wavelength multiplexer [0134] 16: Second fiber ribbon [0135] 17: Connector for the input and output signals (to connect at the front plate) [0136] 18: Polarization maintaining fiber ribbon (for the laser radiation) [0137] 19: Connector for the input of the external laser source [0138] 20a Guide pin [0139] 20b: Through hole [0140] 21: Anti-reflective coating [0141] 22: Thermo interface material [0142] 23: Pluggable optical connector [0143] 24: Switch main board [0144] 25: Transceiver receptacle [0145] 26: Mirror facet [0146] 27: UV curing glue [0147] 28: Layer stack with Transceiver chip [0148] 29: Switch ASIC (application-specific integrated circuit) [0149] 30: Second high-speed substrate [0150] 31: Glob Top transfer mold [0151] 32: Lenses in the optical connector [0152] 33: Lid for fiber mount [0153] 34: High-speed substrate [0154] 35: Front plate [0155] 36: Flexible high-speed substrate [0156] 37: Lens array chip 1 [0157] 38: Lens array chip 2 [0158] 39: Transceiver assembly transfer mold

[0159] In an exemplary embodiment of the invention, a transceiver chip 1 is mounted on a primary high-speed substrate 2 via a ball grid array 11 (e.g. see FIGS. 12 and 13). Next to the transceiver chip 1, a digital signal processing chip 3 is mounted the same primary high-speed substrate 2. The primary high-speed substrate 2 is connected to the high-speed substrate 34 (see FIG. 10) via a second ball grid array 12. The high-speed substrate 34 (see FIG. 10) also carries the switch ASIC 29.

[0160] The upper parts in FIG. 12 form an optical connector that comprises a fiber mount 8 which holds a fiber ribbon 10, coarse alignment features, here shown as guide pins 5, and fine alignment features, here shown as guide pins 7. Their counterparts are feed holes 4 providing coarse alignment features in the enclosure of the transceiver chip 1 and the digital signal processing chip 3, and feed holes 6 providing fine alignment features in the layer stack of the transceiver chip 1.

[0161] The bottom parts in FIG. 12—namely the transceiver chip 1, the digital signal processing chip 3, the enclosure of the transceiver chip 1 and the digital signal processing chip 3, and the primary high-speed substrate 2—form a receptacle that is configured to receive the coarse alignment features (guide pins 5) and the fine alignment features (guide pins 7) of the upper optical connector.

[0162] The feed holes 4 may extend into the primary high-speed substrate 2 as shown in FIG. 13.

[0163] FIG. 13 also depicts lenses 13 for beam shaping that are located on the top surface of the transceiver chip 1.

[0164] Alternatively, lenses 13 for beam shaping may be located in the enclosure of the transceiver chip 1 as shown in FIGS. 1 and 2. FIGS. 1 and 2 depict another exemplary embodiment of a pluggable optical connector 23 and a receptacle 25.

[0165] In the embodiment of FIGS. 1 and 2, the transceiver chip 1 is directly mounted on the high-speed substrate 34 that also carries the switch ASIC 29.

[0166] The Switch ASIC 29 is preferably connected to a plurality of optical transceiver assemblies 14, preferably four optical transceiver assemblies 14 as shown in the Figures. Each transceiver assembly 14 preferably comprises one transceiver chip 1, a primary high-speed substrate 2, a set of coarse and fine alignment features on plug 5 and 7, respectively, and receptacle side 4 and 6, respectively, a DSP chip 3 and a fiber mount 8 with fiber ribbon 10 permanently attached to the fiber mount.

[0167] In case of n (n>1) optical transceiver assemblies 14, the transceiver assemblies 14 are preferably arranged in a rotational symmetry of order n, also called n-fold rotational symmetry, or discrete rotational symmetry of the nth order, with respect to the Switch ASIC 29. In case of sixteen optical transceiver assemblies 14, the optical transceiver assemblies 14 are preferably arranged in 4-fold rotational symmetry as shown in the Figures (see for instance FIG. 10).

[0168] In the drawings and specification above, there are disclosed a plurality of embodiments of the present invention. The applicant would like to emphasize that each feature of each embodiment may be combined with or added to any other of the embodiments in order to modify the respective embodiment and create additional embodiments. These additional embodiments form a part of the present disclosure and, therefore, the applicant may file further patent claims regarding these additional embodiments at a later stage of the prosecution.

[0169] Further, the applicant would like to emphasize that each feature of each of the following dependent claims may be combined with any of the present independent claims as well as with any other (one ore more) of the present dependent claims (regardless of the present claim structure). Therefore, the applicant may direct further patent claims towards other claim combinations at a later stage of the prosecution.