Method for controlling a spin qubit quantum device

Abstract

A method is described for controlling a spin qubit quantum device that includes a semiconducting portion, a dielectric layer covered by the semiconducting portion, a front gate partially covering an upper edge of the semiconducting portion, and a back gate. The method includes, during a manipulation of a spin state, the exposure of the device to a magnetic field B of value such that g.Math.μ.sub.B.Math.B>min(Δ(Vbg)). The method also includes the application, on the rear gate, of an electrical potential Vbg of value such that Δ(Vbg)<g.Math.μ.sub.B.Math.B+2|M.sub.SO|, and the application, on the front gate, of a confinement potential and an RF electrical signal triggering a change of spin state, with g corresponding to the Landé factor, μ.sub.B corresponding to a Bohr magneton, Δ corresponding to an intervalley energy difference in the semiconducting portion, and M.sub.SO corresponding to the intervalley spin-orbit coupling.

Claims

1. A method for controlling a spin qubit quantum device, wherein the quantum device includes at least: a semiconductor portion comprising an upper face, a lower face and side faces substantially perpendicular to the upper and lower faces; a dielectric layer on which the semiconductor portion is disposed such that the lower face of the semiconductor portion is disposed on the side of the dielectric layer; a front gate partially covering at least one upper ridge of the semiconductor portion formed at a junction between the upper face and a first of the side faces; a rear gate such that the dielectric layer is disposed between the rear gate and the semiconductor portion; the method comprising, upon manipulating a spin state of the qubit of the quantum device: exposing the quantum device to a magnetic field B, and applying, to the rear gate, an electric potential Vbg having a value such that Δ(Vbg)<g.Math.μ.sub.B.Math.B+2|M.sub.SO|, and applying, to the front gate, an electric potential Vfg confining at least one electric charge under the upper ridge and an electric RF signal triggering a change in spin state of the qubit of the quantum device, with g corresponding to the Lande factor, μ.sub.B corresponding to the Bohr magneton, Δ corresponding to the valley-orbit splitting in the semiconductor portion, and M.sub.SO the inter-valley spin-orbit coupling of the quantum device.

2. The method according to claim 1, wherein the magnetic field B to which the quantum device is exposed has a value such that g.Math.μ.sub.B.Math.B>min(Δ(Vbg))−2|M.sub.SO|.

3. The method according to claim 1, further including, during a phase of initialising or reading the qubit, applying the electric potential Vbg having a value such that Δ(Vbg)>g.Math.μ.sub.B.Math.B+10|M.sub.SO|.

4. The method according to claim 1, wherein the semiconductor portion and/or the front gate are dissymmetric relative to a plane passing through the centre of the semiconductor portion and parallel to at least one second of the side faces of the semiconductor portion.

5. The method according to claim 4, wherein the first and second side faces of the semiconductor portion correspond to the same side face of the semiconductor portion.

6. The method according to claim 1, wherein the front gate covers a single upper ridge of the semiconductor portion.

7. The method according to claim 1, wherein the front gate includes two distinct parts each covering a single upper ridge of the semiconductor portion formed at a junction of the upper face and one of the side faces of the semiconductor portion, both upper ridges covered with both distinct parts of the front gate being substantially parallel to each other.

8. The method according to claim 1, wherein the quantum device further includes at least two side gates covering second parts of the semiconductor portion which are located on either side of a first part of the semiconductor portion defining the qubit, and wherein, upon manipulating the spin state of the qubit of the quantum device, electric potentials having different values from each other are applied to both side gates.

9. The method according to claim 1, wherein the quantum device further includes at least two distinct electrically conducting spacers which are disposed against two opposite sides of the front gate, and wherein, upon manipulating the spin state of the qubit of the quantum device, electric potentials having different values from each other are applied to both electrically conducting spacers.

10. The method according to claim 1, wherein the semiconductor portion includes four ends connected to a centre part and each covered at least partially with a part of the front gate which is distinct from the other parts of the front gate, and wherein, upon manipulating the spin state of the qubit of the quantum device, the RF signal is applied to two neighbouring parts of the front gate.

11. The method according to claim 1, wherein the quantum device includes several spin qubits formed in several distinct semiconductor portions, the gate being coupled with all the semiconductor portions.

12. The method according to claim 1, wherein the quantum device includes several spin qubits formed in several distinct semiconductor portions, and includes several rear gates each coupled with one of the semiconductor portions.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention will be better understood upon reading the description of exemplary embodiments given by way of purely indicating and in no way limiting purpose in reference to the appended drawings in which:

(2) FIG. 1 shows the energy levels of an electron in different valleys, in silicon;

(3) FIGS. 2 to 4 show different schematic views of a quantum device with a spin qubit controlled by the method according to the invention, according to a first embodiment;

(4) FIG. 5 shows the valley-orbit splitting value obtained by varying the value of the electric potential applied to the rear gate of the spin qubit quantum device according to the first embodiment;

(5) FIG. 6 shows the value of the Rabi frequency obtained by varying the value of the electric potential applied to the rear gate of the spin qubit quantum device, subject of the present invention, according to the first embodiment;

(6) FIG. 7 is a cross-section view of the spin qubit quantum device controlled by the method according to the invention, according to a second embodiment;

(7) FIG. 8 corresponds to a schematic partial perspective view of a spin qubit quantum device controlled by the method according to the invention, according to a third embodiment;

(8) FIG. 9 shows the increase in the SOiv achieved by increasing a potential difference applied to the ends of the nanowire of the spin qubit quantum device according to the third embodiment;

(9) FIG. 10 shows examples of potentials applied to the front and rear gates during a method for controlling a spin qubit quantum device, subject of the present invention;

(10) FIG. 11 shows a schematic partial perspective view of a spin qubit quantum device, subject of the present invention, according to a fourth embodiment;

(11) FIG. 12 shows a schematic partial perspective view of a spin qubit quantum device, subject of the present invention, according to a fifth embodiment.

(12) Identical, similar or equivalent parts of the different figures described hereinafter bear the same reference numerals so as to facilitate switching from one figure to the other.

(13) The different parts shown in the figures are not necessarily drawn to a uniform scale, to make the figures more readable.

(14) The different possibilities (alternatives and embodiments) should be understood as being non-exclusive to each other and can be combined to each other.

DETAILED DISCLOSURE OF PARTICULAR EMBODIMENTS

(15) FIGS. 2 to 4 are first referred to, which correspond to different views of a quantum device 100 according to a first embodiment. In these figures, only part of the device 100 forming a single spin qubit is shown, although the device 100 advantageously includes several spin qubits formed next to each other on a same substrate, for example disposed by forming a matrix of spin qubits.

(16) The device 100 includes a semiconductor portion 102, here corresponding to a silicon nanowire. The length l2 of the portion 102, which corresponds to its dimension along the axis X in FIGS. 2 to 4, is typically between about 15 and 100 nm, its width w, which corresponds to its dimension along the axis Y, is for example advantageously between about 15 and 100 nm (but can be arbitrarily large), and its thickness e.sub.102, which corresponds to its dimension along the axis Z, may be between about 4 and 40 nm.

(17) Further, in this first embodiment, the portion 102 has a substantially parallelepiped rectangle shape and includes an upper face 115, a lower face 117 and four side faces 116 (referenced 116.1 to 116.4 in FIGS. 2 to 4) which are substantially perpendicular to the upper and lower faces 115, 117. Other shapes for the semiconductor portion 102 are however contemplatable.

(18) In the device 100, the portion 102 is intended to form a quantum dot corresponding to a spin qubit.

(19) The portion 102 is disposed on a dielectric layer 104 comprising for example SiO.sub.2. The lower face 117 of the portion 102 bears against an upper part 106 of the layer 104 which has a thickness e.sub.106 for example between about 0 nm (this upper part 106 may not be present) and 10 nm, and which is etched according to the pattern formed by the portion 102 in the plane (X,Y) which is parallel to the upper and lower faces 115, 117.

(20) The portion 102 is partially covered with a front gate 108. This front gate 108 is formed by a first electrically conducting portion 110 and a first dielectric portion 112 disposed between the first electrically conducting portion 110 and the portion 102. Optionally, a second dielectric portion 114 may be disposed between the first dielectric portion 112 and the portion 102, as is the case in FIGS. 2 to 4.

(21) In this first embodiment, the front gate 108 covers a part of a single of the side faces 116 of the portion 102. In FIGS. 2 to 4, the side faces 116 of the portion 102, referenced 116.1 to 116.4, correspond to four faces substantially parallel to the planes (X, Z) and (Y, Z). In these figures, the front gate 108 covers a part of the side face referenced 116.1 but does not cover the side faces referenced 116.2, 116.3 and 116.4. In addition, the front gate 108 covers a part of the upper face 115 of the portion 102.

(22) In FIGS. 2 to 4, the dimension “a” represents the part of the width of the portion 102 covered with the front gate 108, the value of the ratio a/w being included in the interval]0; 1[.

(23) The device 100 also includes a rear gate 120, visible in FIGS. 3 and 4, enabling the position of the wave function of the qubit to be electrostatically controlled and thus the Δ and M.sub.SO values to be modified upon manipulating the qubit spin state. This rear gate 120 enables the vertical electric field produced in the portion 102 to be adjusted.

(24) The length l1 of the front gate 108 is lower than the length l2 of the portion 102 in order to form a quantum dot in the part of the nanowire 102 covered with the gate 108.

(25) By thus covering a single side face 116.1 and a part of the upper face 115 of the portion 102, the front gate 108 partially covers (because l1<l2) a single upper ridge 113 of the portion 102 formed at the junction of the upper face 115 and the side face 116.1 of the portion 102. This particular configuration of the front gate 108 introduces a dissymmetry in the structure of the device 100, by considering both parts of the device 100 located on each side of a plane parallel to the plane (X, Z) and passing through the middle of the portion 102, both parts being different from each other. In FIG. 4, this plane parallel to the plane (X,Z) and passing through the middle of the nanowire 102 is symbolically represented by a dotted line designated by reference 119.

(26) Although they are not shown, the device 100 may include means able to generate the homogeneous magnetic field B to which the portion 102 is exposed upon using the device 100. The value of the magnetic field B may be between about 200 mT and 2 T.

(27) Thanks to the dissymmetric structure of the front gate 108, the electric potential applied to the rear gate 120 and that applied to the front gate 108 upon manipulating the qubit spin state enable an electric charge to be confined in a region of the portion 102 close to the upper ridge 113 of the portion 102 and covered with the front gate 108 and thus the wave function of this charge to be located in the proximity of this upper ridge 113. The region of the portion 102 in which the wave function of the electric charge the spin of which is manipulated is located is symbolically shown in dotted line in FIG. 4 and is designated by reference 118.

(28) By considering that the semiconductor portion 102 is formed with an upper part and a lower part spaced from each other by a first plane parallel to the upper and lower faces 115, 117 and passing through the centre of the portion 102, and with two side parts separated from each other by a second plane also passing through the centre of the portion 102 and parallel to the side face 116.1 forming the ridge 113 covered with the front gate 108, the wave function of the electric charge the spin of which is manipulated is located, upon manipulating the spin state, in the upper part and in the side part which includes the upper ridge 113, that is in the proximity of this upper ridge 113, under the part of the portion 102 covered with the front gate 108.

(29) The confinement at the intersection of the faces 115 and 116.1 exacerbates the SOiv by boosting the surface contribution and by suppressing the limitations imposed by the symmetries (confinement in a structure with a symmetry as low as possible). By adjusting both potentials of the front (Vfg) and rear (Vbg) gates, it is further possible to control the electric field in the structure and to properly control the position of the charge within the portion 102, in particular to properly control the distance of this charge with respect to the interfaces between the portion 102 and the dielectric layers 104 and 106. But, the value of the valley-orbit splitting Δ is particularly dependent on the proximity of the electric charge with these interfaces. The value of the electric potential Vbg applied to the rear gate 120 can thus be adjusted such that the energy of this charge is close to or beyond the point of the resonance region (region 18 in the FIG. 1) where the levels v1↑ and v2↓ cross each other, that is fulfils the condition Δ(Vbg)<g.Math.μ.sub.B.Math.B+2|M.sub.SO| (or |Δ(Vbg)−g.Math.μ.sub.B.Math.B|≤2|M.sub.SO| to remain close to the resonance region).

(30) Switching from state v1↓ to state v2Θ can thus be quickly achieved via the application of an RF signal to the front gate 108, and then from state v2↓ to state v1↑ thanks to of the spin-orbit coupling by adjusting Vbg so as to come back adiabatically in the spin qubit regime with Δ(Vbg)>g.Math.μ.sub.B.Math.B+2|M.sub.SO|. A sharp rotation from state v1↓ to state v1↑ is made, which is characteristic of EDSR.

(31) Thus, by controlling the Δ value, it is for example possible, during a phase of manipulating the spin state (switching from one to the other of states v1↑ and v1↓), to apply to the rear gate 120 and to the front gate 108 potentials enabling the qubit to fulfil the condition Δ(Vbg)<g.Math.μ.sub.B.Math.B+2|M.sub.SO|, and thus the manipulation of the qubit state to be quickly made.

(32) At the end of this manipulation, for example during a phase of initialising, reading or resting for the qubit, the value of the potential applied to the rear gate 120 can be modified in order to increase the Δ value, which causes a return to the spin qubit regime far from the resonance region in which the energy level of the state v1↑ is close to that of state v2↓, thus improving stability in the spin state. During a phase of initialising or reading the qubit, the value of the electric potential Vbg applied can be such that Δ(Vbg)>g.Math.μ.sub.B.Math.B+10|M.sub.SO| (or even such that |Δ(Vbg)−g.Math.μ.sub.B.Math.B|≥10|M.sub.SO|).

(33) FIG. 5 shows the Δ value obtained in the device 100 as a function of the value of the electric potential Vbg applied to the rear gate 120.

(34) The value of the magnetic field B is advantageously chosen such that the value of g.Math.μ.sub.B.Math.B is higher than min(Δ(Vbg))−2|M.sub.SO|, with min(Δ(Vbg)) which corresponds to the minimum value of Δ(Vbg) of the device 100. When the device 100 includes several qubits, this value of the magnetic field B is chosen by considering the above relationship for each of the qubits of the device 100. In the example in FIG. 5, the value of the magnetic field B is set such that the value of g.Math.μ.sub.B.Math.B, designated by the dotted line referenced 20, is higher than the minimum value of Δ(Vbg) represented by the curve 22, and for example equal to about 1 T. Upon manipulating the spin state, the potential Vbg is chosen such that Δ(Vbg)<g.Math.μ.sub.B.Math.B+2|M.sub.SO|. This corresponds, in FIG. 5, to a Vbg included between both intersections of the curve 22 with the straight line 20 which correspond to the intersections between the states v1↑ and v2↓.

(35) By further applying the RF signal with a proper resonant frequency to the front gate 108, a modulation in the Rabi frequency as a function of Vbg is achieved. The curve 24 shown in FIG. 6 corresponds to the Rabi frequency (spin rotational frequency) obtained along the straight line 20 shown in FIG. 5.

(36) Examples of signals Vbg (electric potential applied to the rear gate 120) and Vfg (potential applied to the front gate 108) applied during the different previously described phases are shown in FIG. 10. In these examples, during the phases of initialising or reading the qubit, the potential Vfg is 0.1V and the potential Vbg is −0.2V.

(37) During a step of manipulating the spin state, an RF signal oscillating between −0.5 mV and 0.5 mV is added to the potential Vfg, and the potential Vbg is 0.02V. The frequency f of the RF signal is equal to ΔE/h, with ΔE corresponding to the deviation between the curves 10 and 12 shown in FIG. 1, that is the deviation between the energy levels v1↓ and v1↑, before the resonance 18, or between the levels v1↓ and v2↓ after this resonance (h is the Planck constant). The value of the magnetic field B is for example chosen such that ΔE>>kT, that is f>4 GHz at T=0.1 K, and such that f<50 GHz in order to operate at frequencies accessible with a quick electronics.

(38) Generally, the potential Vfg applied can be positive and have an amplitude in the order of 0.1V, for example between 0.05V and 0.2V. The value of this potential depends in particular on the geometry of the quantum device 100, its dimensions, the material used, etc.

(39) Apart from this phase of manipulating the spin state, for example during a phase of initialising or reading the qubit, the electric potential Vbg applied to the rear gate is such that the qubit is off resonance in order to avoid any inopportune switching between the states v1↑ and v1↓ assisted by the SOiv via the state v2↓. To that end, the electric potential Vbg can be such that Δ(Vbg)>g.Math.μ.sub.B.Math.B+10|M.sub.SO|.

(40) In addition, by considering several spin qubits formed within the device 100, Δ can be individually controlled for each spin qubit formed in a semiconductor portion similar to the portion 102 associated with a front gate 108 which can be independently controlled from the other gates, without having to modify the value of the magnetic field B to which all the qubits are subjected. This is very interesting because in a same magnetic field B, the energy within the different qubits varies, in particular because of the different interface roughnesses in these qubits.

(41) In this first embodiment, the rear gate 120 is formed by an electrically conducting layer, comprising for example doped semiconductor and/or metal, disposed under the dielectric layer 104 such that the dielectric layer 104 is disposed between the rear gate 120 and the portion 102.

(42) This rear gate 120 can be associated with one or more qubits. Thus, the rear gate 120 can be made either overall for all the qubits, for example in the form of a conducting plane disposed under all the qubits, or locally and thus be associated with a qubit or only part of the qubits.

(43) In the first embodiment described previously, the value of the SOiv is increased thanks to the dissymmetry of the front gate 108 with respect to the plane parallel to the plane (X,Z) and passing through the middle of the nanowire 102, and thanks to the electric field generated by the potential applied to the rear gate 120. Generally, this value of the SOiv can be increased by making the device 100 such that the front gate 108 and the portion 102 form a dissymmetric assembly with respect to a plane passing through the centre of the portion 102 and parallel to at least one of the side faces 116 of the portion 102.

(44) In a second embodiment, the SOiv is increased thanks to a dissymmetry of the front gate 108 and/or the part of the portion 102 covered with the front gate 108 with respect to a plane parallel to the plane (Y, Z) and passing through the middle of the portion 102.

(45) FIG. 7 shows a cross-section view of the device 100 according to this second embodiment. The dotted line designated by reference 121 symbolically represents the plane with respect to which the assembly formed by the front gate 108 and the portion 102 has a dissymmetry. In this figure, the dissymmetry of the portion 102 comes from the fact that at each side of the portion 102, at the side faces 116.1 and 116.2, the portion 102 includes projecting parts 122 which are not symmetrical with respect to the plane 121.

(46) Alternatively to the example shown in FIG. 7, it is possible that this dissymmetry with respect to the plane 121 is only formed by the front gate 108, for example by making it as a bevel such that the structure of this front gate 108 is different on either side of the plane 121. In this case, the portion 102 can be dissymmetric or not with respect to the plane 121.

(47) FIG. 8 schematically shows the device 100 according to a third embodiment.

(48) The device 100 includes the portion 102, the dielectric layer 104 and the front gate 108 made analogously to the first embodiment, that is such that the front gate 108 only covers a single upper ridge 113 of the portion 102.

(49) The device 100 further includes further side gates 124.1 and 124.2 disposed around each of both ends of the portion 102, in the proximity of the side faces 116.3 and 116.4. Each of the side gates 124.1, 124.2 covers a part of each of the side faces 116.1 and 116.2 and of the upper face 115 of the portion 102. Thus, the side gates 124.1 and 124.2 cover second parts of the portion 102 located on either side of a first part of the portion 102 defining the qubit.

(50) In the example of FIG. 8, the side gates 124.1 and 124.2 are similar with respect to each other. Alternatively, it is possible that the side gates 124.1 and 124.2 are different from each other.

(51) These further side gates 124.1 and 124.2, disposed on either side of the quantum dot formed by the front gate 108 and the part of the portion 102 covered with the front gate 108, enable a further dissymmetry to be introduced within the qubit, thus further increasing the SOiv, via the application of different electric potentials on these side gates 124.1 and 124.2, and thus enabling to locale the wave function of the electric charge the spin state of which is manipulated in a region of the portion 102 being under the front gate 108 but not centered with respect to this front gate 108. It is for example possible to apply a first electric potential V1 to the gate 124.1 and to apply a second electric potential V2 to the gate 124.1, with V2<V1 which enables to locate this wave function in the proximity of the upper ridge 113 covered with the front gate 108, on the side of the side gate 124.1. By choosing V2>V1, the wave function is thereby located in the proximity of the upper ridge 113, but on the side of the side gate 124.2.

(52) FIG. 9 shows the increase in the SOiv value obtained by increasing the value of the potential difference V1-V2 applied between the side gates 124.1, 124.2.

(53) Alternatively to the side gates 124.1, 124.2, it is possible to form, around the front gate 108, at least two electrically conducting spacers, for example of polysilicon, forming barriers providing a similar function to that of the side gates 124.1, 124.2. These electrically conducting spacers are disposed against two opposite sides of the front gate 108 and spaced from the conducting material 110 of the front gate 108 by a dielectric material interposed between the conducting material 110 and that of the conducting spacers.

(54) FIG. 11 shows the device 100 according to a fourth embodiment.

(55) In this fourth embodiment, the front gate 108 includes two distinct parts 108.1 and 108.2 each covering an upper ridge of the portion 102. The first part 108.1 of the front gate 108 formed in this fourth embodiment is for example similar to the front gate 108 of the device 100 according to the first embodiment and partially covers the upper ridge 113.1. The second part 108.2 of the front gate covers the upper ridge 113.2 formed at the junction of the upper face 115 and the side face 116.2, both upper ridges 113.1 and 113.2 covered with the parts 108.1 and 108.2 being substantially parallel to each other.

(56) FIG. 12 shows the device 100 according to a fifth embodiment.

(57) In this fifth embodiment, the portion 102 includes a centre part 126 and four ends 128.1-128.4 connected to this centre part 126. In the example of FIG. 12, the portion 102 has, in the plane (X, Y) parallel to the upper and lower faces 115, 117 of this portion 102, a cross shape.

(58) Each of the ends 128.1-128.4 is covered with a gate 108.1-108.4 forming together the front gate 108 of the device 100. Each of these gates 108.1-108.4 covers a part of the upper face 115 and both side faces being located at one of the ends 128.1-128.4. Thus, each of the gates 108.1-108.4 cover two of the upper side ridges of the portion 108 connecting the ends to each other. In FIG. 12, these four upper side ridges bear to references 113.1-113.4.

(59) Upon manipulating the qubit spin state formed in the portion 102, the rear gate 120 (not visible in FIG. 12) of the device 100 is negatively polarised such that the wave function of the electric charge the spin of which is manipulated is located in the proximity of the upper face 115 of the portion 102. The electric signals thus applied to the front gates 108.1-108.4 thereby enable this wave function to be located in the proximity of one of the upper ridges 113.1-113.4. For example, to locate the wave function in the proximity of the upper ridge 113.1, the rear gate 120 is negatively polarised and the gates 108.1 and 108.2 are positively polarised in order to force this positioning of the wave function. Without these electric potentials applied to the rear gate 120 and to the front gates 108.1-108.4, the wave function is localised in the centre part 126 of the portion 102.

(60) FIG. 12 shows the portion 102 which only forms a single qubit. When the device 100 includes several qubits, the semiconductor portion forming these qubits can correspond to the juxtaposition of several portions 102 similar to that shown in FIG. 12 and connected to each other through their ends 128.1-128.4. Each of the gates 108 formed on one of the ends can be common to two neighbouring qubits.