Solid-state battery layer structure and method for producing the same

Abstract

There is provided a solid-state battery layer structure which may include an anode current collector metal layer, an anode layer arranged on the anode current collector metal layer, a solid electrolyte layer arranged on the anode layer laterally, a cathode layer arranged on the solid electrolyte layer, and a cathode current collector metal layer, and a plurality of nanowire structures comprising silicon and/or gallium nitride, wherein said nanowire structures are arranged on the anode layer and, wherein said nanowire structures are laterally and vertically enclosed by the solid electrolyte layer, wherein the anode layer comprises silicon and a plurality of metal vias connecting the plurality of nanowire structures with the anode current collector metal layer. Methods for producing solid-state battery layer structures are also provided.

Claims

1. A solid-state battery layer structure comprising: an anode current collector metal layer; an anode layer arranged on the anode current collector metal layer; a solid electrolyte layer arranged on the anode layer laterally; a cathode layer arranged on the solid electrolyte layer; and a cathode current collector metal layer; and a plurality of nanowire structures comprising silicon and/or gallium nitride, wherein the plurality of nanowire structures are arranged on the anode layer and, wherein the plurality of nanowire structures are laterally, and vertically enclosed by the solid electrolyte layer, wherein the anode layer comprises silicon and a plurality of metal vias, each metal via directly connected to a respective nanowire structure among the plurality of nanowire structures, the plurality of metal vias connecting the plurality of nanowire structures with the anode current collector metal layer.

2. The solid-state battery layer structure according to claim 1, wherein the anode layer comprises gallium nitride.

3. The solid-state battery layer structure according to claim 1, wherein each nanowire structure of the plurality of nanowire structures comprises a vertical stem and a plurality of branches extending from the vertical stem, wherein the vertical stems of the plurality of nanowire structures are arranged perpendicularly to a top surface of the anode layer.

4. The solid-state battery layer structure according to claim 1, wherein the solid electrolyte layer comprises lithium phosphate.

5. The solid-state battery layer structure according to claim 1, wherein the cathode layer comprises lithium cobalt oxide or another metal oxide.

6. The solid-state battery layer structure according to claim 1, wherein the cathode current collector metal layer comprises aluminium.

7. The solid-state battery layer structure according to claim 1, wherein the anode current collector metal layer comprises copper.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The above and other aspects of the present invention will, in the following, be described in more detail with reference to appended figures. The figures should not be considered limiting; instead they should be considered for explaining and understanding purposes.

(2) As illustrated in the figures, the sizes of layers and regions may be exaggerated for illustrative purposes and, thus, are provided to illustrate the general structures. Like reference numerals refer to like elements throughout.

(3) FIG. 1 shows a cross section of a solid-state battery layer structure.

(4) FIG. 2 shows a cross section of a solid-state battery layer structure comprising nanowire structures.

(5) FIG. 3 shows a cross section of a solid-state battery layer structure comprising nanowire structures and vias.

(6) FIG. 4 shows a flowchart with steps for forming solid-state battery layer structures.

(7) FIG. 5a-h show cross sections of a solid-state battery layer structure during various stages of its production.

(8) FIG. 6 shows a flowchart with steps for forming nanowire structures.

(9) FIG. 7a-d show cross sections of nanowire structures during different stages of their formation.

DETAILED DESCRIPTION

(10) The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which currently preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided for thoroughness and completeness, and to fully convey the scope of the invention to the skilled person.

(11) FIG. 1 shows a cross sectional view of a solid-state battery layer structure 100. The solid-state battery layer structure comprises: an anode current collector metal layer 110; an anode layer 120 arranged on the anode current collector metal layer; a solid electrolyte layer 140 arranged on the anode layer laterally; a cathode layer 150 arranged on the solid electrolyte layer; and a cathode current collector metal layer 160,
wherein the anode layer comprises silicon.

(12) The anode current collector metal layer 110 may comprise or substantially consist of copper. The anode current collector metal layer 110 may alternatively or additionally comprise one of the other metal materials: gold, silver, platina, nickel, titanium, zinc, chromium, tin, lead, manganese, cobalt, and iron. The anode current collector metal layer 110 may comprise an alloy material.

(13) The anode layer 120 may comprise <111> silicon. The anode layer 120 may be a crystaline silicon substrate or wafer. The anode layer 120 may comprise or substantially consist of gallium nitride. The anode layer 120 may comprise a thin upper sublayer of gallium nitride arranged on a lower sublayer of silicon. The anode layer comprising 120 GaN may be passivated with hydrogen. Lithium may be incorporated or alloyed into the anode layer 120.

(14) The solid electrolyte layer 140 may comprise or substantially consist of lithium phosphate (Li.sub.3PO.sub.4). The solid electrolyte layer 140 may additionally or alternatively comprise or substantially consist of other materials such as lithium iron phosphate (Li.sub.3FePO.sub.4) or lithium phosphorus oxynitride (LiPON).

(15) Other lithium compounds may also be available for the solid electrolyte layer 140.

(16) The solid electrolyte layer 140 may feature atomic vacancies at lithium atom lattice locations to allow for conduction by diffusion of lithium ions through the solid electrolyte layer 140. The solid electrolyte layer 140 may comprise magnesium replacement or impurity atoms to restore the equilibrium of charges in the lattice that may be lost by introducing the lattice lithium vacancies.

(17) The solid electrolyte layer 140 may have a thickness in the range 500-5000 nm.

(18) The cathode layer 150 may comprise or substantially consist of lithium cobalt oxide (LoCoO.sub.2). The cathode layer 150 may alternatively or additionally comprise other metal oxide based materials.

(19) The cathode current collector metal layer 160 may comprise or substantially consist of aluminium. The cathode current collector metal layer 160 may alternatively or additionally comprise one of the other metal materials: gold, silver, platina, nickel, titanium, zinc, chromium, tin, lead, manganese, cobalt, and iron. The cathode current collector metal layer 160 may comprise an alloy material.

(20) FIG. 2 shows the solid-state battery 100 layer structure further comprising a plurality of nanowire structures 130. Said nanowire structures 130 may be arranged on the anode layer 120. Said nanowire structures 130 may be laterally and vertically enclosed by the solid electrolyte layer 140.

(21) Each nanowire structure 130 of said plurality of nanowire structures may comprise a vertical stem 132 and a plurality of branches 134 extending from said vertical stem 132. The vertical stems of said plurality of nanowire structures may be arranged perpendicularly to a top surface 122 of the anode layer 120.

(22) The nanowire structures 130 may be arranged in a hexagonal pattern on the top surface 122 of the anode layer 120. The vertical stems 132 of the nanowire structures 130 may be arranged with a spacing to the nearest other vertical stem 132 in the range 100-1000 nm. More preferably, the spacing is in the range 250-750 nm. Most preferably, the spacing is in the range 400-600 nm.

(23) The nanowire structures 130 may alternatively be arranged on the anode layer 120 with arbitrary orientations of each individual nanowire structure 130. Such formation may be less complex while still increasing the effective anode-electrolyte interface area.

(24) The vertical stems 132 may have a length in the range 500-5000 nm. More preferably, the the length is in the range 1000-3000 nm. Most preferably, the length is in the range 1500 nm-2500 nm.

(25) The branches 134 may have a length in the range 50-500 nm. More preferably, the length is in the range 50-250 n. Most preferably, the length is in the range 50-150 nm.

(26) Said plurality of nanowire structures may comprise or substantially consist of silicon. Said nanowire structures 130 may comprise crystaline silicon with a crystal lattice direction <111> corresponding to the vertical direction of the nanowire structures.

(27) Said plurality of nanowire structures may comprise or substantially consist of gallium nitride. Said nanowire structures 130 may comprise crystaline gallium nitride with a crystal lattice direction <0001> corresponding to the vertical direction of the nanowire structures. Gallium nitride nanowire structures 130 may feature a hydrogen passivation layer on the surfaces and faces of the nanowire structures 130 to saturate unsaturated dangling bonds at the gallium nitride surface.

(28) The nanowire structures 130 may incorporate or alloy Li into their surface or bulk lattice.

(29) FIG. 3 shows the anode layer 120 comprising a plurality of metal vias 224 connecting the plurality of nanowire structures 130 with the anode current collector metal layer 110. The metal vias 224 may comprise or substantially consist of a same material existing in the anode current collector metal layer 110.

(30) FIG. 4 shows a flowchart of a method for producing a solid-state battery layer structure 100. The method is shown to comprise steps of: providing S1002 an anode layer 120; forming S1004 a plurality of nanowire structures 130 on the anode layer 120, each nanowire structure 130 comprising a vertical stem 132 and a plurality of branches 134 extending from the vertical stem 132, wherein the vertical stems 132 of the nanowire structures 130 are formed perpendicularly to a top surface 122 of the anode layer 120; depositing S1006 a solid electrolyte layer 140 on the anode layer 120, the solid electrolyte layer 140 laterally and vertically enclosing said plurality of nanowire structures 130; depositing S1008 a cathode layer 150 on the solid electrolyte layer 140; depositing S1010 a cathode current collector metal layer 160 on the cathode layer 140; and depositing S1012 an anode current collector metal layer 110 on a bottom surface 326 of the anode layer 120.

(31) The plurality of nanowires structures 130 may be formed by a MOVPE, or a CVD process. The process may be seed particle mediated. The pattern in which the nanowire structures 130 are arranged may be formed using lithography techniques such as ultra-violet lithography (UVL), electron beam lithography (EBL), and nanoimprint lithography (NIL). Pattern transfer may be achieved through etching methods.

(32) Nanosphere lithography (NSL) may be used together with chlorine-based plasma etching to etch out entire vertical stems 132. As such, the need for MOVPE may be circumvented, at least for the formation of the vertical stems 132. The nanowire structures 130 may be passivated in-situ before, during, or after MOVPE processing. The nanowire structure 130 may be passivated with hydrogen.

(33) The method may further comprise incorporating or alloying lithium into the surface or bulk lattice of the nanowire structures 130. This may be achieved through electrochemical processing. Lithium may be deposited onto the nanowire structures 130 before solid electrolyte layer 140 deposition S1006. Lithium may be deposited by thermal evaporation.

(34) The solid electrolyte layer 140 may be deposited S1006 by a CVD process. The solid electrolyte layer 140 may be deposited by PVD or sputtering process. The sputtering process may be a pulsed DC (direct current) or RF (radio frequency) based sputtering process. The solid electrolyte layer 140 may encapsulate any lithium deposited onto the nanowire structures 130.

(35) The cathode layer 150 may be deposited S1008 by a CVD process. The cathode current collector metal layer 160 may be deposited S1010 by a PVD process. The anode current collector metal layer 110 may be deposited S1012 by a PVD process.

(36) FIG. 4 also shows how the method may further comprise etching S3002, from the bottom surface 326 of the anode layer 120, holes 328 through the anode layer 120. In this eventuality, the step of depositing S1012 the anode current collector metal layer 110 on the bottom surface 326 of the anode layer 120 further comprises filling the holes 328 with a same material as a material of the anode current collector metal layer 110. The filled in holes 328 may correspond to the vias 224 in FIG. 3.

(37) Also shown in FIG. 4, the method may further comprise aligning S4002 the holes 328 through the anode layer 120 with said plurality of nanowire structures 130 i.e. so that each hole 328 corresponds to the position of a nanowire structure 130.

(38) The holes 328 may be etched S3002 by a reactive ion etching (RIE) process. The RIE process may be a dry RIE process.

(39) FIGS. 5a-5h show cross sectional views of layers and structures of the solid-state battery layer structure 100 during various stages of its production.

(40) FIG. 5a shows the anode layer 120 having been provided S1002, the anode layer 120 being the base for subsequent processing steps.

(41) FIG. 5b shows the plurality of nanowire structures 130, each comprising vertical stems 132 and branches 134, having been formed S1004 wherein the vertical stems 132 of the nanowire structures 130 are formed perpendicularly to the top surface 122 of the anode layer 120.

(42) FIG. 5c shows the solid electrolyte layer 140 having been deposited S1006 on the anode layer 120 such that it laterally and vertically encloses the plurality of nanowire structures 130.

(43) FIG. 5d shows the cathode layer 150 having been deposited S1008 on the solid electrolyte layer 140.

(44) FIG. 5e shows the cathode current collector metal layer 160 having been deposited S1010 on the cathode layer 150. The battery layer structure may be flipped after step S1010 in order to accommodate subsequent processing steps.

(45) FIG. 5f shows the anode current collector metal layer 110 having been deposited S1012 on the bottom surface 326 of the anode layer 120, thus completing the solid-state battery layer structure 100.

(46) FIGS. 5g-h show an alternative route to complete the layer structure 100 compared to the route shown in FIG. 5f.

(47) FIG. 5g shows the holes 328 having been etched S3002 from the bottom through the anode layer 120, from its bottom surface 326. The holes 328 are also shown to have been aligned S4002 with the nanowire structures 130.

(48) FIG. 5h shows the anode current collector metal layer 110 having been deposited S1012 on the bottom surface 326 of the anode layer 120 and into the holes 328 through the anode layer 120, thus completing the solid-state battery layer structure 100.

(49) FIG. 6 shows a flowchart of the step of forming S1004 said plurality of nanowire structures 130. The step S1004 may comprise: forming S2002 a plurality of stem seed particles 436 on the top surface 122 of the anode layer 120; epitaxially growing S2004 the vertical stems 132 of said plurality of nanowire structures 130 from said plurality of stem seed particles 436; depositing S2006 branch seed particles 438 on the vertical stems 132; and epitaxially growing S2008 the branches 134 of said plurality of nanowire structures 130 from said branch seed particles 438.

(50) The stem seed and branch seed particles 436, 438 may be e.g. gold seed particles. The stem seed and branch seed particles 436, 438 may comprise other materials than gold such as e.g. silver, palladium, cobalt, bismuth, and platina. The stem seed and branch seed particles 436, 438 may be deposited using aerosol deposition. Deposition or formation of the plurality of seed particles 436, 438 may be formed with or without preferred co-alignment onto their respective surfaces or structures. The stem seed particle 436 may be formed using lithography-based patterning techniques. Such a technique may include forming a gold layer onto the anode layer 120 through electroplating, evaporation, or sputtering followed by lithography-based patterning, e.g. with resist coating, exposure, and etching steps to achieve a well-defined pattern of remaining stem seed particles 436 on the top surface 122 of the anode layer 120.

(51) The nanowire structures 130 may be grown using seed particle mediated epitaxy. Essentially, this may mean that crystalline nanowire structures 130 are epitaxially grown from the seed particles 436, 438. The seed particles 436, 438 may first absorb precursor gases.

(52) FIGS. 7a-d show a cross sectional, or side views, of nanowire structures 130 during different stages of their formation.

(53) FIG. 7a shows a plurality of stem seed particles 436 having been formed S2002 on the top surface 122 of the anode layer 120.

(54) FIG. 7b shows the vertical stems 132 having been epitaxially grown S2004.

(55) FIG. 7c shows branch seed particles 438 having been deposited S2006 on the vertical stems 132.

(56) FIG. 7d shows the branches 134 having been epitaxially grown S2008.

(57) Additionally, variations to the disclosed embodiments can be understood and effected by the skilled person in practicing the claimed invention, from a study of the drawings, the disclosure, and the appended claims.