SILICON WAFER AND METHOD FOR PRODUCING SILICON WAFER

Abstract

A silicon wafer is provided which is a Czochralski wafer formed of silicon, and a method for producing the silicon wafer are provided. The wafer includes a bulk layer having an oxygen concentration of 0.5×10.sup.18/cm.sup.3 or more; and a surface layer extending from the surface of the wafer to 300 nm in depth, and having an oxygen concentration of 2×10.sup.18/cm.sup.3 or more.

Claims

1. A silicon wafer comprising a Czochralski wafer obtained by slicing an ingot of single crystal silicon, the Czochralski wafer including: a bulk layer having an oxygen concentration of 0.5×10.sup.18/cm.sup.3 or more; and a surface layer extending from a surface of the wafer to 300 nm in depth, and having an oxygen concentration of 2×10.sup.18/cm.sup.3 or more.

2. The silicon wafer according to claim 1, wherein the surface layer from the surface to 300 nm in depth has an oxygen concentration of 2.5×10.sup.18/cm.sup.3 or more.

3. The silicon wafer according to claim 1, wherein in a region of the wafer from the surface to 30 μm in depth, the density of void defects having a size of 15 nm or more is 1×10.sup.6/cm.sup.3 or less, and the density of oxygen precipitates having an equivalent spherical diameter of 15 nm or more is 1×10.sup.6/cm.sup.3 or less.

4. The silicon wafer according to claim 1, wherein in a region of the wafer from 100 μm in depth to a thickness center of the wafer, a vacancy concentration is 1×10.sup.12/cm.sup.3 or more.

5. The silicon wafer according to claim 1, wherein a concentration difference C.sub.v-C.sub.1 between a vacancy concentration C.sub.v and an interstitial silicon atom concentration C.sub.1 in the single-crystal silicon is within a range of −2.0×10.sup.12/cm.sup.3 or more and 6.0×10.sup.12/cm.sup.3 or less.

6. A production method for producing a silicon wafer including a surface layer, and obtained by slicing an ingot of single-crystal silicon grown by a Czochralski method, the production method comprising: in an oxidizing atmosphere, keeping the silicon wafer for 5 seconds or more and 30 seconds or less at a maximum temperature within a range of 1315° C. or more and 1375° C. or less, and then cooling the silicon wafer from the maximum temperature to 1100° C. at a cooling rate of not less than 50° C./second and not more than 150° C./second; and after the cooling of the silicon wafer, removing the surface layer (2) to a depth where an oxygen concentration is 2×10.sup.18/cm.sup.3 or more.

7. The production method according to claim 6, wherein the maximum temperature is within a range of 1325° C. or more and 1350° C. or less.

8. The production method according to claim 6, wherein the oxidizing atmosphere is an oxygen atmosphere of which the oxygen partial pressure is within a range of 1% or more and 100% or less.

9. The production method according to claim 6, further comprising subjecting the wafer to heat treatment within a range of 1 hour or more and 4 hours or less and within a range of 800° C. or more and 1000° C. or less such that in a region of the wafer from 100 μm in depth to a thickness center of the wafer, oxygen precipitates having an equivalent spherical diameter of 15 nm or more are formed at a density of 1×10.sup.8/cm.sup.3 or more.

10. The production method according to claim 6, wherein vacancies are introduced by the thermal process in an oxidizing atmosphere such that a vacancy concentration is 1×10.sup.12/cm.sup.3 or more in the region of the wafer from 100 μm in depth to the thickness center.

11. The production method according to claim 6, further comprising introducing vacancies and interstitial silicon atoms such that a concentration difference C.sub.v-C.sub.1 between a vacancy concentration C.sub.v and an interstitial silicon atom concentration C.sub.1 in the single-crystal silicon is within a range of −2.0×10.sup.12/cm.sup.3 or more and 6.0×10.sup.12/cm.sup.3 or less.

12. The silicon wafer according to claim 2, wherein in a region of the wafer from the surface to 30 μm in depth, the density of void defects having a size of 15 nm or more is 1×10.sup.6/cm.sup.3 or less, and the density of oxygen precipitates having an equivalent spherical diameter of 15 nm or more is 1×10.sup.6/cm.sup.3 or less.

13. The silicon wafer according to claim 2, wherein in a region of the wafer from 100 μm in depth to a thickness center of the wafer, a vacancy concentration is 1×10.sup.12/cm.sup.3 or more.

14. The silicon wafer according to claim 2, wherein a concentration difference C.sub.v-C.sub.1 between a vacancy concentration C.sub.v and an interstitial silicon atom concentration C.sub.1 in the single-crystal silicon is within a range of −2.0×10.sup.12/cm.sup.3 or more and 6.0×10.sup.12/cm.sup.3 or less.

15. The production method according to claim 7, wherein the oxidizing atmosphere is an oxygen atmosphere of which the oxygen partial pressure is within a range of 1% or more and 100% or less.

16. The production method according to claim 7, further comprising subjecting the wafer to heat treatment within a range of 1 hour or more and 4 hours or less and within a range of 800° C. or more and 1000° C. or less such that in a region of the wafer from 100 μm in depth to a thickness center of the wafer, oxygen precipitates having an equivalent spherical diameter of 15 nm or more are formed at a density of 1×10.sup.8/cm.sup.3 or more.

17. The production method according to claim 8, further comprising subjecting the wafer to heat treatment within a range of 1 hour or more and 4 hours or less and within a range of 800° C. or more and 1000° C. or less such that in a region of the wafer from 100 μm in depth to a thickness center of the wafer, oxygen precipitates having an equivalent spherical diameter of 15 nm or more are formed at a density of 1×10.sup.8/cm.sup.3 or more.

18. The production method according to claim 7, wherein vacancies are introduced by the thermal process in an oxidizing atmosphere such that a vacancy concentration is 1×10.sup.12/cm.sup.3 or more in the region of the wafer from 100 μm in depth to the thickness center.

19. The production method according to claim 8, wherein vacancies are introduced by the thermal process in an oxidizing atmosphere such that a vacancy concentration is 1×10.sup.12/cm.sup.3 or more in the region of the wafer from 100 μm in depth to the thickness center.

20. The production method according to claim 7, further comprising introducing vacancies and interstitial silicon atoms such that a concentration difference C.sub.v-C.sub.1 between a vacancy concentration C.sub.v and an interstitial silicon atom concentration C.sub.1 in the single-crystal silicon is within a range of −2.0×10.sup.12/cm.sup.3 or more and 6.0×10.sup.12/cm.sup.3 or less.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0032] FIG. 1 is a view schematically illustrating a sectional structure of a silicon wafer according to the present invention.

[0033] FIG. 2 is a view showing an oxygen concentration profile of the silicon wafer illustrated in FIG. 1.

[0034] FIG. 3 is a graph showing a vacancy concentration profile of the silicon wafer illustrated in FIG. 1.

[0035] FIG. 4 is a graph showing an oxygen concentration profile (simulation result) after a rapid thermal process.

[0036] FIG. 5 is a graph showing an oxygen concentration profile (simulation result) after polishing the surface layer of the wafer.

[0037] FIG. 6 is a graph showing the comparison of a simulation result of an oxygen concentration profile and an actual measurement result thereof.

[0038] FIG. 7 is a graph showing the relationship between the maximum temperature of a rapid thermal process and an oxygen concentration.

[0039] FIG. 8 is a graph showing the relationship between the maximum temperature of a rapid thermal process and a vacancy concentration.

BEST MODE FOR CARRYING OUT THE INVENTION

[0040] FIG. 1 illustrates a sectional structure of a silicon wafer (hereinafter referred to as the “wafer 1”) according to the present invention. FIG. 2 and FIG. 3 illustrate, respectively, an oxygen concentration profile and a vacancy concentration profile of the wafer 1 illustrated in FIG. 1. The wafer 1 is a Czochralski wafer (i) obtained by slicing a single-crystal silicon ingot grown by the Czochralski method, and (ii) subjected to a predetermined heat treatment (described later). The wafer 1 is used mainly for semiconductor devices having a three-dimensional structure of pillars, fins, etc. The wafer 1 includes a surface layer 2 constituting the region of the wafer from the surface to 300 nm in depth; and a bulk layer 3 constituting a region of the wafer deeper than the surface layer 2. FIG. 1 illustrates only the region of the wafer from the surface to about 150 μm in depth.

[0041] This Czochralski wafer is obtained by slicing a silicon ingot grown by the Czochralski method, and is subjected to a predetermined heat treatment for surface modification. This silicon ingot contains, in the crystals, oxygen, as interstitial oxygen, eluted from a quartz crucible used during growth. While this interstitial oxygen is partially diffused outward from the wafter surface by the above heat treatment, a predetermined amount of interstitial oxygen remains in the surface layer 2. That interstitial oxygen is present in the surface layer 2 of the wafer 1 makes a difference from an epitaxial wafer, in which silicon is epitaxially grown on the surface of a Czochralski wafer by chemical vapor deposition (CVD), and interstitial oxygen is hardly present in the surface layer.

[0042] The surface layer 2 is a device forming region, in which three-dimensional structures are formed. That is, devices are formed in the region of the wafer 1 from the surface to 300 nm in depth. The interstitial oxygen concentration in the surface layer 2 is 2×10.sup.18/cm.sup.3 or more, and preferably 2.5×10.sup.18/cm.sup.3 or more. As described later, this interstitial oxygen is introduced by a rapid thermal process in an oxygen atmosphere. The higher this oxygen concentration, the higher the effect of reducing the silicon missing phenomenon while forming the three-dimensional structures, but by setting this concentration to 2×10.sup.18/cm.sup.3 or more, it is possible to obtain a predetermined reducing effect to such an extent that device formation is not adversely affected. This interstitial oxygen concentration can be increased up to 4×10.sup.18/cm.sup.3, which is the upper limit of the equilibrium concentration (solid solubility) of oxygen in the silicon.

[0043] The bulk layer 3 is located in a region of the wafer 1 deeper than the surface layer 2 in the thickness direction of the wafer 1, i.e., a region of the wafer 1 deeper than 300 nm in depth. The interstitial oxygen concentration in the bulk layer 3 is 0.5×10.sup.18/cm.sup.3 or more. The higher this oxygen concentration, the higher the effect of fixing the slip dislocation generated during heat treatment for wafer production or during heat treatment for device formation, but by setting this concentration to 0.5×10.sup.18/cm.sup.3 or more, it is possible to obtain a predetermined fixing effect to such an extent that the wafer 1 is not locally deformed. On the other hand, the interstitial oxygen concentration in the bulk layer 3 is preferably 1.5×10.sup.18/cm.sup.3 or less. By limiting the interstitial oxygen concentration within the above range, it is possible to reduce abnormal appearance of oxygen precipitates near the interface between the surface layer 2 and the bulk layer 3, and to prevent problems relating to the device properties such as a latch-up phenomenon.

[0044] In the region of the wafer 1 from the surface to 30 μm in depth, the density of void defects is 1×10.sup.6/cm.sup.3 or less. The void defects are cavity defects caused by aggregation of vacancies introduced into the crystals during growth of a silicon ingot. If void defects are present in the device formation region, the breakdown characteristics of gate oxide films on the three-dimensional structures may deteriorate. In the step of keeping the wafer at a high temperature during the rapid thermal process in the wafer production, the void defects shrink to such an extent that the breakdown characteristics are not affected, or disappear, but the void defects may partially remain in the crystals. By setting the density of the void defects after the rapid thermal process within the above range, it is possible to minimize the influence of the void defects on the breakdown characteristics. The sizes of void defects controlled to the above density can be appropriately set, for example, to not less than 5 nm or not less than 10 nm, but they are particularly preferably set to 15 nm or more.

[0045] In the region of the wafer 1 from the surface to 30 μm in depth, the density of oxygen precipitates is 1×10.sup.6/cm.sup.3 or less. While oxygen precipitates present in a deep region of the bulk layer 3 (e.g., at the depth of several tens of micrometers or more) will effectively act as gettering sources of metallic impurities, oxygen precipitates present near the surface layer 2 could become slip dislocation starting points, thereby adversely affecting the shape accuracy of the three-dimensional structures. By setting the density of the oxygen precipitates after the rapid thermal process, it is possible to minimize the influence of the oxygen precipitates on the shape accuracy. For the sizes of the oxygen precipitates controlled to the above density, the equivalent spherical diameters of the oxygen precipitates can be appropriately set, for example, to not less than 5 nm or not less than 10 nm, but they are particularly preferably set to 15 nm or more.

[0046] Such oxygen precipitates not only have a spherical shape but also often have a plate shape. For example, if the oxygen precipitates have a square plate shape having an aspect ratio (thickness/diagonal length) of β=0.01, since, for example, the equivalent spherical diameter of 15 nm corresponds to a diagonal length of about 56 nm, the density of the plate-shaped oxygen precipitates having a diagonal length of about 56 nm or more is set to 1×10.sup.6/cm.sup.3 or less.

[0047] In the region of the bulk layer 3 from 100 μm in depth to the thickness center of the wafer 1, the vacancy concentration is 1×10.sup.12/cm.sup.3 or more. It is considered that vacancies are present as complexes with interstitial oxygen (vacancy-oxygen complexes VO.sub.x). The vacancies (vacancy-oxygen complexes) promote formation of oxygen precipitates in the bulk layer 3 during device formation, and a high gettering effect of metallic impurities is ensured. By setting this vacancy concentration to 5×10.sup.12/cm.sup.3 or more, it is possible to ensure a higher gettering effect.

[0048] The silicon ingot from which the wafer 1 is formed is not particularly limited, but, in this embodiment, a silicon ingot is used in which the concentration difference C.sub.v-C.sub.1 between the vacancy concentration C.sub.v and the interstitial silicon atom concentration C.sub.1 is within the range of −2.0×10.sup.12/cm.sup.3 or more and 6.0×10.sup.12/cm.sup.3 or less (neutral region). By setting the concentration difference C.sub.v-C.sub.1 within the above range, it is possible to easily produce a high-quality wafer 1 in which void defects are not introduced during growth of the crystals, or, even if void defects are introduced, their sizes are very small and no void defects are present in the device formation region due to the rapid thermal process.

[0049] Even though the concentration difference C.sub.v-C.sub.1 is within the range of 1.3×10.sup.13/cm.sup.3 or more and 5.6×10.sup.12/cm.sup.3 or less (V-rich crystals) or within the range of 3.5×10.sup.12/cm.sup.3 or more and 1.1×10.sup.13/cm.sup.3 or less (Low COP crystals), it is still possible to make void defects disappear by appropriately changing the maximum temperature and the retention time of the rapid thermal process.

[0050] Next, a method for producing the wafer 1 of FIG. 1 is described. As the wafer 1, a mirror surface wafer obtained by slicing a single-crystal silicon ingot grown by the Czochralski method is used. First, this mirror surface wafer was subjected to a rapid thermal process in an oxygen atmosphere where the oxygen partial pressure is 100%. The temperature ramp-up rate of this rapid thermal process was set within the range of not less than 25° C./second and not more than 75° C./second, and the temperature ramp-up rate was reduced in a stepwise manner as the temperature approached the maximum temperature. Also, the maximum temperature was set to 1350° C., the retention time at the maximum temperature to 15 seconds, and the cooling rate to 120° C./second.

[0051] While the wafer is kept at the maximum temperature during this rapid thermal process, oxide films are formed on the surface of the wafer 1, and supersaturated interstitial oxygen is introduced from the interface between each oxide film and the silicon. The interstitial oxygen diffuses inwardly toward the thickness center of the wafer 1. On the other hand, during cooling of the wafer 1, the interstitial oxygen diffuses outwardly toward the surface of the wafer 1, and the oxygen concentration near the surface decreases. As a result, as shown in FIG. 4, the oxygen concentration profile after the rapid thermal process shows a distribution of oxygen concentration which is the highest at a certain depth (about 1 μm in this example) from the surface of the wafer 1, and which decreases toward the surface of the wafer 1 and toward the thickness center of the wafer 1.

[0052] Next, the surface of the wafer 1 was removed by polishing to the depth where the oxygen concentration is 2×10.sup.18/cm.sup.3 or more. As a result, as shown in FIG. 5, a region where the oxygen concentration is high due to the oxygen introduced by the rapid thermal process is formed from the surface to 300 nm in depth. The higher this oxygen concentration, the higher the effect of reducing the silicon missing phenomenon during formation of the three-dimensional structures. Especially by setting this oxygen concentration to 2.5×10.sup.18/cm.sup.3 or more, it is possible to obtain a high reducing effect. This oxygen concentration tends to increase with an increase in the maximum temperature of the rapid thermal process, an increase in the retention time at the maximum temperature, or an increase in the cooling rate.

[0053] In the above, for example, the distribution of the oxygen concentration during the thermal process was obtained by simulation (see FIGS. 2 to 5), and the accuracy of the oxygen concentration simulation was verified. As shown in FIG. 6, from the comparison of this simulation result with the actual measurement result of the oxygen concentration obtained by SIMS (Secondary Ion Mass Spectroscopy), it was confirmed that the simulation result and the actual measurement result substantially coincide with each other, and thus the actual measurement result can be accurately predicted by simulation.

[0054] FIGS. 7 and 8 each shows the relationship between the peak value of the oxygen concentration or the vacancy concentration after the rapid thermal process, and the maximum temperature of the rapid thermal process. In FIGS. 7 and 8, the black circles of the respective data values correspond to the oxygen concentration of 1.1×10.sup.18/cm.sup.3 in the bulk layer, the lower ends of the error bars correspond to the oxygen concentration of 0.5×10.sup.18/cm.sup.3 in the bulk layer, and the upper ends of the error bars correspond to the oxygen concentration of 1.5×10.sup.18/cm.sup.3 in the bulk layer. By setting this maximum temperature within the range of 1315° C. or more and 1375° C. or less, regardless of the oxygen concentration in the bulk layer 3, it is possible to achieve an oxygen concentration and a vacancy concentration that are effective in reducing the silicon missing phenomenon, i.e., 2×10.sup.15/cm.sup.3 or more, and 1.1×10.sup.12/cm.sup.3 or more, respectively. If this maximum temperature is less than 1315° C., it is impossible to ensure a sufficient oxygen concentration and a sufficient vacancy concentration, and if more than 1375° C., the problem of a slip could become prominent. Also, by setting this maximum temperature to 1325° C. or more and 1350° C. or less, it is possible to reliably keep the oxygen concentration and the vacancy concentration within the above respective concentration ranges, and to reliably reduce a slip.

[0055] If an oxygen atmosphere is selected as the oxidizing atmosphere for the rapid thermal process, the oxygen partial pressure is preferably 100% in that interstitial oxygen can be efficiently introduced into the wafer 1, but can be set appropriately within the range of 1% or more and 100% or less. The oxidizing atmosphere is not limited to an oxygen atmosphere, and may be another atmosphere provided that interstitial oxygen can be introduced into the wafer 1.

[0056] After the rapid thermal process and then removing the surface, the wafer 1 was subjected to heat treatment at 800° C. for 1 hour in an argon atmosphere. By this heat treatment, oxygen precipitates having an equivalent spherical diameter of 15 nm or more are introduced, at a density of 1×10.sup.8/cm.sup.3 or more, into the region of the wafer 1 from 100 μm in depth to the thickness center. By ensuring that such oxygen precipitates are introduced into the wafer in this way, it is possible to ensure the gettering effect of metallic impurities. It is known that formation of oxygen precipitates is promoted by the vacancies (vacancy-oxygen complexes) introduced into the wafer 1 by the rapid thermal process, and the region where oxygen precipitates form corresponds to the region where the vacancy concentration (vacancy-oxygen complex concentration) is 1×10.sup.12/cm.sup.3 or more.

[0057] The above heat treatment is preferably performed within the temperature range of not less than 800° C. and not more than 1000° C., and the time range of not less than 1 hour and not more than 4 hours, which hardly affect the vacancies (vacancy-oxygen complexes) introduced by the rapid thermal process.

[0058] The silicon ingot as the starting material in this method for producing the wafer 1 is not particularly limited, but, in this embodiment, a single-crystal silicon ingot is used which is grown by the Czochralski method, and in which the concentration difference C.sub.v-C.sub.1 between the vacancy concentration C.sub.v and the interstitial silicon atom concentration C.sub.1 is within the range of −2.0×10.sup.12/cm.sup.3 or more and 6.0×10.sup.12/cm.sup.3 or less (neutral region). By limiting the concentration difference C.sub.v-C.sub.1 within the above range, it is possible to easily produce a high-quality wafer 1 in which no void defects are present in the device formation region due to a rapid thermal process.

[0059] The above-described wafer 1 and method for producing the wafer are mere examples, and a modification may be made thereto provided that the object of the present invention can be achieved, i.e., it is possible to provide a silicon wafer 1 suitable for formation of semiconductor devices having a minute three-dimensional structure, and a method for producing the silicon wafer 1.

DESCRIPTION OF REFERENCE NUMERALS

[0060] 1: Silicon wafer (wafer) [0061] 2: Surface layer [0062] 3: Bulk layer