ADVANCED HETEROFIBROUS MONOLITHIC WAFER-LIKE SILICON ANODE

Abstract

The present invention relates to a negative electrode for the use in alkali-ion rechargeable battery where electrochemically active material is selected from the Group IV semiconductors, the active material forming a heterofibrous monolithic anode body, the anode body comprises at least of 2 layers of aligned and/or stacked and/or interlaced fibers wherein the layers of fibers are spot-fused together at points of their physical contact and further over-lithiated by ex-situ anisotropic chemical and or electrochemical means forming a monolithic wafer-like self-standing over-lithiated alloying type anode where part of the lithium excess is subsequently depleted during forming artificial SEI-layer.

Claims

1. A negative electrode for the use in an alkali-ion rechargeable battery, comprising: an electrochemically active material of the anode, wherein the active material is selected from the Group IV semiconductors, wherein the active material is provided as a heterofibrous wafer-like self-standing monolithic anode body, wherein the anode body comprises at least 2 layers of aligned and/or stacked and/or interlaced fibers, wherein the at least two layers are arranged parallel on top of each other, wherein the layers are interconnected at multiple discrete interconnection sites via metallurgical bonds, wherein the metallurgical bonds comprise or consist of Li-Group-IV-semiconductor-alloy and/or lithium or a mixture of the two, wherein the discrete interconnection sites are spread across the anode body, hence discretely distributed over the area of the layers, and wherein the metallurgical bonds extend in an out-of-plane direction with respect to the individual layers and are spacers between the layers.

2. Negative electrode according to claim 1, characterized in that the anode body is unevenly lithiated with non-lithiated and/or deficiently lithiated and/or stoichiometrically lithiated areas.

3. Negative electrode according to claim 1, characterized in that the anode body has an artificial ex-situ introduced SEI layer over the entire surface of wafer the volume/extension of which is adapted to the volume of the anode in the maximum lithiated state and/or which is provided in a highly lithiated state of the anode that is higher than Li.sub.15Si.sub.4.

4. Negative electrode according to claim 1, characterized in that the Group IV semiconductor is silicon or comprises silicon.

5. Negative electrode according to claim 1, characterized in that at the discrete points of interconnection of the layers a stoichiometric access of lithium is located with respect to the amount of lithium needed to form a Li-Group-IV-semiconductor-alloy within the metallurgical bond.

6. Negative electrode according to claim 1, characterized in that the length of fibers is between 120 nm-15 μm and where thickness of the heterofibrous silicon wafer like anode is between 10 μm to 800 μm.

7. Negative electrode according to claim 1, characterized in that the individual Li-Group-IV-semiconductor-alloy bonds, thus the discrete points of interconnection, are provided as placeholders between the layers such that the layers experience at least partially a void between them at least in a discharged state, wherein the voids are at least partially filled with the active material in a charged state of the anode.

8. Negative electrode according to claim 1, characterized in that the discrete interconnection points or sites are in the shape of dots and/or lines and/or pillars and/or patches.

9. Negative electrode according to claim 1, characterized in that the layers are spaced apart from each other.

10. Negative electrode according to claim 1, characterized in that the discrete interconnection sites are at least partially located between the layers as spacers and accordingly the layers comprise at least some areas with a gap between them provided by the spacer.

11. Method of manufacture of the anode body according to claim 1, wherein at least one group IV semiconductor material is provided as individual layers of aligned and/or stacked and/or interlaced fibers, wherein the layers are arranged parallel to each other and spot-fused together, namely interconnected at multiple discrete interconnection sites via metallurgical bonds the metallurgical bonds that comprise or consist of Li-Group-IV-semiconductor-alloy and/or lithium or a mixture of the two and are formed by fusing the layers together by Li fusing or introduction of lithium in the liquid state into the arranged layers, wherein the discrete interconnection sites are introduced across the anode body, hence discretely distributed over the area of the layers, and wherein the metallurgical bonds are provided in such a way that they extend in an out-of-plane direction with respect to the individual layers and thus form spacers between the layers.

12. Method of manufacture of the anode body according to claim 10, characterized in that the anode body is lithiated to an over-lithiated state, namely Li.sub.21X.sub.5, wherein X is at least one of the group IV semiconductor elements, and treated with one or several SEI-layer forming dopants, such as As-, P-, (H)F-compounds and/or an SEI-layer forming electrolyte, wherein an artificial SEI-layer is formed on an anode in its maximum volumetric expansion state.

Description

[0078] In the following, the present invention will be further explained by the provided figures.

[0079] In the figures it is shown:

[0080] FIG. 1 an example of a fuse spot distribution to interconnect separate layers of aligned and/or stacked and/or interlaced group IV, in particular silicon fibres,

[0081] FIG. 2 an exemplary set up for lithiation of the spot fused layered silicon anode body (wafer), patterned solid state (glass)-ceramic electrolyte (hexagonal) as-lithiation mask. The lithiation takes place in steps, e.g., as depicted in FIG. 2 in four steps, however it is not limited on this number of steps. Steps can be in between 1-100 steps. lithiation is 1.sup.st started preferably in the centre part 1 followed by the subsequent area to then 3 then 4 and so on.

[0082] FIG. 3 an abstract image of an over-lithiated silicon anode body,

[0083] FIG. 4 Patterned solid state (glass)-ceramic electrolyte as-lithiation mask resembling the ex-situ lithiation in a process solvent/electrolyte. FIG. 4 depicts the initial state with only limited lithiation and unexpanded silicon layers which are mechanically interlocked between each other by the fused spots.

[0084] FIG. 5 Patterned solid state (glass)-ceramic electrolyte as-lithiation mask resembling the ex-situ lithiation in a process solvent/electrolyte. FIG. 5 depicts the intermediate state with partly lithiation and expanded silicon layers, which are anisotropically spot fused by lithium induced metallurgic bonds. The arrows mark the lithiation pathway,

[0085] FIG. 6 Patterned solid state (glass)-ceramic electrolyte as-lithiation mask resembling the ex-situ lithiation in a process solvent/electrolyte. FIG. 6 depicts the complete state with (over)-lithiation and fully expanded silicon layers, which are anisotropically spot fused by lithium induced metallurgic bonds. The arrows mark the lithiation pathway.

[0086] FIG. 7 Lithiated (5-100%) silicon wafer monolithic body, including ex-situ fabricated artificial SEI layer,

[0087] FIG. 8 Graphene and/or reduced graphene oxide current collector foil including 3 tabs,

[0088] FIG. 9 Lithiated (5-100%) silicon wafer anode monolith, including ex-situ fabricated artificial SEI layer attached on top of a graphene and/or reduced graphene oxide current foil including 3 tabs,

[0089] FIG. 10-13 show the relative volumetric extent of the layered silicon anode (late silicon wafer) in the different non-lithiated, partially lithiated and over lithiated states. the size of the circles may only represent the increase in volume but not necessarily the actual percentage in volume or die me to increase,

[0090] FIG. 10 Silicon wafer anode in the state of the highest density,

[0091] FIG. 11 (Electrochemical) lithiated silicon wafer anode in the state of room temperature active phase Li.sub.15Si.sub.4,

[0092] FIG. 12 (Electrochemical) over-lithiated silicon wafer anode in the state of the high temperature active phase Li.sub.21Si.sub.5 featuring the maximum possible volume,

[0093] FIG. 13 Ex-situ fabricated SEI via the disproportionation of the high temperature Li.sub.21Si.sub.5 phase to the room temperature phase Li.sub.15Si.sub.4. The such released excess of Li is consumed to build up the artificial SEI layer (red),

[0094] FIG. 14 a top view on the relative orientation of 3 representative layers with aligned silicon fibres each alignment along the direction of the individual arrows of the same colour Layers of aligned and preferably 120° interlaced silicon fibers before pre-lithiation process,

[0095] FIG. 15 the setup of layers according to FIG. 14 after the pre-lithiation (spot fusing) process.