Component and Method for Manufacturing a Component
20220287187 · 2022-09-08
Inventors
- Jan Ihle (Raaba-Grambach, AT)
- Thomas Bernert (Deutschlandsberg, AT)
- Stefan Endler (Graz, AT)
- Michael Krenn (Dobl-Zwaring, AT)
- Stephan Bigl (Graz, AT)
- Markus Puff (Graz, AT)
- Sebastian Redolfi (Graz, AT)
Cpc classification
H01G2/06
ELECTRICITY
H01C1/14
ELECTRICITY
H01G4/33
ELECTRICITY
International classification
H05K3/30
ELECTRICITY
H01G2/06
ELECTRICITY
H05K1/18
ELECTRICITY
Abstract
In an embodiment a component includes at least one carrier layer, the carrier layer having a top side and a bottom side and at least one functional layer arranged on the top side of the carrier layer, the functional layer including a material having a specific electrical characteristic, wherein the component is configured for direct integration into an electrical system as a discrete component.
Claims
1.-25. (canceled)
26. A component comprising: at least one carrier layer, the carrier layer having a top side and a bottom side; and at least one functional layer arranged on the top side of the carrier layer, the functional layer comprising a material having a specific electrical characteristic, wherein the component is configured for direct integration into an electrical system as a discrete component.
27. The component according to claim 26, wherein the carrier layer comprises silicon, silicon carbide or glass.
28. The component according to claim 26, wherein the functional layer is arranged to the carrier layer in a form-fitting and material-fitting manner, or wherein the functional layer is located directly in a material of the carrier layer locally or as a layer.
29. The component according to claim 26, wherein the functional layer comprises a dielectric or an antiferroelectric ceramic based on an oxide material in a perovskite structure type.
30. The component according to claim 26, wherein the functional layer comprises an ion-conducting ceramic based on a material in a Nasicon structure type.
31. The component according to claim 26, wherein the functional layer comprises a semiconducting material based on an oxide in a spinel structure type or in a perovskite structure type.
32. The component according to claim 26, wherein the functional layer comprises a semiconducting material based on a perovskite structure of polycrystalline BaTiO.sub.3 with Pb, Sr, Ca for adjusting a Curie temperature and Y, Mn, Fe as dopants, and wherein the polycrystalline structure has a positive temperature coefficient.
33. The component according to claim 26, further comprising at least one protective layer arranged on a top side of the component and/or on at least one side face of the component.
34. The component according to claim 33, wherein the protective layer comprises SiO.sub.2.
35. The component according to claim 26, further comprising at least one feedthrough, wherein the feedthrough completely penetrates the carrier layer, and wherein at least one contact element is arranged on the bottom side of the carrier layer, the contact element configured for electrical contacting of the component.
36. The component according to claim 35, wherein the component has at least two feedthroughs, wherein two contact elements are located on the bottom side of the carrier layer.
37. The component according to claim 26, further comprising at least one cover electrode, wherein the cover electrode is configured for electrically contacting the functional layer from a top side of the functional layer.
38. The component according to claim 37, wherein the cover electrode is arranged directly on the functional layer.
39. The component according to claim 37, wherein the cover electrode comprises at least one sputtered layer.
40. The component according to claim 37, wherein the component comprises at least two cover electrodes, wherein the cover electrodes are arranged next to each other, and wherein the cover electrodes are spatially and electrically separated from one another by at least one recess.
41. The component according to claim 26, wherein the component is configured for direct integration into a MEMS structure and/or into a SESUB structure.
42. A method for manufacturing a component, the method comprising: providing a carrier material for forming a carrier layer; forming at least one feedthrough, the feedthrough completely penetrating the carrier material; filling the at least one feedthrough with a metallic material; coating the carrier material with a functional material to form a functional layer; and singulating the components.
43. The method according to claim 42, further comprising, prior to singulating the components, depositing at least one cover electrode onto a top side of the functional material.
44. The method according to claim 43, wherein the cover electrode is formed for electrically contacting the functional layer from a top side of the functional layer.
45. The method according to claim 43, wherein the cover electrode is arranged directly on the functional layer.
46. The method according to claim 42, wherein the functional layer is generated by a PVD or CVD process, or wherein the functional material is provided by a sol-gel process or by a ceramic slurry and is applied to the carrier material by a CSD process.
47. The method according to claim 42, further comprising annealing after coating the carrier material with the functional material.
48. The method according to claim 42, wherein coating the carrier material with the functional material is performed before forming the at least one feedthrough or before filling the at least one feedthrough.
49. The method according to claim 42, further comprising forming at least one contact element for electrically contacting the component on a bottom side of the carrier layer.
50. The method according to claim 42, wherein the component is formed for direct integration into a MEMS structure and/or into a SESUB structure.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0051] The drawings described below are not to be understood as true to scale. Rather, individual dimensions may be enlarged, reduced or even distorted for better representation.
[0052] Elements that are similar to one another or that perform the same function are designated with the same reference signs.
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[0055]
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DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS
[0064]
[0065] The component 1 has at least one carrier layer 2 or a wafer 2. The carrier layer 2 has a top side 2a and a bottom side 2b. The carrier layer 2 has a carrier material, preferably silicon (Si), silicon carbide (SiC) or glass (silicate or borosilicate). The carrier layer 2 serves to mechanically stabilize the component 1.
[0066] The component 1 further comprises at least one functional layer 5. In this embodiment example, the component 1 has exactly one functional layer 5. However, several functional layers 5 are also conceivable, for example two, three or four functional layers 5, which can, for example, be arranged next to each other or one above the other.
[0067] In this embodiment example, the functional layer 5 is arranged on the top side 2a of the carrier layer 2. The functional layer 5 preferably completely covers the top side 2a of the carrier layer 2. The functional layer 5 is arranged on the carrier layer 2 in a form-fit and material-fit manner. Alternatively, the functional layer 5 is generated directly in a material of the carrier layer 2 locally or as a layer. The functional layer 5 has a very small thickness of less than or equal to 1 μm.
[0068] The functional layer 5 has a material with a specific electrical characteristic. For example, the functional layer 5 has a dielectric or antiferroelectric ceramic based on an oxide material in the perovskite structure type. The perovskite consists, for example, of solid solutions of the composition PLZT, in which La may be wholly or partially replaced by, for example, Na or Cu.
[0069] The functional layer 5 may also have an ion-conducting ceramic based on a material in the Nasicon structure type. In this case, the composition is based, for example, on solid solutions of LATP, LVP, LZP and other typical active materials for batteries such as LiCo, LiFeP.
[0070] Alternatively, the functional layer 5 may have a semiconducting material based on an oxide in the spinel structure type or perovskite structure type. The composition of the spinel is preferably based on solid solutions of NiMn.sub.2O.sub.4, in which Ni and Mn can be completely or partially replaced with, for example, Fe, Co, Al. The perovskite preferably has solid solutions of the composition CaMnO.sub.3, in which Ca may be wholly or partially replaced by, for example, Y, Cr, Al or La.
[0071] The functional layer 5 can also have a semiconducting material based on a perovskite structure of polycrystalline BaTiO.sub.3 with Pb, Sr, Ca to adjust the Curie temperature and, for example, Y, Mn, Fe as dopants. Here, the polycrystalline structure preferably has a positive temperature coefficient.
[0072] Alternatively, the functional layer 5 may also have a semi-conductive material based on silicon carbide in the hexagonal wurtzite-like structure or the cubic phase in the zinc-trim structure type. In an alternative embodiment, the functional layer 5 may further comprise a metal nitride in the wurtzite structure type.
[0073] In the embodiment according to
[0074] The respective feedthrough 3 penetrates the carrier layer 2 completely. In other words, the feedthrough 3 extends from the top side 2a to the bottom side 2b of the carrier layer 2. The feedthrough 3 has a metallic material, for example copper or gold.
[0075] The component 1 shown in
[0076] The contact elements 4 can, for example, be designed as bumps or as a thin electrode. The contact elements 4 have a metal, for example copper, gold or solderable alloys. The feedthroughs 3 serve to connect the functional layer 5 on the top side 2a of the carrier layer 2 with the contact elements 4 on the bottom side 2a of the carrier layer 2 and thus to contact the functional layer 5 electrically. Thus, a robust and reliable component 1 is provided.
[0077] In a further embodiment (not explicitly shown), a protective layer 7 is further arranged on a top side 1a of the component 1. In this case, the protective layer 7 is formed directly on the functional layer 5. The protective layer 7 completely covers a top side 5a of the functional layer 5. The protective layer 7 preferably has SiO.sub.2. The protective layer 7 serves to protect the functional layer 5 and the component 1 from external influences (see also
[0078] Due to its special contacting (feedthroughs 3, contact elements 4) and the special layer structure (thin functional layer 5 with special electrical characteristics), the component 1 is designed in such a way that it can be integrated as a complete component in a Si chip or on a printed circuit board. In particular, the component 1 is designed to be integrated as a discrete component in MEMS or SESUB structures.
[0079] Overall, the component 1 is designed to be very compact. The component 1 has a very small dimension. The component 1 has a width of preferably less than or equal to 500 μm, for example 50 μm, 100 μm, 250 μm, 300 μm, 400 μm or 450 μm. Preferably, the component 1 has a length of less than or equal to 500 μm, for example 50 μm, 100 μm, 250 μm, 300 μm, 400 μm or 450 μm. Preferably, the component 1 has a rectangular basic shape. The component 1 has a height (extension in stacking direction) of preferably less than or equal to 100 μm, for example 10 μm, 50 μm or 80 μm.
[0080] Due to the compact design and the contacting by means of the feedthroughs 3 and the contact elements 4, the component 1 is ideally suited for integration in MEMS or SESUB structures.
[0081]
[0082] The cover electrode 6 has a metallic material, preferably Au, Ni, Cr, Ag, W, Ti or Pt. Preferably, the cover electrode 6 is deposited on the functional layer 5, for example by means of a PVD or CVD process or galvanically. Preferably, the cover electrode 6 is sputtered onto the functional layer 5. The cover electrode 6 is a thin film electrode. In other words, the cover electrode 6 preferably has a thin metal film. The cover electrode 6 has a thickness d or height of ≥100 nm and ≤1 μm, for example 500 nm.
[0083] In this embodiment, the component 1 further has the protective layer 7 already described in connection with
[0084] In an alternative embodiment example (not explicitly shown), however, the protective layer 7 can also be omitted. In this case, the cover electrode 6 forms the top side of the component 1. In this embodiment example, it is possible to realize an additional contacting, for example by wire bonding on the cover electrode 6 (not explicitly shown).
[0085] With regard to all further features of the component 1 according to
[0086]
[0087] In this embodiment, the component 1 further has the cover electrode 6 already described in connection with
[0088] With regard to all further features of the component 1 according to
[0089]
[0090] The respective cover electrode 6a, 6b can be formed in a single layer or in multiple layers. The respective cover electrode 6a, 6b is preferably a thin film electrode. The respective cover electrode 6a, 6b preferably has at least one sputtered metal layer. For example, the respective cover electrode 6a, 6b has Au, Ni, Cr, Ag, W, Ti or Pt. Preferably, the respective cover electrode 6a, 6b has a thickness or height between wo nm and 1 μm.
[0091] In this embodiment, the cover electrodes 6a, 6b form the top side of the component 1. Alternatively (not explicitly shown), however, a protective layer 7 can also be provided, which is arranged on the cover electrodes 6a, 6b.
[0092] The cover electrodes 6a, 6b are electrically separated from each other. For this purpose, at least one recess or gap 8 is formed between the cover electrodes 6a, 6b, as shown in
[0093]
[0094] Compared to the embodiment shown in
[0095] A cover electrode 6 is formed on the top side of the respective feedthrough 3 in each case. In this embodiment example, the respective cover electrode 6 is also at least partially embedded in the functional layer 5. The cover electrodes 6 thus at least partially form the top side 5a of the functional layer 5.
[0096] The protective layer 7 is formed directly on the functional layer 5. In this case, the protective layer 7 covers the top side 5a of the functional layer 5, which is at least partially formed by the cover electrodes 6.
[0097] Contact is made on the bottom side via feedthroughs 3 and contact elements 4, for example bumps. More than the feedthroughs shown in
[0098]
[0099] Here, too, the feedthroughs 3 penetrate the functional layer 5 completely. In particular, each feedthrough extends from the bottom side of the carrier layer 2 through the carrier layer 2 and the functional layer 5 to the top side of the functional layer 5.
[0100] In contrast to the embodiment according to
[0101] In this embodiment, the respective cover electrode 6 is formed on the surface of the functional layer 5.
[0102] The protective layer 7 is formed directly on the functional layer 5. The protective layer 7 covers the top side of the functional layer 5. The contacting on the bottom side is again made via the feedthroughs 3 and contact elements 4, for example bumps.
[0103]
[0104] In a first step A), a carrier material 10 is provided for forming the carrier layer 2 described above (see
[0105] In a next step B), the feedthroughs 3 described above are produced. For this purpose, vias/breakthroughs 12 are created in the carrier material 10, for example by photolithography and subsequent plasma etching (“dry etching”) (see
[0106] In a step C), the vias/breakthroughs 12 are filled with a metallic material 13 (e.g. copper), e.g. by electroplating (see
[0107] In a further step D), the carrier material 10 is coated with a functional material 14 to form the functional layer 5 (see
[0108] The coating is carried out, for example, by a PVD or CVD process. Thereby, a thin film of the functional material 14 is produced on the carrier material 10. Optionally, an annealing step can take place after step D).
[0109] Alternatively, the functional layer 5 can also be produced by a sol-gel process or by means of ceramic slurry and applied to the carrier material 10 by a CSD process (e.g. spin coating). In this variant, a subsequent thermal process is required.
[0110] In an alternative embodiment, the process step D) can also be carried out before the generation of the vias/breakthroughs 12 (step B)). In this case, the metallic material 13 projects into the functional layer 5 and is enclosed by it (see also the embodiment described in connection with
[0111] In a further step, electrode material 15 is deposited to form the at least one cover electrode 6 (see
[0112] A single-layer or multilayer thin cover electrode 6 (thin film electrode) is produced. In particular, the cover electrode 6 is deposited as a thin electrode film on the functional material 14 in this process step. If two cover electrodes 6 are deposited, a recess (see
[0113] In an optional step, the formation of the protective layer 7 can further be carried out by applying the appropriate material (preferably SiO.sub.2) either to the functional material 14 (embodiment according to
[0114] In a final step E), the components 1 are singulated (see
[0115] Alternatively, the thinning of the carrier material 10 on the bottom side can be carried out in two steps, whereby in a first step the carrier material 10 is etched or ground away over its surface, and in a second step the separation is carried out by etching over its surface and the contact elements 4 are exposed without oxidizing the metal in the process.
[0116]
[0117] In a first step, a carrier material 10 is provided for forming the carrier layer 2 described above (see
[0118] In a further step (see
[0119] In a further step, the carrier material 10 is coated with a functional material 14 to form the functional layer 5, for example an NTC layer (
[0120] In this embodiment, the functional material 14 remains completely on the carrier material 10 or in the inner region of the via/breakthrough 12. Subsequent steps for partial removal of the functional material 14, which are both expensive and time-consuming, are not required. This simplifies and cheapens the process.
[0121] In a further step, the vias/breakthroughs 12 are filled with a metallic material 13 (preferably copper), preferably galvanically. For this purpose, a sacrificial layer or seed layer of the metallic material 13 (preferably copper) is first sputtered onto the functional material 14 (not explicitly shown). Furthermore, a photolithography mask 16 (photoresist) is applied to the functional material 14 (
[0122] Subsequently, the vias/breakthroughs 12 are galvanically filled with the metallic material 13. Metallic material 13 is also deposited at least partially in spaces between the photolithography mask 16 on the top side of the functional material 14 to form the cover electrodes 6 (
[0123] The photolithography mask 16 is then removed again, e.g. washed off (
[0124] In a final step, the carrier material 10 is thinned out on the bottom side by backgrinding or etching (
[0125]
[0126] In a first step, a carrier material 10 is provided for forming the carrier layer 2 described above. Preferably, the carrier material 10 comprises glass (silicate or borosilicate) (glass wafer).
[0127] In contrast to the method described in connection with
[0128] In a next step, the feedthroughs 3 are created. This is done by etching vias/breakthroughs 12 in the glass wafer. Breakthroughs 12 are created which have a conical shape (
[0129] In a further step, the mask 17 is removed. The carrier material 10 is then coated with a functional material 14 to form the functional layer 5, for example an NTC layer (
[0130] In a further step, the vias/breakthroughs 12 are filled with a metallic material 13 (for example copper). For this purpose, a sacrificial layer/seed layer of the metallic material 13 is first sputtered on (“seed layer sputtering”). Furthermore, a photolithography mask 16 is applied to the functional material 14 (
[0131] In the following, the vias/breakthroughs 12 are galvanically filled with the metallic material 13. Metallic material 13 is also partially applied to the top side of the functional material 14 in the spaces between the photolithography mask 16.
[0132] The photolithography mask 16 is subsequently removed. Furthermore, the sacrificial layer or seed layer is also partially removed again, for example by etching (
[0133] In a final step, the carrier material 10 is again thinned out on the bottom side by backgrinding or etching (
[0134]
[0135] In a first step, a carrier material 10 is provided for forming the carrier layer 2 described above (
[0136] In a next step, the feedthroughs 3 are produced. In particular, vias/breakthroughs 12 are made in the silicon wafer with the aid of a laser (
[0137] In a further step, an electrically insulating layer is created by applying a corresponding material (preferably SiO.sub.2) to the carrier material 10 (not explicitly shown). In particular, the carrier material 10 is coated with the electrically insulating material. Thereby, a thin film of the electrically insulating material is formed.
[0138] In a next step, the carrier material 10 is coated with a functional material 14 to form the functional layer 5 (
[0139] In a further step, the vias/breakthroughs 12 are filled with a metallic material 13 (preferably copper). For this purpose, again a sacrificial layer of the metallic material 13 is first sputtered on. Furthermore, a photolithography mask 16 (photoresist) is applied to the functional material 14 (
[0140] Subsequently, the vias/breakthroughs 12 are galvanically filled with the metallic material 13. The photolithography mask 16 and in parts also the sacrificial layer are then removed, for example by means of washing or etching (
[0141] In a final step, the carrier material 10 is thinned out on the bottom side by backgrinding or etching (
[0142]
[0143] In a first step, a carrier material 10 is provided for forming the carrier layer 2 described above (
[0144] Subsequently, recesses 19 are created in the carrier material 10. For this purpose, photoresist 18 is applied to a top side of the carrier material 10 (
[0145] In a further step, an electrically insulating layer is created by applying an appropriate material (preferably SiO.sub.2) to the carrier material 10 (not explicitly shown). In particular, the carrier material 10 is coated with the electrically insulating material. A thin film of the electrically insulating material is formed.
[0146] In a next step, the carrier material 10 is coated with a functional material 14 to form the functional layer 5 (
[0147] Subsequently, the functional material 14 is abraded on a top side of the carrier material 10. In particular, the abrading is performed in such a way that the functional material 14 preferably remains only in the previously created recesses 19, but not on the surface of the carrier material 10 (
[0148] In a next step, a top side of the functional material 14 is coated with photoresist 18 (
[0149] In a further step, the vias/breakthroughs 12—after application of a sacrificial layer/seed layer (not explicitly shown)—are galvanically filled with a metallic material 13 (preferably copper) (
[0150] The description of the objects disclosed herein is not limited to the individual specific embodiments. Rather, the features of the individual embodiments can be combined with one another in any desired manner, insofar as this makes technical sense.