INTEGRATED CIRCUIT PACKAGE COMPRISING A CROSSED DIPOLE ANTENNA

Abstract

An integrated circuit package is provided. The integrated circuit package comprises a transceiver radio-frequency integrated circuit, RFIC, and at least one antenna array formed in a redistribution metal layer of the integrated circuit package, and is arranged in a fan-out area of the RFIC. The at least one antenna array comprises at least one crossed dipole antenna (10). Each crossed dipole antenna comprises a first dipole comprising two first legs (11), and a second dipole comprising two second legs (12), and two leg pairs (10a, 10b), each leg pair comprising one first leg of the first dipole and one second leg of the second dipole, and two feed lines (20a, 20b). Each feed line is coupled to a respective leg pair at a center (15) of the crossed dipole antenna. At least a part of each feed line is arranged between the two leg pairs.

Claims

1.-15. (canceled)

16. An integrated circuit package, comprising: a transceiver radio-frequency integrated circuit (RFIC); a redistribution metal layer (RDL); at least one antenna array formed in the RDL and arranged in a fan-out area, the antenna array comprising at least one crossed dipole antenna comprising: a first dipole comprising two first legs; and a second dipole comprising two second legs, wherein one first leg and one second leg of cooperate to define a leg pair, such that there are two leg pairs; and at least one pair of feed lines formed in the RDL, wherein each feed line is coupled between a respective leg pair and the RFIC, and wherein the pair of feed lines extends from a center of the crossed dipole antenna towards the RFIC between the two leg pairs.

17. The integrated circuit package of claim 16, wherein the antenna array and the pair of feed lines are arranged in a plane of the RDL.

18. The integrated circuit package of claim 16, wherein the pair of feed lines extends at an angle of substantially 45° with regards to a longitudinal axis defined by a neighboring first leg of a first leg pair.

19. The integrated circuit package of claim 18, wherein the pair of feed lines extends at an angle of substantially 45° with regards to a longitudinal axis defined by a neighboring second leg of a second leg pair.

20. The integrated circuit package of claim 16, wherein the crossed dipole antenna is a circular polarized antenna.

21. The integrated circuit package of claim 16, wherein a length of a first leg is between 1.52 and 1.68 of a length of a second leg.

22. The integrated circuit package of claim 16, wherein the first legs have a first length such that a first dipole of the crossed dipole antenna has a first angle of input admittance and the second legs have a second length such that a second dipole of the crossed dipole antenna has a second angle of input admittance.

23. The integrated circuit package of claim 16, wherein the first angle of input admittance and the second angle of input admittance differ by 90°.

24. The integrated circuit package of claim 16, wherein each of the pair of feed lines are fed a signal by the RFIC, wherein the two signals have a phase difference of 180°.

25. The integrated circuit package of claim 16, wherein at least two antenna arrays are formed in the RDL and arranged in respective fan-out areas arranged at opposites sides of the RFIC.

26. The integrated circuit package of claim 25, wherein each antenna array comprises at least four crossed dipole antennas.

27. An apparatus comprising: the integrated circuit package of claim 25; and a heatsink element arranged on the RFIC.

28. The apparatus of claim 27, wherein each antenna array comprises at least four crossed dipole antennas.

29. A system comprising: the integrated circuit package of claim 25; a heatsink arranged on a first side of the RFIC; and a printed circuit board (PCB), wherein the integrated circuit package is mounted to the PCB such that the PCB is on a second side of RFIC.

30. The system of claim 29, wherein the PCB comprises a reflective metal layer and a plurality of vias, and the RFIC is adjacent to the plurality of vias.

31. The system of claim 30, wherein at least one antenna array is configured for communication at a specific wavelength, and is arranged at a first distance from the reflective metal layer and a second distance from the plurality of vias, wherein the first distance is a quarter of the specific wavelength, and the second distance is between one-half and three-quarters of the specific wavelength.

32. The system of claim 29, wherein the heatsink, the RFIC, and the plurality of vias form a reflector wall.

33. The system of claim 32, wherein the reflector wall is configured to increase the gain of the antenna array.

34. The system of claim 32, wherein the reflective metal layer and the reflector wall form a corner reflector antenna.

35. The system of claim 34, wherein the corner reflector antenna is configured to increase the gain of the antenna array.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0023] This and other aspects of the present invention will now be described in more detail, with reference to the appended drawings showing embodiment(s) of the invention.

[0024] FIG. 1 schematically shows a cross-sectional view of an integrated circuit package according to an exemplifying embodiment of the present invention.

[0025] FIG. 2 schematically shows a perspective view of a crossed dipole antenna according to an exemplifying embodiment of the present invention.

[0026] FIG. 3 schematically shows a perspective view of an integrated circuit package according to an exemplifying embodiment of the present invention.

[0027] FIG. 4 schematically shows a cross-sectional view of a system according to an exemplifying embodiment of the present invention.

[0028] FIG. 5 schematically shows a perspective view of a system according to an exemplifying embodiment of the present invention.

DETAILED DESCRIPTION

[0029] FIG. 1 schematically shows a cross-sectional view of an integrated circuit package 2 according to an exemplifying embodiment of the present invention. The integrated circuit package 2 comprises a first side 2a and second side 2b. The first side 2a and the second side 2b are opposite to each other. The first side 2a comprises bumps 26a, 26b. The bumps 26a, 26b comprise interconnect elements 26a. Further, the bumps 26a, 26b comprise dummy bumps 26b. The integrated circuit package 2 comprises three passivation layers. One of the passivation layers comprises the first side 2a. The passivation layers extend along the length and width of the integrated circuit package 2. The integrated circuit package 2 comprises a first redistribution metal layer, RDL, 25. The first RDL 25 is arranged between two of the passivation layers. The integrated circuit package 2 comprises two antenna arrays 100, see

[0030] FIG. 3. It is to be understood that each antenna array 100 may comprise a plurality of antennas and/or antenna arrays. The antenna arrays 100 may each comprise at least one crossed dipole antenna 10, see FIG. 2. The antenna arrays 100 are formed in the first RDL 25. The integrated circuit package 2 comprises a die constituting a radio frequency integrated chip, RFIC, 21. The RFIC 21 is arranged on top of the passivation layers, opposite the first side 2a. Further, the RFIC 21 is arranged at the middle of integrated circuit package 2 with regards to the length and width of the integrated circuit package 2. The first RDL 25 is coupled to the RFIC 21. Hence, a portion of the first RDL 25 is extending through one of the passivation layers to the RFIC 21. The antenna arrays 100 are coupled to the RFIC 21 via the first RDL 25. The integrated circuit package 2 comprises a second RDL. A portion of the second RDL is extending through two of the passivation layers to the RFIC 21. The interconnect elements 26a are coupled to the RFIC 21 via the second RDL. The first RDL 25 and the second RDL are arranged between the passivation layers. Hence, the second RDL is arranged between the passivation layer comprising the first side 2a and a middle passivation layer, and the first RDL 25 is arranged between the middle passivation layer and a passivation layer adjacent to the RFIC 21. The integrated circuit package 2 comprises a fan-out area 22. The fan-out area 22 comprises a mold compound. The fan-out area 22 comprises a first fan-out area 22a, and a second fan-out area 22b, see FIG. 4. The first and second fan-out areas 22a, 22b are arranged at the sides of the die constituting the RFIC 21. The first and second fan-out areas 22a, 22b are the parts of the fan-out area 22 which comprises the at least one antenna array 100. The mold compound of the fan-out area 22 is arranged on top of the passivation layers and the metal redistribution layers, opposite to the first side 2a and around the RFIC 21. A top of the RFIC 21 is exposed. The mold compound does not cover the top of the RFIC 21. However, it is to be understood that the mold compound may be arranged on top of the RFIC 21 as well. A top of the RFIC 21 and the mold compound comprise the second side 2b. The at least one antenna arrays 100 are configured to transmit and/or receive radio signals through the mold compound of the first and second fan-out areas 22a, 22b.

[0031] FIG. 2 schematically shows a perspective view of a crossed dipole antenna 10 according to an exemplifying embodiment of the present invention. The perspective view of FIG. 2 shows the crossed dipole antenna 10 as arranged in a plane, wherein the viewing angle is perpendicular to said plane. The crossed dipole antenna 10 is arranged in a first RDL 25, which may be understood as comprising said plane. The crossed dipole antenna 10 may be understood as being formed in, formed by, and or comprised by the first RDL 25. The crossed dipole antenna 10 comprises a first dipole and a second dipole. The first dipole comprises two first legs 11. The second dipole comprises two second legs 12. Further, the crossed dipole antenna 10 comprises two leg pairs 10a, 10b, which may be understood as a first leg pair 10a and a second leg pair 10b. Each leg pair 10a, 10b comprises one first leg 11 of the first dipole and one second leg 12 of the second dipole. The first leg 11 and the second leg 12 of each leg pair 10a, 10b are arranged at a right angle with regards to longitudinal axes of said first leg 11 and said second leg 12. The two first legs 11 are arranged in parallel with regards to the longitudinal axes of the first legs 11. The two first legs 11 are aligned with regards to the longitudinal axes of the first legs 11. The two second legs 12 are arranged in parallel with regards to the longitudinal axes of the second legs 12. The first leg pair 10a and the second leg pair 10b have substantially the same shape. However, the first leg pair 10a and the second leg pair 10b are rotated 180° in the plane with regards to each other. The crossed dipole antenna 10 comprises a center 15. Each leg 11, 12 comprises a proximal end and a distal end. The proximal ends of the legs 11, 12 are arranged at the center 15. The first legs 11 are extending in opposite directions from their respective proximal end towards their respective distal end.

[0032] The second legs 12 are extending in opposite directions from their respective proximal end towards their respective distal end. A direction of extension of a first leg 11 is perpendicular to a direction of a second leg 12. Hence, the first legs 11 and the second legs 12 may be understood as being arranged in an X-shape, a +-shape or a cross. The first and second legs 11, 12 have rectangular shapes, wherein the shape narrows at the respective proximal ends. Hence, the first and second legs 12 may be understood to have a rectangular arrow shape. The first legs 11 are longer than the second legs 12. Hence, the first legs 11 and the second legs 12 have different lengths. Thereby, the first dipole and the second dipole of the crossed dipole antennas 10 have different dipole lengths. The first legs 11 and the second legs 12 have the same width. A relation between the length and the width of the first legs 11 is 7.2. A relation between the length and the width of the second legs is 4.5. A relation between the length of the first legs 11 and the length of the second legs is 1.62. The different dipole lengths achieve circular polarization of the crossed dipole antenna 10. In other words, the relation between the lengths of the first legs 11 and the second legs 12 is set such that the crossed dipole antenna 10 is circular polarized.

[0033] A pair of feed lines 20a, 20b is coupled to the crossed dipole antenna 10. The pair of feed lines 20a, 20b may be understood as comprising a first feed line 20a, and a second feed line 20b. The first feed line 20a is coupled to the first leg pair 10a at the center 15. Each feed line 20a, 20b is split into two portions at the center 15 and the two portions are coupled to a first leg 11 and a second leg 12 of the first leg pair 10a and the second leg pair 10b, respectively. Thereby, the first feed line 20a is coupled to the first leg 11 and the second leg 12 of the first leg pair 10a, and the second feed line 20b is coupled to the second leg pair 10b at the center 15. Thereby, the second feed line 20b is coupled to the first leg 11 and the second leg 12 of the second leg pair 10b. The feed lines 20a, 20b are extending out from the center 15 between the first leg pair 10a and the second leg pair 10b. The feed lines 20a, 20b are extending in a direction of extension, wherein the direction of extension is at angles α, β with regards to the neighboring legs. The angles α, β are 45 degrees. Interference to the crossed dipole antenna 10 caused by the feed lines 20a, 20b is minimal when the angles α, β are 45 degrees. By the term “neighboring legs” it is meant, for example, the two closest legs of the crossed dipole antenna 10, and/or the second leg 12 of the first leg pair 10a and the first leg 11 of the second leg pair 10b. The direction of extension of the feed lines 20a, 20b may optimally reduce interference and/or disturbance of the first and second dipole of the crossed dipole antenna. The feed lines 20a, 20b are arranged adjacent to each other along their extension from the center 15. The feed lines 20a, 20b are extending towards the RFIC 21 (not shown, see FIG. 1 and FIG. 3). The above-mentioned exemplifying embodiment removes the need for crossing of the feed lines that feed the crossed dipole antennas 10, thereby creating a simpler and more compact solution. The above-mentioned exemplifying embodiment realizes the crossed dipole antenna 10 in planar technology. In other words, the crossed dipole antenna 10 and the pair of feed lines 20a, 20b are realized in a single RDL of the integrated circuit package 2.

[0034] FIG. 3 schematically shows a perspective view of an integrated circuit package 2 according to an exemplifying embodiment of the present invention. The perspective view of FIG. 3 shows the integrated circuit package 2 from below. In other words, the perspective view of FIG. 3 shows the first side 2a of the integrated circuit package 2, wherein the viewing angle is perpendicular to the first side 2a. The integrated circuit package 2, as shown in FIG. 3, has a rectangular shape, comprising four sides. The integrated circuit package 2 comprises an RFIC 21, and a fan-out area 22. The RFIC 21 has a rectangular shape and is arranged at the center of the integrated circuit package 2. Sides of the RFIC 21 are parallel to adjacent sides of the integrated circuit package 2. The fan-out area 22 is arranged around the RFIC 21. The fan-out area 22 comprises two antenna arrays 100. Each antenna array 100 is arranged in a respective fan-out area of the fan-out area 22. One of the antenna arrays 100 is arranged in the first fan-out area 22a of the fan-out area 22, and the other one of the antenna arrays 100 is arranged in the second fan-out area 22b of the fan-out area 22. The fan-out area 22 further comprises two grounding portions 27. The grounding portions 27 are configured to reduce interference and/or disturbance between the RFIC 21 and the antenna arrays 100, and between antenna arrays 100. The grounding portions 27 may comprise grounding vias and/or grounding lines. Each grounding portion 27 is arranged between a side of the RFIC 21, a side of the integrated circuit package 2 adjacent to said side of the RFIC 21, and the two antenna arrays 100.

[0035] Each antenna array 100 comprises four crossed dipole antennas 10. The four dipole antennas 10 of each antenna array 100 are arranged in a row. The two rows are parallel with a width of the integrated circuit package 2. The four dipole antennas 10 are arranged such that the longitudinal axis of the first dipole 11 of each dipole antenna 10 is parallel to a diagonal of the first side 2a of the integrated circuit package 2. The four dipole antennas 10 of each antenna array 100 are similarly oriented. The integrated circuit package 2 comprises eight pairs of feed lines 20a, 20b. Each pair of feed lines 20a, 20b is coupled to a respective crossed dipole antenna 10. The feed lines 20a, 20b coupled to the two crossed dipole antennas 10 arranged in the middle of the row of four dipole antennas 10 of each antenna array 100 are extending from the center of its respective crossed dipole antenna 10 to the RFIC 21. A first portion of the feed lines 20a, 20b of the two crossed dipole antennas 10 arranged at the beginning and the end of the row of four dipole antennas 10 of each antenna array 10 are extending from the center of its respective crossed dipole antenna 10 towards the closest grounding portion 27. A second portion of the feed lines 20a, 20b of the two crossed dipole antennas 10 arranged at the beginning and the end of the row of four dipole antennas 10 of each antenna array 10 are extending from the first portion of said feed lines 20a, 20b to the RFIC 21.

[0036] The integrated circuit package 2 comprises a plurality of bumps 26a, 26b, similar to those shown in FIG. 1. The bumps arranged at the RFIC 21 are interconnect elements 26a. The interconnect elements 26a may be understood as, for example, soldering bumps. The interconnect elements 26a are configured for coupling the integrated circuit package 2 to a PCB 5 (not shown; see FIG. 4 and FIG. 5) and/or another circuit. The bumps arranged at the fan-out area are dummy bumps 26b. The dummy bumps 26b are arranged around each crossed dipole antenna 10. The dummy bumps 26b may not be configured to be coupled to another circuit. The dummy bumps 26b may be configured to provide support and or stability for the integrated circuit package 2 when coupled to a PCB 5 or circuit. Further, the dummy bumps 26b may be configured to reduce disturbance and/or interference between the RFIC 21 and the crossed dipole antennas 10 or between dipole antennas 10.

[0037] FIG. 4 schematically shows a cross-sectional view of a system 500 according to an exemplifying embodiment of the present invention. The system 500 comprises an arrangement 1 and a printed circuit board 5. The arrangement 1 comprises an integrated circuit package 2 and a heatsink element 50. The heatsink element 50 is arranged on the RFIC 21 of the integrated circuit package 2. The heatsink element 50 is arranged between the first fan-out area 22a and the second fan-out area 22b of the integrated circuit package 2. The heatsink element 50 has a curved shape, which may be understood as a semicircular shape comprising a bottom. The bottom of the heatsink element 50 is arranged on the RFIC 21. The heatsink element 50 is widest at the bottom. The shape and placement of the heatsink element 50 may be adapted to reduce interference and/or disturbance between the antenna arrays 100, and may increase the performance of beam steering of the antenna arrays 100. The arrangement 1 is mounted to the PCB 5. The arrangement 1 is mounted to the PCB by solder bumps 26a, 26b. The solder bumps 26b are arranged below the fan-out areas 22a, 22b. The solder bumps 26a comprise interconnect elements and are configured to connect the integrated circuit package 2 to the PCB 5. The solders bumps 26a, 26b are a part of the design, and provide an increased antenna performance and mechanical stability for the integrated circuit package 2. The PCB 5 comprises a reflective metal layer 6. The reflective metal layer 6 is arranged at a bottom side of the PCB 5, which is opposite to a side of the PCB on which the integrated circuit package 2 is mounted. The integrated circuit package 2 is arranged to the PCB 5 such that the antenna arrays 100 of the integrated circuit package 2 are arranged at a first distance d1 from the reflective metal layer 6. The first distance d1 is measured in a direction which is perpendicular to the reflective metal layer 6. By arranging the antenna arrays 100 at the first distance d1 from the reflective metal layer 6 results in constructive interference and/or an increased gain for the antenna arrays 100.

[0038] The PCB 5 comprises a plurality of vias 7. The plurality of vias 7 are configured for reflection of antenna signals of the antenna arrays 100. The plurality of vias 7 are arranged along a shape associated with a shape of a perimeter of the RFIC 21. The integrated circuit package 2 is arranged to the PCB 5 such that the plurality of vias 7 are arranged along and/or around the perimeter, or arranged along and/or around at a distance to the perimeter, of the RFIC 21. The plurality of vias 7 may comprise vias within the perimeter of the RFIC 21 as well. The integrated circuit package 2 is arranged to the PCB 5 such that the antenna arrays 100 of the integrated circuit package 2 are arranged at a second distance d2 from the plurality of vias 7. The second distance d2 is measured in a direction which is parallel with the reflective metal layer 6. In other words, the second distance d2 is measured in a direction which is perpendicular to the first distance d1. The second distance d2 is measured from a center of an antenna array 100 to the plurality of vias 7. It may be understood that the second distance d2 is the shortest distance between the center of the antenna array 100 and the plurality of vias 7.The heatsink element 50, the RFIC 21 and the plurality of vias 7 together form a side wall reflector 8. The side wall reflector 8 may be understood as an electric wall. The side wall reflector 8 may increase the gain of the antenna arrays 100. The antenna arrays 100 are configured for transmission and/or reception at a specific wavelength (i.e. at a specific frequency). The first distance d1 is equal to a quarter of the specific wavelength. The second distance d2 is equal to a one-half of the specific wavelength. The combination of the side wall reflector 8 and the reflective metal layer 6 may be understood as corner reflector antenna. The corner reflector antenna may further increase the constructive interference and/or the gain for the antenna arrays 100.

[0039] FIG. 5 schematically shows a perspective view of a system 500 according to an exemplifying embodiment of the present invention. The system 500 comprises an integrated circuit package 2, a heatsink element 50 and a PCB 5. A first side 2a of the integrated circuit package 2 is soldered to the PCB 5 at a center of the PCB 5. The heatsink element 50 is arranged on the second side 2b of the integrated circuit package 2. The heatsink element 50 has a longitudinal extension. The heatsink element 50 comprises two end sections and a middle section. The middle section of the heatsink element 50 is arranged along a middle portion of the integrated circuit package 2. The middle portion of the integrated circuit package 2 comprises the RFIC 21 and grounding portions 27. The first fan-out area 22a and the second fan-out area 22b of the integrated circuit package 2 is not covered by the heatsink element 50. The width of the middle section of the heatsink element 50 approximately equal to a width or heigh of the RFIC 21. Thereby, the disturbance by the heatsink element 50 to the antenna arrays 100 comprised in the first and second fan-out areas 22a, 22b is reduced.

[0040] Further, the end sections of the heatsink element 50 widen from the middle section toward respective longitudinal ends of the heatsink element 50. Each end section of the heatsink element 50 comprises two fastening holes. One of the fastening holes of each end section is configured for receiving a fastening means, such as a screw or a nut, for attaching the heatsink element 50 to the PCB 5. The other of the fastening holes of each end section is configured for receiving a fastening means, such as a screw or a nut, for attaching the system 500 to a housing and/or an auxiliary device. The shape of the heatsink element 50 is configured for reflecting the signal transmitted and/or received by the antenna arrays 100. In other words, the shape of the heatsink element 50 is configured for increasing the gain of the antenna arrays 100.

[0041] The person skilled in the art realizes that the present invention by no means is limited to the preferred embodiments described above. On the contrary, many modifications and variations are possible within the scope of the appended claims.