BONDING MEMBER FOR SEMICONDUCTOR DEVICE
20230395550 · 2023-12-07
Assignee
Inventors
Cpc classification
B23K35/3006
PERFORMING OPERATIONS; TRANSPORTING
International classification
B23K35/30
PERFORMING OPERATIONS; TRANSPORTING
Abstract
A bonding member 10 used for bonding a semiconductor device 20 and a substrate 30, the bonding member including: a thermal stress relieving layer 11 made of any of Ag, Cu, Au, and Al; a first Ag brazing material layer 12 containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the semiconductor device is bonded; a second Ag brazing material layer 13 containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the substrate is bonded; a first barrier layer 14 made of Ni and/or Ni alloy and provided between the thermal stress relieving layer and the first Ag brazing material layer; and a second barrier layer 15 made of Ni and/or Ni alloy and provided between the stress relieving layer and the second Ag brazing material layer, in which a thermal conductivity of the bonding member after a power cycle test is 200 W/m.Math.K or more.
Claims
1. A semiconductor device bonding member used for bonding a semiconductor device and a substrate, the bonding member comprising: a thermal stress relieving layer made of any of Ag, Cu, Au, and Al; a first Ag brazing material layer containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the semiconductor device is bonded; a second Ag brazing material layer containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the substrate is bonded; a first barrier layer made of Ni and/or Ni alloy and provided between the stress relieving layer and the first Ag brazing material layer; and a second barrier layer made of Ni and/or Ni alloy and provided between the stress relieving layer and the second Ag brazing material layer, wherein a thermal conductivity is 200 W/m.Math.K or more after a power cycle test in which heating to 300° C. by current supply and cooling to 25° C. are repeated 30,000 times.
2. The semiconductor device bonding member according to claim 1, wherein the thermal stress relieving layer is made of Ag.
3. The semiconductor device bonding member according to claim 1 or 2, wherein a porosity of the first Ag brazing material layer and the second Ag brazing material layer is 5 vol % or less, and a total thickness of the first Ag brazing material layer and the second Ag brazing material layer is 10% or less of a thickness of the entire bonding member.
4. The semiconductor device bonding member according to any one of claims 1 to 4, wherein the thermal stress relieving layer has a porosity of 40 vol % or less.
5. The semiconductor device bonding member according to any one of claims 1 to 5, wherein an overall thickness is 10 μm or more and 300 μm or less.
6. A semiconductor module comprising the semiconductor device bonding member according to any one of claims 1 to 6.
Description
BRIEF DESCRIPTION OF DRAWINGS
[0048]
DESCRIPTION OF EMBODIMENTS
[0049] A semiconductor device bonding member according to the present invention has a configuration having a function corresponding to each of the failure mode 1 and the failure mode 2 occurring at a bonding part between a semiconductor device and an electrode and heat release substrate in a semiconductor module. Solder, nano-Ag, and the bonding member described in Patent Literature 1, which are conventional bonding members, all bond the semiconductor device and the electrode and heat release substrate with a single member. On the other hand, in the present invention, a member corresponding to each failure mode is prepared, and these members are combined to solve the problem.
[0050] The requirements of the semiconductor device bonding member according to the present invention are as described above, but the technical idea can be applied to a wider range. Specifically, for example, a material constituting the barrier layer can be made of Co or Co alloy. That is, a semiconductor device bonding member extending the technical idea of the present invention can be expressed as a semiconductor device bonding member including: [0051] a thermal stress relieving layer made of one or more of Ag, Cu, Au, and Al; [0052] a first Ag brazing material layer containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the semiconductor device is bonded; [0053] a second Ag brazing material layer containing Ag and Sn as main components and provided on a side of the thermal stress relieving layer to which the substrate is bonded; [0054] a first barrier layer made of Ni, Co, and/or alloy of Ni and/or Co, and provided between the stress relieving layer and the first Ag brazing material layer; and [0055] a second barrier layer made of Ni, Co, and/or alloy of Ni and/or Co, and provided between the stress relieving layer and the second Ag brazing material layer, [0056] in which a thermal conductivity is 200 W/m.Math.K or more after a power cycle in which heating to 300° C. by current supply is repeated 30,000 times. In consideration of Young's modulus (73 GPa), thermal conductivity (420 W/m.Math.K), electrical conductivity (volume resistivity 1.6 μΩ.Math.cm), cost required for acquisition, and the like, it is most preferable to use the thermal stress relieving layer made of Ag. Furthermore, from the viewpoint of more reliably suppressing diffusion of Sn into the thermal stress relieving layer, each of the first barrier layer and the second barrier layer is preferably made of Ni and/or Ni alloy. Moreover, from the viewpoint of increasing the thermal conductivity of the entire bonding member, the total thickness of the first Ag brazing material layer and the second Ag brazing material layer is preferably 10% or less of the thickness of the entire bonding member, and the first Ag brazing material layer and the second Ag brazing material layer preferably contain 50 wt % or more of Ag. It is more preferable that the first Ag brazing material layer and the second Ag brazing material layer contain 60 wt % or more of Ag.
[0057] Hereinafter, a specific embodiment and examples of the semiconductor device bonding member according to the present invention will be described. A semiconductor device bonding member 10 of the present embodiment is a member used for so-called die bonding, and is used for bonding a semiconductor device 20 to a substrate such as an electrode and heat release substrate 30 as illustrated in
[0058] Hereinafter, each part constituting the bonding member of the present embodiment will be described.
[0059] (Semiconductor Device of Member to be Bonded)
[0060] In the semiconductor device 20 of a general IGBT, an electrode and bonding layer 21 made of Ni (for other special products, Co, Ag, Cu, or multilayer may be used.) and also serving as an electrode and a bonding layer is provided on a bonding surface of the semiconductor device. In many cases, the electrode and bonding layer 21 is only one layer made of Ni or Ni alloy, but in some cases, an antioxidant layer such as a thin Ag layer or Au layer is further provided in order to prevent oxidation of Ni. Even when these antioxidant layers are provided, in the present embodiment, the metal constituting the antioxidant layer diffuses into the Ag brazing material layer 12 at the time of bonding and becomes a part of the Ag brazing material layer. Ni and Ag hardly form a solid solution with each other, but when Sn is present, Ag and Ni react with each other via Sn. Therefore, the Ag brazing material layer 13 may contain an alloy containing other elements such as Ni, or Ag or Au constituting the antioxidant layer, or an alloy of Ag or Au.
[0061] (Electrode and Heat Release Substrate of Member to be Bonded)
[0062] The electrode and heat release substrate 30 is basically made of Cu or Cu alloy. When used at a high temperature, it is desirable to provide an antioxidant layer such as Ni or Ni alloy in order to prevent oxidation. In the present embodiment, a bonding surface of the electrode and heat release substrate 30 is subjected to electroless plating with Ni.
[0063] (First Ag Brazing Material Layer and Second Ag Brazing Material Layer)
[0064] The thermal stress relieving layer 11 made of pure Ag and the Ni layer 21 provided on the bonding surface of the semiconductor device 20 can be bonded to the first Ag brazing material layer 12 under the condition that the semiconductor device 20 is not broken, and the condition that the first Ag brazing material layer passes the power cycle test at 300° C. is required to be satisfied. In the bonding member described in Patent Literature 1, since the semiconductor device is bonded at a low temperature, breakage of the semiconductor device can be avoided. However, fatigue deterioration caused by voids provided for relaxing thermal stress has occurred. In the semiconductor device bonding member 10 of the present embodiment, the thermal stress relieving layer 11 is provided separately from the first Ag brazing material layer 12 and the second Ag brazing material layer 13, and since the thermal stress is relaxed by the thermal stress relieving layer 11, it is not necessary to provide voids inside the first Ag brazing material layer 12 and the second Ag brazing material layer 13. Furthermore, these layers can be thinned. It is preferable that the thicknesses of the first Ag brazing material layer 14 and the second Ag brazing material layer 15 are appropriately adjusted in a range of 10 μm or less in total. When the thickness of the first Ag brazing material layer and the second Ag brazing material layer are larger than 10 μm, voids and aggregation of metal compounds are likely to occur. Furthermore, in order to increase the thermal conductivity of the entire semiconductor device bonding member 10, the total thickness of the 1Ag brazing material layer 12 and the second Ag brazing material layer 13 is desirably suppressed to 10% or less of the total thickness of the bonding member 10.
[0065] When the Ag brazing material layer is formed, an Ag foil and an Sn foil each having a thickness corresponding to a required composition ratio are used. The present inventors have found that by using foils of Ag and Sn in a vacuum and increasing the temperature and load in the Ag brazing material layer in order to require bonding reliability with a thin layer, a gas generated when Sn is melted is easily released, and a sufficiently thin layer with few voids can be produced, and further, bonding can be performed at 450° C. or lower at which a semiconductor device is not broken, and for example, even a 65Ag35Sn alloy (Ag brazing material) has a thermal conductivity of 110 W/m.Math.K, and a thin Ag brazing material layer with few defects and few voids of 5 vol % or less can be produced.
[0066] The AgSn-based Ag brazing material has good wettability with Cu, Ag, Ni, and Au, and high bonding reliability can be obtained. At the time of bonding, a metal constituting a layer provided on the surface of these materials for bondability and oxidation resistance may react with Ag or Sn, but if the Ag brazing material is 50 wt % Ag or more, a sufficiently high thermal conductivity can be secured even when such a reaction occurs.
[0067] The Ag brazing material layer can be produced, for example, by superposing an Ag foil and an Sn foil, and heating and pressurizing them. Alternatively, it can also be prepared by forming a very thin film of Ag and Sn by sputtering, plating, or the like, or by providing a thick foil, plate, or the like and heating and pressurizing the film on the surfaces of the semiconductor device 20 and the electrode and heat release substrate 30, which are members to be bonded, and the members constituting the thermal stress relieving layer 11. Moreover, it can also be prepared by providing a part or all of the Ag layer and the Sn layer on the member to be bonded and heating and pressurizing the Ag layer and the Sn layer. Note that the composition and thickness of the first Ag brazing material layer 12 and the second Ag brazing material layer 13 are not necessarily the same.
[0068] (Thermal Stress Relieving Layer)
[0069] In the bonding member 10 of the present embodiment, the thermal stress relieving layer 11 made of Ag or the like is used in order to avoid breakage (failure mode 2) occurring inside the bonding member 10. The thermal stress relieving layer 11 is preferably a plate material or foil of pure Ag that is flexible (has a low Young's modulus) and has a high thermal conductivity. Alternatively, in a case where the large-sized semiconductor device 20 or the extra-large electrode and heat release substrate 30 is bonded, a skeleton in which voids of 40 vol % or less are formed in order to further reduce the Young's modulus may be used as the thermal stress relieving layer 11. However, when the voids are 40 vol % or more, the thermal stress relieving layer is buckled at the time of bonding.
[0070] Since the Young's modulus of Ag is 73 GPa and is smaller than the Young's modulus of SiC (410 GPa) and the Young's modulus of Cu (120 GPa), the thermal stress generated between the semiconductor device 20 and the electrode and heat release substrate 30 is relaxed by deformation of the thermal stress relieving layer 11 made of Ag. Furthermore, since the thermal conductivity of Ag is as high as 420 W/m.Math.K, heat generated from the semiconductor device 20 can be efficiently released to the substrate. In the bonding member described in Patent Literature 1, internal fracture occurs due to generation of an intermetallic compound with Sn in Ag. A plate material of pure Ag is formed by melting and rolling at a temperature higher than or equal to the melting point of Ag of 960° C., and therefore even when the power cycle test at 300° C. is performed, no change due to fatigue degradation is observed at all. Furthermore, since a skeleton having a space inside a plate seat of pure Ag is also produced by heat sintering at about 900° C., no change due to fatigue degradation is observed even when the power cycle test at 300° C. is performed.
[0071] (First Barrier Layer, Second Barrier Layer)
[0072] When the first Ag brazing material layer 12 and the second Ag brazing material layer 13 are provided directly on a surface layer of the pure Ag plate material constituting the thermal stress relieving layer 11, Sn contained in these brazing material layers easily reacts with Ag in the thermal stress relieving layer 11, and the Sn easily diffuses into the thermal stress relieving layer 11. As a countermeasure in such a case, a barrier layer made of Ni may be disposed in the field of Ag brazing, and this is also effective in the present embodiment. By disposing the first barrier layer 14 and the second barrier layer 15 on the front and back surfaces of the thermal stress relieving layer 11 in this manner, only pure Ag having low electric resistance is present inside the thermal stress relieving layer 11, and aggregation of an intermetallic compound of Ag and Sn can be prevented to exhibit an original thermal stress relieving effect of Ag. Furthermore, the thermal conductivity inherent to Ag does not decrease or the electrical resistance does not increase. Moreover, the aggregation of the intermetallic compound of Ag and Sn can be prevented. As the thermal stress relieving layer 11, an appropriate material such as a Cu plate material, an Al plate material, or a skeleton provided with a space inside the Cu plate material or the Al plate material can be used as long as required performance and characteristics are satisfied.
[0073] (Bonding)
[0074] In the present embodiment, the method is not particularly limited as long as the semiconductor device 20 and the electrode and heat release substrate 30 can be bonded at a low temperature of 450° C. or less in order to prevent breakage of the semiconductor device 20. As one of the optimal methods, for example, there is a method in which film-like or foil-like melted Sn is diffusion-reacted with film-like or foil-like Ag to produce an Ag brazing material. In the SiC semiconductor device, it is considered that the semiconductor device is not broken when the temperature is about 450° C. and the pressure is about 30 MPa, but in order to more reliably avoid breakage of the semiconductor device, it is preferable to bond the semiconductor device at a temperature of 400° C. or less and a pressure of 15 MPa or less. Furthermore, the bonding time is preferably not more than 60 minutes. Moreover, considering bonding of a semiconductor device made of Si or GaN, it is more preferable to satisfy the requirements of a temperature of 350° C. or less, a pressure of 5 MPa or less, and a bonding time of 10 minutes or less. The present inventors have improved the Ag brazing material to enable bonding satisfying these requirements. In the present embodiment, in order to solve the problems of the failure modes 1 and 2, the first Ag brazing material layer 12 and the second Ag brazing material layer 13 are bonded to the thermal stress relieving layer 11 at a low temperature as described above. The bonding in the present embodiment is performed in consideration of a bonding technique using solder or a sintered body of Ag nano-particles, and equipment and a production technique used for these can be appropriately applied.
[0075] Next, a conventional technique of bonding a semiconductor device (conventional examples), examples corresponding to the above embodiment, and comparative examples in which a part of the configuration of the examples is changed will be described.
[0076] In Conventional Examples 1 to 8, bonding of a SiC semiconductor device and a Cu electrode and heat release substrate was attempted using bonding members shown in Table 1. Bonding conditions in each example are also shown.
TABLE-US-00001 TABLE 1 Characteristics evaluation Bonding member Bonding conditions Thermal Overall Tem- Bond- conduc- thick- Void per- ing tivity ness fraction Bonding Atmos- ature Load time Bond- Power (W/m .Math. (μm) Material (%) method phere (° C.) (MPa) (min) ability Cycle K) Conven- None Heating and Ar 350 5 10 x — — tional pressure bonding Example method 1 Conven- 2 Ag layer (bonding — Heating and N2—H2 350 5 10 x — — tional surface of bonded pressure bonding Example member) method 2 Conven- 100 60Ag30Cu10Sn — Heating and N2—H2 350 5 10 x — — tional pressure bonding Example method 3 Conven- 100 95Pb5Sn solder 5% or Heating and N2—H2 350 1 1 ○ x — tional less pressure bonding Example method 4 Conven- 100 Nano-Ag Un- Heating and Ar 350 5 10 ○ x — tional known pressure bonding Example method 5 Conven- 100 80Ag20Sn 40 Powder Sn Ar 350 5 10 ○ x — tional melting reaction Example bonding method 6 Conven- 10 80Ag20Sn 35 Powder Sn Ar 350 5 10 ○ x — tional melting reaction Example bonding method 7 Conven- 100 90Ag10Sn 7 Powder Sn Ar 400 15 10 ○ x — tional melting reaction Example bonding method 8
[0077] In Conventional Example 1, a SiC semiconductor device and a Cu electrode and heat release substrate were stacked, directly placed in an argon atmosphere without a bonding member, and directly bonded by heating to 350° C. and pressurizing to 5 MPa for 10 minutes.
[0078] In Conventional Example 2, a 1 μm-thick Ag layer (2 μm-thick Ag layer in total) was formed on each of a bonding surface of a SiC semiconductor device and a bonding surface of a Cu electrode and heat release substrate, and placed in a nitrogen and hydrogen atmosphere, and both were bonded by heating to 350° C. and pressurizing to 5 MPa for 10 minutes.
[0079] In Conventional Example 3, an Ag brazing material (60Ag30Cu10Sn) having a thickness of 100 μm was sandwiched between a SiC semiconductor device and a Cu electrode and heat release substrate, placed in a nitrogen and hydrogen atmosphere, heated to 350° C. and pressurized to 5 MPa for 10 minutes, and bonded.
[0080] In Conventional Example 4, a SiC semiconductor device and a Cu electrode and heat release substrate were bonded to each other with a Pb-based solder (95Pb5Sn solder) by heating the SiC semiconductor device and the Cu electrode and heat release substrate to 350° C. and pressurizing the SiC semiconductor device and the Cu electrode and heat release substrate to 1 MPa for 1 minute in a nitrogen and hydrogen atmosphere. The void fraction of the bonding member of Conventional Example 4 is 5 vol % or less.
[0081] In Conventional Example 5, a Ag nano-particle layer having a thickness of 100 μm is provided between bonding surfaces of a SiC semiconductor device and an electrode and heat release substrate, and the SiC semiconductor device and the electrode and heat release substrate are bonded to each other by being placed in an argon atmosphere, heated to 350° C., and pressurized to 5 MPa for 10 minutes.
[0082] The thickness of each of the bonding members of Conventional Examples 3 to 5 is 100 μm.
[0083] Conventional Examples 6 to 8 correspond to the semiconductor device bonding member proposed by the present inventors in Patent Literature 1.
[0084] In Conventional Examples 6 and 7, 80 wt % of Ag powder and 20 wt % of Sn powder were disposed between a SiC semiconductor device and an electrode and heat release substrate, the SiC semiconductor device and the electrode and heat release substrate were placed in a non-oxidizing atmosphere (argon), and Sn was melted and bonded by heating to 350° C. and pressurizing to 5 MPa for 10 minutes.
[0085] In Conventional Example 8, 90 wt % of Ag powder and 10 wt % of Sn powder were disposed between a SiC semiconductor device and an electrode and heat release substrate, the SiC semiconductor device and the electrode and heat release substrate were placed in an argon atmosphere, and Sn is melted and bonded by heating to 400° C. and pressurizing to 15 MPa for 10 minutes.
[0086] The bonding member of Conventional Example 6 contains 40 vol % of voids, the bonding member of Conventional Example 7 contains 35 vol % of voids, and the bonding member of Conventional Example 8 contains 7 vol % of voids. The thickness of the bonding members of Conventional Examples 6 and 8 is 100 μm, and the thickness of the bonding member of Conventional Example 7 is 10 μm.
[0087] For each of the above-described conventional examples, first, the state of the bonded part was visually confirmed, and the bondability was evaluated. In the evaluation of the bondability, a sample in which cracking, chipping, or peeling did not occur in the bonding member or the bonding part was determined to be acceptable. In Conventional Examples 1 to 3, the semiconductor device and the electrode and heat release substrate were not bonded, and only Conventional Examples 4 to 8 passed the evaluation of bondability.
[0088] (Power Heat Cycle Test)
[0089] A power cycle test was performed on Conventional Examples 4 to 8 that passed the evaluation of bondability. In the power cycle test, a heating and cooling cycle was repeated 30,000 times in which a test piece obtained by bonding a SiC semiconductor device and a Cu electrode and heat release substrate to each other was attached to a large-sized water-cooled cooler using thermal grease, the semiconductor device 20 and the electrode and heat release substrate 30 were supplied current for 3 seconds to be heated to 300° C., and then the semiconductor device and the electrode and heat release substrate were cooled to 25° C. for 30 seconds by the cooler. When an abnormal voltage or electric current occurred during the test, continuation of the test was dangerous, and the test was stopped. When a crack or breakage occurred in a cross section of the test piece, the test piece was determined to be unacceptable. Basically, the thermal conductivity after the power cycle test of 30,000 times was measured, and those having a thermal conductivity of 200 W/m.Math.K or less were determined to be unacceptable. This makes it possible to capture a change that does not appear in the power cycle test (for example, Non Patent Literatures 4 to 6). All of Conventional Examples 4 to 8 failed in the power cycle test. Note that, as in Examples described later, the following thermal conductivity measurement was performed for a test piece that passed the power cycle test.
[0090] (Measurement of Thermal Conductivity)
[0091] For the test piece that passed the power heat cycle test, the thermal conductivity was measured by a laser flash method using FTC-RT manufactured by Advanced Riko Co., Ltd. In the laser flash method, the surface of the sample is irradiated with pulsed laser light and instantaneously heated, and a process in which the heat of the surface is diffused to the back surface of the sample with the lapse of time is observed as a time change in the temperature of the back surface of the sample. The standard sample in this measurement method is a circular piece having a diameter of 10 mm and a thickness of 1 mm, or a square piece having 10 mm square shape and 1 mm in thickness. This test piece was obtained by bonding a 10 mm square, 1 mm thick Cu electrode and heat release substrate and a 5 mm square, 0.35 mm thick SiC semiconductor device with a 5 mm square, 11 to 100 μm thick bonding member. In order to correct the difference from the dimension of the standard sample in the laser flash method, the thermal conductivity of the bonding member was calculated based on the measurement results of the Cu electrode and heat release substrate and the SiC semiconductor device having the same shape as the test piece and the measurement results of the test pieces of the Examples described later.
[0092] As can be seen from the results shown in Table 1, when the SiC semiconductor device and the Cu electrode and heat release substrate were bonded by the conventional technique, there is no piece which passes all the evaluations (tests). SiC semiconductor devices operating at 300° C. are required to have a sufficient thermal conductivity even after the power cycle test in addition to the above test, but all the test pieces failed before the evaluation.
[0093] Next, a test piece (hereinafter, it is simply referred to as “Example 1” or the like.) in which a semiconductor device and an electrode and heat release substrate are bonded to each other by a bonding member of an example according to the present embodiment and a comparative example prepared based on the above results will be described. Table 2 shows the configuration of the bonding member and bonding conditions in each example. The thickness of the brazing material layer in Table 2 is the sum of the thicknesses of the first Ag brazing material layer 12 and the second Ag brazing material layer 13. In Examples 1 to 11, the same Ag brazing material layer was used as the first Ag brazing material layer 12 and the second Ag brazing material layer 13, but the first Ag brazing material layer 12. However, the second Ag brazing material layer 13 may differ from each other.
TABLE-US-00002 TABLE 2 Bonding member Bonding layer Barrier with SiC/Cu layer Characteristics (Ag brazing (Ni, 1 evaluation Over- material layer) Thermal stress μm for Bonding conditions Thermal all Material Total relieving layer each of Tem- conduc- thick- (Main thick- Void Thick- Void upper per- tivity ness com- ness fraction ness fraction and Bonding Atmos- ature Load Time Bond- Power (W/m .Math. (μm) ponent) (μm) (%) Material (μm) (%) lower) method phere (° C.) (MPa) (min) ability Cycle K) Example 100 80Ag20Sn 10 5% or Ag 88 0 Presence Low- Vac- 350 5 10 ○ ○ 329 1 less plate temp- uum Example 100 80Ag20Sn 5 5% or Ag 93 0 Presence erature Vac- 350 5 10 ○ ○ 340 2 less plate Ag uum Example 100 80Ag20Sn 5 5% or Ag 93 20 Presence brazing Vac- 350 5 10 ○ ○ 272 3 less plate ma- uum Example 100 80Ag20Sn 5 5% or Ag 93 40 Presence terial Vac- 350 5 10 ○ ○ 209 4 less plate bond- uum Example 300 80Ag20Sn 5 5% or Ag 293 0 Presence ing Vac- 350 5 10 ○ ○ 357 5 less plate method uum Example 11 80Ag20Sn 1 5% or Ag 8 20 Presence Vac- 350 5 10 ○ ○ 266 6 less plate uum Example 100 80Ag20Sn 0.5 5% or Ag 97.5 10 Presence Vac- 350 5 10 ○ ○ 354 7 less plate uum Example 100 90Ag5Sn 5 5% or Ag 93 0 Presence Vac- 350 5 10 ○ ○ 333 8 less plate uum Example 100 90Ag5Sn 5 5% or Ag 93 0 Presence Vac- 400 10 10 ○ ○ 351 9 less plate uum Example 100 70Ag30Sn 1 5% or Ag 97 0 Presence Vac- 350 5 10 ○ ○ 265 10 less plate uum Example 100 60Ag40Sn 1 5% or Ag 97 0 Presence Vac- 350 5 10 ○ ○ 240 11 less plate uum Example 100 80Ag20Sn 5 5% or Cu 93 30 Presence Vac- 350 5 10 ○ ○ 223 12 less plate uum Example 100 80Ag20Sn 1 5% or Al 97 0 Presence Vac- 350 1 10 ○ ○ 208 13 less plate uum Compar- 100 70Ag30Sn 2 5% or Ag 98 0 Absence Vac- 350 5 10 ○ x — ative less plate uum Example 1 Compar- 100 80Ag20Sn 10 5% or Ag 90 20 Absence Vac- 350 5 10 ○ x — ative less plate uum Example 2 Compar- 100 80Ag20Sn 10 5% or Ag 88 50 Presence Vac- 350 5 10 x — — ative less plate uum Example 3 Compar- 100 80Ag20Sn 15 5% or Ag 83 20 Presence Vac- 350 5 10 ○ x — ative less plate uum Example 4 Compar- 100 80Ag20Sn 15 5% or Ag 83 20 Presence Vac- 400 10 10 x — — ative less plate uum Example 5 Compar- 100 80Ag20Sn 5 5% or Nano- 93 Un- Presence Vac- 350 5 10 ○ x — ative less Ag known uum Example 6
[0094] In each of Examples 1 to 13, a SiC semiconductor device and an electrode and heat release substrate were bonded to each other by a semiconductor device bonding member prepared by the above-described bonding method (low-temperature Ag brazing material bonding method in which Sn foil or layer is melted and diffusion-reacted in Ag foil or Ag layer) under conditions of a temperature of 350° C. (the heating temperature was set to 350° C. higher than 300° C. which is a heating temperature in the power heat cycle test.), a pressure of 5 MPa (10 MPa in Example 9), and a retention time of 10 minutes in a vacuum atmosphere.
[0095] Preparation and evaluation steps of Example 1, which is an example of the present embodiment, are as follows. The preparation and evaluation steps are the same for Example 2 to 13 (the thickness and the like of each member are different individually).
[0096] Preparation Step 1; A (commercially available) SiC semiconductor device (5 mm square, 0.35 mm thick) in which a Ni layer having a thickness of 1 μm is formed on a bonding surface is prepared.
[0097] Preparation Step 2; A (commercially available) electroless Ni plated 1 μm Cu plate material (10 mm square, 1 mm thick) in which a Ni layer having a thickness of 1 μm is formed on a bonding surface is prepared.
[0098] Preparation Step 3; A layered product by forming Ni layers (barrier layers) each having a thickness of 1 μm on upper and lower surfaces of an Ag plate material having a thickness of 88 μm, and providing Ag foils and Sn foils each having a thickness corresponding to the contents of Ag and Sn in each Example (in Example 1, 80 wt % of Ag and 20 wt % of Sn) on the surface of each Ni layer.
[0099] Preparation Step 4; The SiC semiconductor device, the laminate, and the Cu plate material are stacked and set in a hot press machine.
[0100] Preparation Step 5; In the hot press machine, the sample is held at a temperature of 350° C. and a pressure of 5 MPa (10 MPa only in Example 9) for 10 minutes in a vacuum atmosphere.
[0101] Evaluation Step 1; Two test pieces are produced by the preparation steps 1 to 5, and the bonding state is checked to evaluate the bondability. Then, 1 sample was heated to 500° C. and held for 30 minutes, and it was confirmed whether there was a problem in heat resistance. If there is no problem in heat resistance, the power heat cycle test at 300° C. is performed using the remaining one.
[0102] Evaluation Step 2; The thermal conductivity of the test piece that passed the power heat cycle test at 300° C. is measured by the laser flash method.
[0103] All of Examples 1 to 13 described above passed the bondability, heat resistance, and power cycle test. Moreover, as a result of measuring the thermal conductivity by the laser flash method performed after the power cycle test, the thermal conductivity was 200 W/m.Math.K or more in all of Examples 1 to 11.
[0104] On the other hand, among Comparative Examples 1 to 4 prepared by changing any parameter from Examples 1 to 11, Comparative Example 3 had poor bondability, and all of other Comparative Examples 1, 2, and 4 failed in the power cycle test.
[0105] Each of the above embodiment and examples is an example, and may be appropriately changed in accordance with the gist of the present invention. For example, although the above-described embodiment and examples have a configuration including a single thermal stress relieving layer, a structure in which a plurality of thermal stress relieving layers are laminated with an Ag brazing material layer interposed therebetween can also be adopted. In this case, the plurality of thermal stress relieving layers are not limited to the same material, and some or all of the thermal stress relieving layers may be made of different materials. Furthermore, in the above embodiment, the thickness of each of the first barrier layer 14 and the second barrier layer 15 is 1 μm, but the barrier layer may be interposed, and the thickness may be reduced to about 0.5 km.
[0106] The semiconductor device bonding member according to the present invention can be suitably used, for example, for bonding a semiconductor device and an electrode and heat release substrate (current supply substrate) in a power semiconductor module of a type in which a current supply path is formed in a direction perpendicular to a bonding surface of the semiconductor device. Of course, the present invention can also be suitably used in various fields (communication, calculation, memory, laser, LED, sensor, etc.) in which a semiconductor module of a type in which a current supply path is formed in a direction parallel to a bonding surface of a semiconductor device is used. Furthermore, in the IGBT module, the present invention can also be used in a semiconductor module on which a semiconductor device such as Si, GaN, or GaAs is mounted, other than a SiC semiconductor device. The semiconductor device bonding member according to the present invention can greatly contribute to downsizing, high performance, and cost reduction of future semiconductor modules. Moreover, in the present specification, the semiconductor module has been mainly described, but the semiconductor device bonding member according to the present invention can be similarly used for a semiconductor package. For example, the semiconductor device bonding member according to the present invention can also be suitably used for bonding a member having a large difference in linear expansion coefficient, such as a ceramic substrate, to an electrode and heat release substrate made of Cu or the like.
REFERENCE SIGNS LIST
[0107] 10 . . . Semiconductor Device Bonding Member [0108] 11 . . . Thermal Stress Relieving Layer [0109] 12 . . . First Ag Brazing Material Layer [0110] 13 . . . Second Ag Brazing Material Layer [0111] 14 . . . First Barrier Layer [0112] 15 . . . Second Barrier Layer [0113] 20 . . . Semiconductor Device [0114] 21 . . . Layer which shares Bonding Layer Metal with Electrode of Semiconductor Device [0115] 30 . . . Electrode and Heat Release Substrate