Method of manufacturing partially freestanding two-dimensional crystal film and device comprising such a film

Abstract

Disclosed is a method of manufacturing a partially freestanding two-dimensional crystal film (16, 16′), the method comprising providing a substrate (10) carrying a catalyst layer (14) for forming the two-dimensional crystal layer on a first surface; forming the two-dimensional crystal film on the catalyst layer; covering at least the two-dimensional crystal film with a protective layer (18); etching a cavity (24) in a second surface of the substrate, the second surface being opposite to the first surface, said cavity terminating on the catalyst layer; etching the exposed part of the catalyst layer from the cavity; and removing the protective layer, thereby obtaining a two-dimensional crystal film that is freestanding over said cavity. A device manufactured in this manner is also disclosed.

Claims

1. A method of manufacturing a graphene film, the method comprising: providing a carrier, the carrier having a first surface and a second surface, wherein the first surface is opposite the second surface, wherein the carrier is arranged to carry a catalyst layer for forming the graphene film on the first surface forming the graphene film on the catalyst layer; covering at least the graphene film with a protective layer; etching a cavity in the second surface, the cavity terminating on the catalyst layer; etching the exposed part of the catalyst layer from the cavity; and removing the protective layer, thereby obtaining a graphene film that is freestanding over the cavity and supported by the carrier in an edge region only and; wherein the graphene film is a partially freestanding.

2. The method of claim 1, wherein the graphene film has a thickness in the range of 0.3-50 nm.

3. The method of claim 2, wherein the graphene film has a thickness in the range of 20-40 nm.

4. The method of claim 1, wherein the graphene film is a single layer.

5. The method of claim 1, wherein the catalyst layer is one of a copper, nickel, platinum or ruthenium layer.

6. The method of claim 1, wherein the carrier has an oxide surface layer, the oxide surface layer covering all of a side surface of the carrier; wherein the protective layer is a nitride layer, the nitride layer at least covering all of the oxide surface layers, wherein the oxide surface layer covers at least the side surface of the carrier.

7. The method of claim 6, the nitride layer further covering the exposed portions of the oxide surface layer on the second surface.

8. The method of claim 6, wherein etching the cavity in the second surface comprises: etching the nitride and oxide layers on the second surface to expose the silicon substrate; etching the silicon substrate to expose the oxide layer at the first surface; and etching the oxide layer at the first surface to expose the catalyst layer.

9. The method of claim 8, further comprising providing a further oxide layer over the protective layer covering the graphene film, and wherein etching the oxide layer at the first surface to expose the catalyst layer further comprises etching the further oxide layer to expose the protective layer.

10. The method of claim 9, wherein the further oxide layer is provided so that the further oxide layer is configured to further protect the graphene film during the etching.

11. The method of claim 9, wherein the further oxide layer is configured to act as a sealing layer for the protective layer during the etching.

12. The method of claim 1, wherein a thickness of the graphene film is controlled by: a duration of forming the graphene film on the catalyst layer; and an amount of a precursor material that is used to form the graphene film.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Embodiments of the invention are described in more detail and by way of non-limiting examples with reference to the accompanying drawings, wherein:

(2) FIG. 1 shows SEM images of a prior art graphene layer after transfer onto a silicon substrate with a PMMA photoresist as a temporary support layer; and

(3) FIG. 2 schematically depicts a manufacturing process of a device according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(4) It should be understood that the Figures are merely schematic and are not drawn to scale. It should also be understood that the same reference numerals are used throughout the Figures to indicate the same or similar parts.

(5) FIG. 1 shows a SEM image (top pane) of a silicon substrate onto which a graphene film has been transferred. A region has been identified by the arrow in the top pane and a magnification of the identified region is shown in the bottom pane of FIG. 1. The graphene film during transfer was supported by a PMMA photoresist film, which was removed using suitable solvents following the transfer of the graphene layer onto the silicon substrate. It is clear from the region identified in the SEM images of FIG. 1 that such a transfer process yields a low-grade graphene film that exhibits cracks and is polluted with debris from the PMMA film remaining on the surface of the graphene film.

(6) Embodiments of the present invention seek to provide a two-dimensional crystal film such as a graphene film supported by a substrate that avoid the accumulation of debris on the surface of the two-dimensional crystal film and the formation of defects in such a two-dimensional crystal film that are the consequence of the transfer process of the two-dimensional crystal film onto the substrate.

(7) Embodiments of the present invention seek to provide a device comprising such a two-dimensional crystal film, wherein a portion of the two-dimensional crystal film is suspended over a cavity without being supported by additional films or layers. In the context of the present application, a two-dimensional crystal film having such a suspended portion will be referred to as a partially freestanding two-dimensional crystal film, as the suspended portion is freestanding in the sense that it is not supported by a substrate, a support layer or any other support structure.

(8) An example embodiment of a method of manufacturing a partially freestanding two-dimensional crystal film is shown in FIG. 2. The embodiment shown in FIG. 2 will be explained in the context of the formation of a graphene film on a silicon substrate. However, it should be understood that the general concept of the present invention may be applied to any two-dimensional crystal film that can be formed on a catalyst layer on any suitable carrier of a graphitization catalyst layer, e.g. metal carriers such as alumina carriers, polymer carriers, glass carriers and so on. Also, instead of a 2D-crystalline graphene film, a 2D-crystalline boron nitride, tungsten disulphide and molybdenum disulphide film may be formed instead. For the sake of brevity, it is simply noted that many suitable two-dimensional crystal films and substrates will be known to the skilled person, and that any of these suitable two-dimensional crystal films and substrates may be used.

(9) The method schematically depicted in FIG. 2 commences in step (a) with the provision of a silicon substrate 10 covered in an optional silicon oxide layer 12, a graphitization catalyst layer 14 on a first surface and a graphene film 16 formed on the graphitization catalyst layer 14. The silicon substrate 10 may have any suitable shape, e.g. an oblong or round shape, and any suitable dimension. For instance, the silicon substrate 10 may be a 4″ wafer, a 6″ wafer, an 8″ wafer and so on. As silicon has a tendency to slowly oxidize over time, the silicon substrate 10 may be covered in a silicon oxide layer 12, which may have chemical formula SiO.sub.x, in which 1<x≤2. The silicon oxide layer 12 may be formed through natural oxidation of the silicon substrate 10 or through treatment of the silicon substrate with an oxidizing agent, e.g. a thermal oxidation step using O.sub.2 or H.sub.2O as the oxidizing agent. Silicon oxidation is well-known per se and will not be explained in further detail for the sake of brevity.

(10) The graphitization catalyst layer 14 may be formed on the silicon substrate 10 in any suitable manner, e.g. through sputter coating, vapor deposition such as metal organic chemical vapor deposition. It is noted for the avoidance of doubt that where reference is made to the graphitization catalyst layer 14 being formed on the silicon substrate 10, it may be in physical contact with the silicon substrate 10 or with the silicon oxide layer 12.

(11) The graphene film 16 may be formed on the graphitization catalyst layer 14 in any suitable manner. For instance, the graphene film 16 may be formed by heat treating the silicon substrate 10 in the presence of a carbon source such as acetylene gas or another suitable carbon source. The thickness of the graphene film 16 may be controlled by the duration of the heating step, the temperature at which the graphitization takes place and the flow rate of the carbon source over the graphitization catalyst layer 14.

(12) Alternatively, the graphene film 16 may be formed by depositing, e.g. spin-coating, an organic polymer on the graphitization catalyst layer 14 and decomposing the polymer in an inert or reductive atmosphere at elevated temperatures, as for instance is disclosed in U.S. Pat. No. 8,075,864 B2. The thickness of the graphene film 16 formed in this manner may be controlled by controlling the thickness of the polymer layer deposited on the graphitization catalyst. Other methods will be apparent to the skilled person, and any of these methods may be used to form the graphene film 16.

(13) The thickness of the graphene film 16 may be tailored to meet the needs of the device to be formed by embodiments of the method of the present invention by varying the process conditions under which the graphene film is formed, as previously explained. For instance, for a non-transparent graphene film 16, e.g. for use as an optical layer, the graphene film 16 should have a thickness of at least 40 monolayers, and preferably a thickness in the range of 40-100 monolayers, equating to a thickness in the range of 20-50 nm. Alternatively, the graphene film may have a thickness of 1-10 monolayers, i.e. a thickness not exceeding 5 nm, preferably 1-5 monolayers and more preferably a single monolayer having a thickness of about 0.3-0.4 nm.

(14) The method subsequently proceeds to step (b), in which the graphene film 16 is protected by a protective layer 18. In step (b), the whole silicon substrate 10 is enveloped in the protective film 18 by way of non-limiting example. The protective layer 18 may be made of any material that can resist a series of etch recipes required to form a cavity in the silicon substrate 10, as will be explained in more detail later. The protective layer 18 preferably is a material that is readily available in silicon-based semiconductor process technology, such that minimal adjustment of existing processes is required to form this protective layer 18. In an embodiment, the protective layer 18 is a silicon nitride (SiN) layer such as a Si.sub.3N.sub.4 layer. It is known per se that silicon nitride is inert to a wide range of etch recipes, most notably a KOH-based recipe, as will be explained in further detail later. The silicon nitride protective layer 18 may be formed in any suitable manner, e.g. by CVD, PE-CVD or the like.

(15) In an optional step (c), a further protective layer 20 may be formed over the portion of the protective layer 18 covering the graphene layer 16. Such a further protective layer 20 may for instance provide additional protection to the graphene layer 16 in case the protective layer 18 contains microscopic defects such as pinholes. In particular, if silicon nitride is used as the protective layer 18, it may be advantageous to apply the further protective layer 20, as it is known per se that CVD-deposited silicon nitride layers can comprise pinhole defects. In an embodiment of the present invention, the protective layer 18 is a silicon nitride layer and the further protective layer 20 is a silicon oxide layer with chemical formula SiO.sub.x, in which 1<x≤2. Such a silicon oxide layer 20 may be formed on the silicon nitride layer 18 in any suitable manner, e.g. by CVD, PECVD or the like.

(16) At this point it is noted that the thickness of the protective layer 18 and the further protective layer 20 is not particularly critical, as long as the layers are thick enough to provide the necessary protection of the underlying 2-dimensional crystal film 16, e.g. a graphene layer 16. In an embodiment, the protective layer 18 and the further protective layer 20 each have a thickness of at least 5 nm to ensure that the graphene layer 16 is sufficiently protected in subsequent processing steps. The method subsequently proceeds to step (d), in which the back side of the silicon substrate 10 is opened to create an aperture 22. For the avoidance of doubt, the back side of the silicon substrate 10 is a second surface of the silicon substrate 10 that is opposite the first surface on which the graphitization catalyst layer 14 is formed. To this end, the protective layer 18 and the silicon oxide layer 12, if present, are removed by an etching step. For instance, in case of the protective layer 18 being a silicon nitride layer, the protective layer 18 may for instance be removed by a fluorine-based reactive ion etch or any suitable alternative etch recipe, whereas the silicon oxide may be removed by a HF-based etch recipe or any suitable alternative etch recipe. These etch recipes may of course be adjusted in case of protective layers having a different chemical composition. Obviously, these etching steps may be omitted in the absence of the relevant layers on the backside of the silicon substrate 10.

(17) Next, the a cavity 24 is etched in the silicon substrate 10 terminating on the silicon oxide layer 12 on the first surface of the silicon substrate 10 or on the graphitization catalyst layer 14 in the absence of the silicon oxide layer 12. This is shown in step (e). Although any suitable etch recipe may be used, a KOH-based etch recipe is particularly preferred. Due to the typical thickness of the silicon substrate 10, e.g. several hundreds of microns, this etching step may take up to 12 hours to complete. This prolonged exposure to a KOH-based etch recipe can expose the graphene film 16 to this KOH-based recipe if pinholes are present in the protective layer 18, which exposure can damage the graphene film 16. Such exposure and subsequent damage can be prevented by the further protective layer 20 over the protective layer 18, which further protective layer 20 acts as a sealing layer for the protective layer 18 as previously explained.

(18) In step (f), the exposed portions of the silicon oxide layer 12 inside the cavity 24 are removed using any suitable etch recipe, such as a HF-based etch recipe or any suitable alternative etch recipe. In an embodiment, the etch recipe is chosen such that the graphitization catalyst layer 14 is inert to the etch recipe, i.e. the etching step terminates on the graphitization catalyst layer 14. This etch recipe may at the same time be used to remove the further protective layer 20 in case the further protective layer 20 is a silicon oxide layer. Step (f) may be omitted in the absence of both the silicon oxide layer 12 on the first surface of the substrate and an silicon oxide further protective layer 20.

(19) In step (g), the exposed portions of the graphitization catalyst layer 14 are etched away from the cavity 24, terminating on the graphene film 16, after which the protective layer 18 is removed by etching in step (h). For instance, in case of the protective layer 18 being a silicon nitride layer, the protective layer 18 may be removed by a fluorine-based reactive ion etch or any suitable alternative etch recipe. It is noted that step (g) and (h) may be interchanged without departing from the scope of the present invention. In an alternative embodiment, the protective layer 18 may be of the same material as the graphitization catalyst layer 14, e.g. Ni, such that both layers can be simultaneously removed by a single etching step.

(20) The resultant structure is a device 1 in which a two-dimensional crystal film 16, e.g. a graphene film, has a freestanding portion 16′ over the cavity 24 formed as a through-hole in the substrate 10, e.g. a silicon substrate. The remainder of the substrate 10 forms a support structure 30 supporting the edge region of the two-dimensional crystal film 16, e.g. a graphene film. The support structure 30 typically comprises a substrate portion 10 and a portion of the graphitization catalyst layer 14 between the substrate portion 10 and the two-dimensional crystal film 16. In case of a silicon substrate 10, a silicon oxide portion 12 may be present in between the silicon substrate 10 and the graphitization catalyst layer 14 as previously explained.

(21) Such a device 1 benefits from a defect-free two-dimensional crystal film 16, such as a graphene film. It is noted that it already has been demonstrated in for instance U.S. Pat. No. 7,988,941 B2 and U.S. Pat. No. 8,075,864 B2 that such defect-free graphene films may be formed on a silicon substrate using various graphene-forming processes as disclosed above. It is further noted that the defect-free nature of the partially released dimensional crystal film 16 according to embodiments of the present invention can be readily verified using Raman spectroscopy, where the absence of a D-band in the Raman spectrum of the graphene is an indication of its defect-free nature, as for instance has been disclosed in U.S. Pat. No. 7,988,941 B2. The device 1 may be used as a gas barrier or a membrane element in any apparatus that benefits from such an element, e.g. a deep UV filter of a wafer stepper or in a DNA sequencing apparatus, an OLED device and so on without the need to transfer the two-dimensional crystal film 16 to a target substrate as the substrate 10 also provides the support structure 30 for the two-dimensional crystal film 16.

(22) Many variations to the embodiment of the method shown in FIG. 2 will be apparent to the skilled person. It should be clear that the present invention is not limited to the example materials mentioned in the detailed description of FIG. 2. Instead, it should be understood that the generic concept of the present invention is to form a two-dimensional crystal film on a catalyst layer on a substrate, wherein the two-dimensional crystal film is protected against exposure to the chemicals used in a series of processing steps to form a cavity in the substrate that ultimately exposes the two-dimensional crystal film. This merely requires the careful selection of suitable materials and suitable etch recipes having the required selectivity to only remove targeted selected materials, which falls within the routine skill set of the person skilled in the art.

(23) It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim. The word “a” or “an” preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several distinct elements. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.