WAFER LEVEL ULTRASONIC DEVICE AND MANUFACTURING METHOD THEREOF
20210170448 · 2021-06-10
Inventors
Cpc classification
H10N30/875
ELECTRICITY
H10N30/883
ELECTRICITY
H10N30/072
ELECTRICITY
H10N30/06
ELECTRICITY
International classification
B06B3/00
PERFORMING OPERATIONS; TRANSPORTING
B06B1/06
PERFORMING OPERATIONS; TRANSPORTING
Abstract
A wafer level ultrasonic device includes a composite layer, a first conductive layer, a second conductive layer, a base, a first electrical connection region, and a second electrical connection region. The composite layer includes an ultrasonic element and a protective layer. The ultrasonic element includes a first electrode and a second electrode. The protective layer has a first connecting channel and a second connecting channel respectively corresponding to the first electrode and the second electrode. The first conductive layer and the second conductive layer are respectively in the first connecting channel and the second connecting channel to connect the first electrode and the second electrode. The base includes an opening forming a closed cavity with the protective layer. The first electrical connection region and the second electrical connection region are respectively filled with metal materials to electrically connect the first conductive layer and the second conductive layer.
Claims
1. A wafer level ultrasonic device, comprising: a composite layer comprising an ultrasonic element and a protective layer, wherein the ultrasonic element comprises a first electrode and a second electrode, the first electrode is not connected to the second electrode, the protective layer covers the ultrasonic element and has a first connecting channel and a second connecting channel, one end of the first connecting channel corresponds the first electrode, and one end of the second connecting channel corresponds to the second electrode; a first conductive layer in the first connecting channel and electrically connected to the first electrode, wherein a part of the first conductive layer is exposed to the protective layer; a second conductive layer in the second connecting channel and electrically connected to the second electrode, wherein a part of the second conductive layer is exposed to the protective layer; a base connected to the protective layer, wherein the base comprises an opening, and the opening defines a closed cavity with the protective layer; a first electrical connection region, wherein the first electrical connection region is filled with a metal material to be electrically connected to the first conductive layer; and a second electrical connection region, wherein the second electrical connection region is filled with the metal material to be electrically connected to the second conductive layer.
2. The wafer level ultrasonic device according to claim 1, wherein the ultrasonic element comprises a first piezoelectric layer, the first electrode, a second piezoelectric layer, and the second electrode, the first electrode is on the first piezoelectric layer, the second piezoelectric layer is on the first electrode, the second electrode is on the second piezoelectric layer, and the second piezoelectric layer and the second electrode do not completely cover the first electrode.
3. The wafer level ultrasonic device according to claim 2, wherein the protective layer comprises a first protective layer and a second protective layer, the first protective layer covers the ultrasonic element and exposes a part of the first electrode and a part of the second electrode, the first conductive layer and the second conductive layer are on the first protective layer and are respectively connected to the first electrode and the second electrode, and the second protective layer covers the first conductive layer, the second conductive layer, and the first protective layer and the second protective layer exposes a part of the first conductive layer and a part of the second conductive layer.
4. The wafer level ultrasonic device according to claim 1, wherein the ultrasonic element comprises a first ultrasonic unit and a second ultrasonic unit, the first ultrasonic unit comprises a first piezoelectric layer and the first electrode, the first piezoelectric layer covers the first electrode, the first piezoelectric layer is provided with a contact hole to expose a part of the first electrode, the second ultrasonic unit does not overlap the first ultrasonic unit in a direction perpendicular to a substrate, the second ultrasonic unit comprises a second piezoelectric layer, a second circuit layer, and the second electrode, the second piezoelectric layer and the first piezoelectric layer are in a same layer and are separated from each other, the second circuit layer is covered in the second piezoelectric layer, the second circuit layer and the first electrode are in a same layer and are separated from each other, and the second electrode is on the second piezoelectric layer.
5. The wafer level ultrasonic device according to claim 4, wherein the protective layer comprises a first protective layer and a second protective layer, the first protective layer covers the first ultrasonic unit and the second ultrasonic unit, the first protective layer is provided with a first communicating hole and a second communicating hole, the first communicating hole is in communication with the contact hole, the second communicating hole exposes a part of the second electrode, the first conductive layer and the second conductive layer are on the first protective layer, the first conductive layer is filled into the contact hole and the first communicating hole and is connected to the first electrode, the second conductive layer is filled into a part of the second communicating hole and is connected to the second electrode, and the second protective layer covers the first conductive layer, the second conductive layer, the first protective layer, and the second electrode and exposes a part of the first conductive layer and a part of the second conductive layer.
6. The wafer level ultrasonic device according to claim 4, wherein the first piezoelectric layer comprises a first bottom piezoelectric layer and a first top piezoelectric layer, the first electrode is on the first bottom piezoelectric layer, and is covered by the first top piezoelectric layer, the first top piezoelectric layer comprises the contact hole to expose a part of the first electrode, the second piezoelectric layer comprises a second bottom piezoelectric layer and a second top piezoelectric layer, the second circuit layer is on the second bottom piezoelectric layer and is covered by the second top piezoelectric layer, and the second electrode is on the second top piezoelectric layer.
7. The wafer level ultrasonic device according to claim 2, wherein the first electrical connection region and the second electrical connection region are through holes penetrating the base.
8. The wafer level ultrasonic device according to claim 4, wherein the first electrical connection region and the second electrical connection region are through holes penetrating the base.
9. The wafer level ultrasonic device according to claim 7, further comprising two bonding pads, wherein the two bonding pads are on one side, away from the protective layer, of the base, and are respectively connected to the metal materials in the first electrical connection region and the second electrical connection region.
10. The wafer level ultrasonic device according to claim 2, wherein the first electrical connection region and the second electrical connection region are side edges at the base and the protective layer.
11. The wafer level ultrasonic device according to claim 4, wherein the first electrical connection region and the second electrical connection region are side edges at the base and the protective layer.
12. The wafer level ultrasonic device according to claim 1, wherein the base is made of glass.
13. A manufacturing method of a wafer level ultrasonic device, comprising: forming an ultrasonic element on a substrate, wherein the ultrasonic element comprises a first electrode and a second electrode that is not connected to the first electrode; forming a first protective layer on the ultrasonic element and the substrate, and forming a first through hole and a second through hole that expose a part of the first electrode and a part of the second electrode; forming a first conductive layer and a second conductive layer on the first protective layer, wherein a part of the first conductive layer is in the first through hole and is connected to the first electrode, and a part of the second conductive layer is in the second through hole and is connected to the second electrode; forming a second protective layer on the ultrasonic element, the first protective layer, the first conductive layer, and the second conductive layer; providing a base, and connecting the base and the second protective layer in a vacuum environment, wherein the base has an opening, and the opening forms a closed cavity with the protective layer; removing the substrate; forming a first electrical connection region and a second electrical connection region on the base, and forming a first groove and a second groove on the second protective layer, a first groove and a second groove, wherein the first groove and the second groove expose a part of the first conductive layer and a part of the second conductive layer respectively, and the first electrical connection region and the second electrical connection region are in communication with the first groove and the second groove respectively; and filling the first electrical connection region, the second electrical connection region, the first groove, and the second groove with a metal material, so that the metal material is connected to the first conductive layer and the second conductive layer.
14. The manufacturing method of a wafer level ultrasonic device according to claim 13, wherein the step of forming the ultrasonic element comprises: forming a first piezoelectric material layer, a first electrode material layer, a second piezoelectric material layer, and a second electrode material layer in sequence; and removing parts of the first piezoelectric material layer, the first electrode material layer, the second piezoelectric material layer, and the second electrode material layer, to form a first piezoelectric layer, the first electrode, a second piezoelectric layer, and the second electrode, wherein the second piezoelectric layer and the second electrode expose a part of the first electrode.
15. The manufacturing method of a wafer level ultrasonic device according to claim 13, wherein the step of forming the ultrasonic element comprises: forming a first piezoelectric material layer and a first electrode material layer on the substrate in sequence; removing parts of the first piezoelectric material layer and the first electrode material layer, to form a first bottom piezoelectric layer and a second bottom piezoelectric layer that are separated from each other, and a first electrode and a second circuit layer that are separated from each other; forming a second piezoelectric material layer and a second electrode material layer, wherein the second piezoelectric material layer covers the first bottom piezoelectric layer, the second bottom piezoelectric layer, the first electrode, and the second circuit layer; and removing parts of the second piezoelectric material layer and the second electrode material layer, to form the first top piezoelectric layer, the second top piezoelectric layer, and a second electrode that are separated from each other, wherein the first top piezoelectric layer covers the first bottom piezoelectric layer and the first electrode, the second top piezoelectric layer covers the second bottom piezoelectric layer and the second circuit layer, and the second electrode is on the second top piezoelectric layer, to form a first ultrasonic unit and a second ultrasonic unit.
16. The manufacturing method of a wafer level ultrasonic device according to claim 13, wherein the step of the forming the first electrical connection region and the second electrical connection region comprises penetrating the base to form two through holes as the first electrical connection region and the second electrical connection region, and removing a part of the protective layer to form the first groove and the second groove.
17. The manufacturing method of a wafer level ultrasonic device according to claim 16, further comprising: forming two bonding pads on one side, away from the protective layer, of the base, wherein the two bonding pads are respectively connected to the metal materials in the first electrical connection region and the second electrical connection region.
18. The manufacturing method of a wafer level ultrasonic device according to claim 13, wherein the step of the forming the first electrical connection region and the second electrical connection region comprises removing edges of the base and the protective layer to form the first electrical connection region and the second electrical connection region.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0024]
[0025]
[0026]
[0027]
[0028]
[0029]
[0030]
[0031]
DETAILED DESCRIPTION
[0032]
[0033] In more detail, in the first embodiment, the ultrasonic element 10 includes a first piezoelectric layer 111, the first electrode 121, a second piezoelectric layer 113, and the second electrode 123. The first electrode 121 is on the first piezoelectric layer 111. The second piezoelectric layer 113 is on the first electrode 121. The second electrode 123 is on the second piezoelectric layer 113. The second piezoelectric layer 113 and the second electrode 123 do not cover the first electrode 121 completely. Herein, “on” indicates a stacking relationship between elements, but does not indicate an absolute direction relationship.
[0034] The protective layer 20 includes a first protective layer 21 and a second protective layer 23. The first protective layer 21 covers the ultrasonic element 10, and exposes a part of the first electrode 121 and a part of the second electrode 123. The first conductive layer 31 and the second conductive layer 33 are on the first protective layer 21, and are connected to the first electrode 121 and the second electrode 123 respectively. The second protective layer 23 covers the first conductive layer 31, the second conductive layer 33, and the first protective layer 21, and exposes a part of the first conductive layer 31 and a part of the second conductive layer 33. In other words, the first connecting channel 211 and the second connecting channel 213 respectively provide, between the first protective layer 21 and the second protective layer 23, space for receiving the first conductive layer 31 and the second conductive layer 33 so as to be connected to the first electrode 121 and the second electrode 123 respectively.
[0035] In the first embodiment, the first electrical connection region 51 and the second electrical connection region 53 are through holes penetrating the base 40, and correspond to the first conductive layer 31 and the second conductive layer 33 respectively. The metal materials 61 and 63 are connected to the first conductive layer 31 and the second conductive layer 33 through the first electrical connection region 51 and the second electrical connection region 53. Herein, the first electrical connection region 51 and the second electrical connection region 53 in the figure are oblique, but are not limited thereto actually. In addition, the wafer level ultrasonic device 1 further includes two bonding pads 70. The bonding pads 70 are on one side, away from the protective layer 20, of the base 40 separately, and are respectively connected to the metal materials 61 and 63 in the first electrical connection region 51 and the second electrical connection region 53. The bonding pads 70 may have a relatively large size, to be connected to a circuit board (not shown in the figure).
[0036] Herein, the base 40 may be made of glass. However, this is only an example, and is not intended for limitation. Other materials, for example, silicon wafers and quartz, may also be used.
[0037]
[0038]
[0039] In more detail, in the third embodiment, similar to the first embodiment and the second embodiment, the protective layer 20 includes the first protective layer 21 and the second protective layer 23. The first protective layer 21 covers the first ultrasonic unit 10A and the second ultrasonic unit 10B. The first protective layer 21 is provided with a first communicating hole 573 and a second communicating hole 575, and the first communicating hole 573 is in communication with the contact hole 571. The second communicating hole 575 exposes a part of the second electrode 145. The first conductive layer 31 is filled into the contact hole 571 and the first communicating hole 573 and is connected to the first electrode 141. The second conductive layer 33 is filled into a part of the second communicating hole 575 and is connected to the second electrode 145. The second protective layer 23 covers the first conductive layer 31, the second conductive layer 33, the first protective layer 21, and the second electrode 145, and exposes a part of the first conductive layer 31 and a part of the second conductive layer 33, to be in electrical conduction with the metal materials 61 and 63 filled in the first electrical connection region 51 and the second electrical connection region 53 in the base 40.
[0040] Referring to
[0041]
[0042]
[0043] As shown in
[0044] Then, as shown in
[0045] As shown in
[0046] Subsequently, as shown in
[0047] As shown in
[0048] Finally, as shown in
[0049]
[0050]
[0051] As shown in
[0052] Subsequently, as shown in
[0053] As shown in
[0054]
[0055] Based on the foregoing, by using the closed cavity H between the base 40 and the protective layer 20 of the wafer level ultrasonic device, the speed of ultrasonic transmission through vacuum and a general medium changes obviously. Therefore, a transfer direction of a signal can be clearly distinguished. In addition to fingerprint recognition, functions such as gesture sensing may be further provided though a high resolution of the wafer level ultrasonic device. In addition, a manufacturing process is simple, and a manufacturing cost may be reduced greatly.
[0056] Although the present invention has been described in considerable detail with reference to certain preferred embodiments thereof, the disclosure is not for limiting the scope of the invention. Persons having ordinary skill in the art may make various modifications and changes without departing from the scope and spirit of the invention. Therefore, the scope of the appended claims should not be limited to the description of the preferred embodiments described above.