Apparatus and method for etching one side of a semiconductor substrate

10975490 · 2021-04-13

Assignee

Inventors

Cpc classification

International classification

Abstract

An apparatus for etching one side of a semiconductor layer, including at least one etching tank for receiving an electrolyte, a first electrode, which is arranged to make electrical contact with the electrolyte located in the etching tank during use, at least a second electrode, which is arranged to make indirect or direct electrical contact with the semiconductor layer, at least one electric current source, which is electrically conductively connected to the first and the second electrode to produce an etching current, and at least one transport apparatus for transporting the semiconductor layer relative to the etching tank in such a way that substantially only an etching side of the semiconductor layer that is to be etched can be wetted by the electrolyte located in the etching tank during use. The current source is formed as a variable current source, and that the apparatus has a controller for controlling the variable current source, wherein the apparatus is designed such that the etching current can be changed automatically by the controller during the etching operation. A method for etching one side of a semiconductor layer is also provided.

Claims

1. An apparatus for etching one side of a semiconductor layer, comprising: at least one etching tank (1) for receiving an electrolyte (3), a first electrode, which is arranged for making electrical contact with the electrolyte (3) situated in the etching tank (1) during use, at least one second electrode, which is arranged for making indirect or direct electrical contact with the semiconductor layer, at least one electric current source (9), which is electrically conductively connected to the first and second electrodes to generate an etching current, at least one transport apparatus that transports the semiconductor layer relative to the etching tank (1) in such a way that substantially only an etching side to be etched of the semiconductor layer is wettable by the electrolyte situated in the etching tank (1) during use, the current source (9) is configured as a variable current source (9), a controller (10) that controls the variable current source (9) such that the etching current is automatically changeable by the controller (10) during an etching process, and a sensor for detecting at least one of a surface area or material properties of the semiconductor layer, wherein the sensor for detecting the surface area is configured to cooperate with the controller (10) in order to control the etching current depending on the sensor data in order to achieve a constant etching current density, and wherein the sensor for detecting material properties is configured to cooperate with the controller (10) in order to control the etching current depending on the sensor data in order to achieve a constant etching rate.

2. The apparatus as claimed in claim 1, wherein the controller (10) is configured in such a way that the etching current is controllable by predefining at least one of a temporal profile, or a temporally modulated characteristic is a sinusoidally modulated characteristic.

3. The apparatus as claimed in claim 1, wherein the controller (10) is configured in such a way that the etching current is controllable depending on a control signal.

4. The apparatus as claimed in claim 1, further comprising a position sensor (11) for detecting at least one positioning of the semiconductor layer relative to the etching tank (1), and the position sensor (11) is configured to cooperate with the controller (10).

5. The apparatus as claimed in claim 4, wherein the position sensor (11) is arranged and configured in such a way as to detect a position of the semiconductor layer before the semiconductor layer is wetted with the electrolyte (3) situated in the etching chamber during use.

6. A method for etching one side of a semiconductor layer, the method comprising: using an etching current between an electrolyte (3) and the semiconductor layer, wetting the semiconductor layer substantially on one side by the electrolyte (3), automatically varying the etching current during the etching process, and varying the etching current depending on a measurement parameter of at least one of a surface area or material properties of the semiconductor layer from at least one sensor.

7. The method as claimed in claim 6, further comprising effecting a cyclic modulation of the etching current in terms of time, and the cyclic modulation is a sinusoidal modulation.

8. The method as claimed in claim 6, further comprising moving the semiconductor layer over an etching chamber containing with the electrolyte (3) in such a way that the semiconductor layer is wetted substantially on one side by the electrolyte (3), and at least one of increasing the etching current upon entrance of the semiconductor layer or decreasing the etching current upon exit of the semiconductor layer.

9. The method as claimed in claim 6, further comprising varying the etching current depending on the position of the semiconductor layer with respect to the electrolyte (3).

10. The method as claimed in claim 7, wherein the etching current is cyclically modulated, and at least one of the etching current rises on average over time upon entrance of the semiconductor layer or the etching current decreases on average over time upon exit of the semiconductor layer.

11. The method as claimed in claim 6, further comprising producing a porous semiconductor layer.

12. The method as claimed in claim 6, further comprising producing a carrier substrate for an epitaxial deposition of a semiconductor layer.

13. The method as claimed in claim 8, wherein upon exit the etching current decreases continuously proportionally to an area covered by the electrolyte (3).

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Further preferred features and embodiments are described below on the basis of exemplary embodiments and with reference to the figures, in which:

(2) FIG. 1 shows a first exemplary embodiment of an apparatus according to the invention comprising two contacting chambers;

(3) FIG. 2 shows a second exemplary embodiment of an apparatus according to the invention comprising three etching chambers;

(4) FIG. 3 shows a schematically illustrated temporal profile of the etching current for achieving a homogenous etching effect;

(5) FIG. 4 shows a schematically illustrated temporal profile of the etching current for achieving a laterally different etching effect;

(6) FIG. 5 shows a schematically illustrated temporal profile of a sinusoidally modulated etching current;

(7) FIG. 6 shows the result of a surface processing with the current profile illustrated in FIG. 5; and

(8) FIG. 7 shows a schematically illustrated temporal profile of a sinusoidally modulated etching current with an intervening current peak.

DETAILED DESCRIPTION

(9) All the figures show schematic illustrations that are not true to scale. Identical reference signs in the figures designate identical or identically acting elements.

(10) FIG. 1 illustrates a first exemplary embodiment of an apparatus according to the invention for etching one side of a semiconductor layer 2. The semiconductor layer 2 is configured as a silicon wafer having a thickness of 100 μm to 1500 μm in the present case 750 μm, and a doping of 1×10.sup.15 atoms/cm.sup.3 to 1×10.sup.20 atoms/cm.sup.3, in the present case 5×10.sup.18 atoms/cm.sup.3, doped with either boron or phosphorus, in the present case boron. A porous surface is intended to be produced on the bottom surface of the semiconductor layer 2, such that the semiconductor layer 2 can be used as a carrier substrate for the epitaxial growth of a silicon layer.

(11) The silicon layer produced in this way and subsequently detached from the semiconductor layer 2 serves for producing a semiconductor component, in particular for producing a photovoltaic solar cell.

(12) The apparatus comprises an etching tank 1 (anode), which is filled with an electrolyte 3, having the following composition: 30% to 80%, in the present case, 40%, H.sub.2O; 19% to 49%, in the present case, 40%, HF; remainder, in the present case 20%, surfactant (e.g. ethanol).

(13) A first electrode 4 is arranged in the etching tank 1 in order to make electrical contact with the electrolyte 3.

(14) The apparatus furthermore comprises a transport apparatus, transport rollers 6 of which are merely illustrated schematically for the sake of better clarity. By use of the transport rollers 6, which are rotated in the same sense and at the same speed by a motor drive (not illustrated), the semiconductor layer 2 is moved in a transport direction T, i.e. from left to right in the illustration in accordance with FIG. 1.

(15) Directly adjoining the etching tank 1 in the transport direction there is arranged a respective contacting tank (cathode) 7a (upstream of the etching tank in the transport direction) and 7b (downstream of the etching tank in the transport direction). The contacting tanks are each filled with contacting liquid 8a, 8b, which in the exemplary application is identical to the contacting liquid in the etching tank 1 (anode).

(16) A second electrode 5a (cathode 1) is arranged in the contacting tank 7a and a third electrode 5b (cathode 2) is arranged in the contacting tank 7b, in each case for making electrical contact with the contacting liquid (8a, 8b).

(17) The apparatus furthermore comprises a current source 9, which is electrically conductively connected at one end to the first electrode 4 (anode) and at the other end to the second electrode 5a (cathode 1) and the third electrode 5b (cathode 2). Accordingly, both cathodes are electrically conductively connected to one another.

(18) If the semiconductor layer 2 is then moved in the transport direction T by the transport apparatus, substantially only the bottom side of the semiconductor layer 2 is wetted by the contacting liquid 8a, 8b or respectively the electrolyte 3. Due to a voltage potential between the anode (electrode 4) and one of the cathodes (electrode 5a and electrode 5b), an etching current is thus generated via the electrolyte 3 and the contacting liquids.

(19) What is essential, then, is that the current supply is configured as a variable current source and a controller 10 is provided. The controller is configured to cooperate with the variable current source in order to automatically change the etching current during the etching process.

(20) A change in the etching current is thus predefinable by the controller 10, in particular by predefining a temporal profile and/or by predefining a change in the etching current depending on trigger signals such as sensor data, for example.

(21) As a result, susceptibilities to faults can be reduced, in particular as a result of an increase in the homogeneity of the etching process, and/or a wider field of application compared with previously known apparatuses can be opened up. This will be explained below with reference to FIGS. 3 to 6.

(22) FIG. 2 shows a second exemplary embodiment of an apparatus according to the invention. In order to avoid repetitions, only the essential differences with respect to the apparatus illustrated in FIG. 1 are discussed below:

(23) In the case of the apparatus in accordance with FIG. 2, the semiconductor layer 2 is directly contacted by a second electrode 5 (cathode). Said cathode (electrode 5) is thus positionally fixed at the semiconductor layer and travels concomitantly during the transport process in the transport direction T.

(24) The apparatus in accordance with FIG. 2 comprises an etching tank 1, which is filled with an electrolyte 3. The electrolyte 3 in the etching tank 1 is contacted via the electrode (anode) 4. The composition of said electrolyte is as follows: 30% to 80% H.sub.2O; 19% to 49% HF; remainder surfactant (e.g. ethanol).

(25) The variable current source 9 is thus electrically conductively connected at one end to the electrode (anodes) 4. At the other end the current source 9 is electrically conductively connected to the second electrode 5 (cathode).

(26) The apparatuses in accordance with FIG. 1 and FIG. 2 additionally comprise a position sensor 11 configured as a light barrier. By use of the position sensor 11 it is thus possible to detect when a front edge 2a of the semiconductor layer in the transport direction reaches the location of the position sensor 11. The position sensor 11 is connected to the controller 10 in order to transmit a trigger signal to the controller 10.

(27) In a first exemplary embodiment of a method according to the invention, by use of the apparatus in accordance with FIG. 1, an etching current is formed between the electrolyte 3 and the semiconductor layer 2 in order to etch one side of the semiconductor layer 2 at the side facing the electrolyte. In this case—as described above—the semiconductor layer is wetted substantially on one side by the electrolyte. What is essential is that the etching current is automatically varied by the controller 10 during the etching process.

(28) Further exemplary embodiments of a method according to the invention are explained below with reference to FIGS. 3 to 6:

(29) Investigations by the applicant have shown that in particular upon entrance of the semiconductor layer 2 into the etching tank 1 and upon exit from the etching tank 1, severe inhomogeneities occur in the etching process; in particular, a great rise in the etching current density was able to be ascertained in these regions.

(30) FIGS. 3 to 5 and 7 in each case show schematically illustrated temporal profiles of the etching current. Time t is always plotted on the X-axis, and the etching current I on the Y-axis.

(31) In a first exemplary embodiment of a method according to the invention, a temporal profile of the etching current I in accordance with FIG. 3 is therefore predefined.

(32) In this exemplary embodiment of the method according to the invention, at a point in time t=0, if the front edge 2a of the semiconductor layer 2 enters the etching tank 1, i.e. crosses the edge of the etching tank 1 and is thus wetted by the electrolyte 3 for the first time, the etching current rises continuously in a ramp-like manner until a point in time t=1. This point in time t=1 represents the situation in which the front edge 2a of the semiconductor layer 2 reaches the back edge 1b of the etching tank 1. At this point in time t=1, the semiconductor layer 2 thus completely covers the etching tank 1 at least in the transport direction T.

(33) As evident in FIG. 3, a plateau profile of the etching current then ensues, that is to say that the etching current is kept constant until a point in time t=2. The point in time t=2 is that point in time at which the back edge 2b of the semiconductor layer 2 reaches the front edge 1a of the etching tank 1. Starting from the point in time t=2, therefore, the etching tank (at least in the transport direction T) is no longer completely covered by the semiconductor layer 2. As evident in FIG. 3, starting from this point in time t=2, the etching current I decreases continuously in a ramp-like manner.

(34) In this way, it is possible to achieve a considerable improvement in the homogeneity of the etching effect in particular laterally in the transport direction, such that upon the further use of the semiconductor layer 2 previously occurring faults can be avoided or at least considerably reduced.

(35) By way of example, given a feed rate of 100 cm/min, an etching tank length of 5 cm and a length of the semiconductor layer composed of silicon of 15 cm upon entrance into the etching tank the current is increased linearly from 0 A to 10 A over 3 s, then kept constant for 3 s, and subsequently reduced from 10 A to 0 A for 3 s. This method produces an approximately 0.5 μm thick porous silicon layer of homogeneous thickness.

(36) FIG. 4 illustrates a second exemplary embodiment of a method according to the invention for deliberately producing laterally different etching effects:

(37) In this exemplary embodiment of the method according to the invention, at a point in time t=0, if the front edge 2a of the semiconductor layer 2 enters the etching tank 1, i.e. crosses the edge of the etching tank 1 and is thus wetted by the electrolyte 3 for the first time, the etching current rises continuously in a ramp-like manner until a point in time t=1. This point in time t=1 represents the situation in which the front edge 2a of the semiconductor layer 2 reaches the back edge 1b of the etching tank 1. At this point in time t=1, the semiconductor layer 2 thus completely covers the etching tank 1 at least in the transport direction T.

(38) As evident in FIG. 4, a plateau profile of the etching current then ensues, that is to say that the etching current is kept constant until a point in time t=2. Starting from the point in time t=2, the etching current is varied, reduced in this exemplary application, until the point in time t=3. The reduced etching current is kept constant until the point in time t=4 and then increased in a ramplike manner until it has reached the original level at the point in time t=5. This level is kept constant until the point in time t=6. The point in time t=6 is that point in time at which the back edge 2b of the semiconductor layer 2 reaches the front edge 1a of the etching tank 1. Starting from the point in time t=6, therefore, the etching tank (at least in the transport direction T) is no longer completely covered by the semiconductor layer 2. As evident in FIG. 4, starting from this point in time t=6, the etching current I decreases continuously in a ramp-like manner.

(39) A porous region that is more highly pronounced at the edge regions of the semiconductor layer can be produced in this way. This is advantageous in particular for the effect of the porous layer as a separating layer in order to separate a semiconductor layer applied epitaxially on the etched layer from the semiconductor layer 2, as described in WO 2013/004851 A1. Alternatively, a deliberate adhesion of the epitaxially produced semiconductor layer can also be achieved in the edge regions by reducing the current level between t=1 and t=2, and also between t=5 and t=6, below the level present between t=3 and t=4.

(40) FIG. 5 illustrates the variation of the etching current in a further exemplary embodiment of a method according to the invention:

(41) In this exemplary embodiment, the etching current progresses on average as illustrated in FIG. 3. In addition, however, the etching current is sinusoidally modulated, wherein the amplitude of the sinusoidal modulation is smaller than the plateau height between the points in time t=1 and t=2. In this method, too, a porous region is produced at the surface of the semiconductor layer. On account of the sinusoidal modulation, in this case, however, a layer system comprising layers having alternately higher and lower density that lie one above another is produced, as shown in FIG. 6:

(42) FIG. 6 shows a semiconductor layer 2, that has been treated by the method described above, for example in an apparatus in accordance with FIG. 1. The etching side lying at the bottom when the method is carried out, the porous layers being produced at said etching side, is illustrated at the top in FIG. 6. An enlarged excerpt is shown in the partial figure on the right. The white layers here represent layers having a low density, in the case of which more material was thus etched away by a higher etching current. The layers shown black have a higher density by comparison therewith, since less material was etched away on account of a lower etching current.

(43) As a result, significantly thinner plies having varying density can be obtained since significantly shorter etching times e.g. in the range <0.1 s are produced. With an unregulated etching current these times can be realized only by very high passage speeds. These speeds cannot be realized in practice.

(44) Such a layer, usable as an optical reflector, for example, is produced e.g. by a sinusoidal modulation of the etching current with a frequency preferably in the range of 0.01 Hz to 500 Hz, in the present case preferably 0.2 Hz, with respective thicknesses of the individual plies of approximately 100 nm. Layers produced with a higher frequency of e.g. 1 Hz-100 Hz are advantageously suitable e.g. as an electrode for silicon-lithium batteries, with respective thicknesses of the individual plies of from less than 1 nm to a few 10 nm.

(45) Continuously increasing the intensity of the modulated current oscillation produces a ply structure that is able gradually to dissipate mechanical stress produced by strain and to produce a low-stress surface ply as a result.

(46) Such current conduction, for example in a manner adapted in frequency such that thicknesses of individual plies in the range e.g. of optical wavelengths arise, produces structures having individual plies whose thickness continuously increases, so-called chirped Bragg reflectors, which exhibit particularly broadband reflection.

(47) By supplementing the current profile shown in FIG. 5 with one or more peaks as shown in FIG. 7, two or more individual plies are produced which inherently have in turn an individual-ply structure. These can advantageously be embodied such that they can be mechanically separated from one another, e.g. for use as electrodes for silicon-lithium batteries.