ELECTRIC DEVICE WITH TWO OR MORE CHIP COMPONENTS

20210082876 ยท 2021-03-18

    Inventors

    Cpc classification

    International classification

    Abstract

    An electric device comprises a substrate (SU) as a carrier and at least two chip components mounted thereto. In the top surface of the substrate a recess (RC) is formed. One or more chip component (BC) is mounted to the bottom surface of the recess referred to as buried chip component. One or more top chip component (TC) is mounted to the top surface of the substrate to cover at least to some extend the recess and the buried chip component. Device pads (PD) are arranged on the bottom surface of the substrate. Each of them is electrically interconnected with one or both of the chip components.

    Claims

    1. An electric device, comprising: a substrate (SU) a recess (RC) in the top surface of the substrate a buried chip component (BC) mounted to the bottom surface of the recess (RC) a top chip component (TC), mounted to the top surface of the substrate to cover at least to some extend the recess (RC) and the buried chip component (BC) device pads (PD) arranged on the bottom surface of the substrate and being electrically interconnected with one or both of the chip components (BC,TC).

    2. The electric device of claim 1, wherein the substrate (SU) is a PCB, a multi-layer wiring board made of ceramic or laminate, comprising a wiring layer electrically interconnected to the chip components (BC,TC) and the device pads (PD).

    3. The electric device of claim 1, comprising at least a second top chip component (TC2) arranged adjacent to the first top chip component (TC1) on the top surface of the substrate (SU), and/or at least a second buried chip component (BC2) arranged adjacent to the first buried chip component on the bottom surface of the recess.

    4. The electric device of claim 1, wherein a protection layer (PL) is applied to cover the upper surface of the one or more top chip components (TC) and the surrounding top surface of the substrate (SU), thereby sealing to the top surface with the recess and top and the buried chip components being arranged in a sealed cavity enclosed between protection layer and the substrate.

    5. The electric device of claim 1, comprising a mold applied over the protection layer.

    6. The electric device of claim 1, wherein the chip components are independently chosen from active or passive components, an IC, an acoustic wave component, a SAW device, a BAW device, a MEMS device and an RF filter device.

    7. The electric device of claim 1, wherein the protection layer comprises a lamination foil chosen from a plastic film or a coated plastic film.

    8. The electric device of one of claim 1, wherein the at least one top chip component is mounted to top contact pads arranged on the top surface near and along the edges of the recess wherein the at least one buried chip component is mounted to bottom contact pads arranged on the bottom surface of the recess wherein electrical interconnects of the top chip component to the top contact pads and of the buried chip component to the bottom contact pads are made by SMT interconnect, solder bumps, stud bumps, copper pillars or an electrically conductive adhesive.

    9. The electric device of claim 1, the height of the recess and the height of the second interconnects (IN.sub.T) are chosen to leave a gap between top surface of buried chip component (BC) and the bottom surface of the top chip component (TC) mounted above.

    Description

    [0021] In the following the invention is explained in more detail by reference to specified embodiments and the accompanying figures. The figures are schematic only and not drawn to scale. Hence, some details may be depicted in enlarged form for better understanding.

    [0022] FIG. 1 shows a device according to a first embodiment of the invention in a cross-sectional view.

    [0023] FIG. 2 shows the device of FIG. 1 device in a top view.

    [0024] FIG. 3 shows a second embodiment in a top view.

    [0025] FIG. 4 shows a third embodiment in a top view.

    [0026] FIG. 5 shows a block diagram of device realized as a duplexer.

    [0027] A cross-sectional view of a device according to a first embodiment of the invention is shown in a FIG. 1. In the top surface of a substrate SU formed from a multi-layer carrier material such as a laminate a recess RC is formed. On the plane bottom surface of the recess bottom contact pads are formed. On the top surface of the substrate SU near the edge of the recess RC top contact pads are formed. All contact pads are electrically connected to and/or interconnected by a wiring layer within the bulk body of the substrate SU (not shown for clarity reasons). On the exterior bottom surface of the substrate are pads for contacting the device to an external circuitry. Pads PD, wiring layer and contact pads are vertically interconnected by vias (not shown in the figure).

    [0028] A bottom chip component BC that is for example a SAW component such as a filter is mounted to the bottom contact pads by first interconnects IN.sub.B usually via a bump connection. The first interconnects IN.sub.B may be stud bumps or solder bumps. A top chip component TC that is for example a

    [0029] BAW filter is mounted to the top contact pads by second interconnects IN.sub.T which can be a solder bump connection IN.sub.T. The height h.sub.RC of the recess RC and the height the second interconnects IN.sub.T add to a value that is chosen to be larger than the height of the bottom chip component BC plus the first interconnects IN.sub.B. Thus, a gap remains between bottom chip component BC and the top chip component TC.

    [0030] A protection layer PL is laminated to the top surface of the top chip component TC and the adjacent free surface of the substrate SU where it makes a seal along the perimeter of the top chip component TC. The protection layer PL is a plastic foil applied in its B-stage and hardened after lamination.

    [0031] Over the entire top surface of the protection layer PL a mold MO is applied. The mold provides a plane top surface and further mechanically and/or hermetically protects the device.

    [0032] FIG. 2 is a top view onto the device of FIG. 1. The substrate SU and the recess RC therein is depicted by a stronger line. The top chip component TC totally covers the recess plus a margin of the substrate around the recess RC. First interconnects IN.sub.T are located in the margin area to interconnect top chip component TC to the top contact pads. The bottom chip component BC fits into the recess RC with at least a small tolerance and contacts to the bottom contact pads via first interconnects IN.sub.B. Laminate (protection layer PL) and mold MO comply in area with the substrate.

    [0033] FIG. 3 is a top view onto a device according to a second embodiment. Here, one bottom chip component BC is arranged and mounted within the recess RC. Two top chip components TC1, TC2 are arranged and mounted adjacent to each other to commonly cover the whole area of the recess plus a margin of the top surface of the substrate SU. Each of the two top chip components TC1, TC2 bridges the recess RC. The two top chip components TC1,TC2 may have the same or a different size.

    [0034] FIG. 4 is a top view onto a device according to a third embodiment. Here, two bottom chip components BC1, BC2 are arranged and mounted adjacent to each other within the recess RC. The two bottom chip components BC1,BC2 may have the same or a different size but are smaller than in the first embodiment. The top chip component TC can have the same size like in the first embodiment shown in FIGS. 1 and 2 to cover the whole area of the recess plus a margin of the top surface of the substrate SU.

    [0035] It is advantageous to couple bottom and top chip component BC, TC to desired device. In the mentioned example this may be a filter device comprising a first filter embodied by the bottom chip component BC that is a SAW component and a second filter embodied by the top chip component TC that is a BAW component. Both filters have distinct pass bands assigned to a TX band for the BAW filter and assigned to an RX band for the BAW filter (top chip component). Together the device with the two chip components can form a duplexer.

    [0036] FIG. 5 shows a block diagram of a duplexer that is realized from a bottom chip component BC and a top chip component TC in a device according to the invention. The top chip component may be a band pass filter made in BAW technology functioning as a TX filter of the duplexer. The bottom chip component BC may be a band pass filter made in SAW technology functioning as an RX filter of the duplexer. However the assignment of bottom or top chip component to a filter technology or to TX and RX does can be done arbitrarily and independently according to specific requirements. Both filters are connected to an antenna terminal A and circuited to enable a duplexer function. This provides extra benefits when Tx and Rx are using different wafer material, and the characteristics of different materials gives advantages of the filter performance.

    [0037] However, any possible combination of different chip components can be used for the proposed device. One chip component for example may be an active component like a LNA or a power amplifier and the other chip component may be a SAW filter. Then the proposed device can deliver a processed and amplified filtered signal.

    [0038] It is also possible to have a MEMS switch as bottom chip component with a Nin1 SAW filter as top chip, which allows to select different bands of the Nin1 SAW filter with the control of the MEMS.

    LIST OF USED REFERENCE SYMBOLS

    [0039] BC buried chip component (active or passive components, IC like ASIC, MEMS, LNA, acoustic wave component, SAW or BAW component, filter) [0040] ED electric device, in a package [0041] h.sub.RC height of recess RC [0042] IN.sub.B first interconnects to BC: solder bump, stud bump, pillar bump, SMT, conductive adhesive [0043] IN.sub.T second interconnects to TC [0044] MO mold, encapsulation material [0045] PD device pad to external circuit [0046] PL protection layer (lamination foil, metal, glass, compound layer) [0047] RC recess [0048] SU substrate (PCB, ceramic, HTCC, LTCC, FR4/PPG, laminate, . . . ) [0049] TC top chip component (active or passive component, IC like ASIC, MEMS, LNA, acoustic wave component, SAW or BAW component, filter)