Microfluidic chips for particle purification and fractionation

Abstract

Microfluid chips that comprise one or more microscale and/or mesoscale condenser arrays, which can facilitate particle purification and/or fractionation, are described herein. In one embodiment, an apparatus can comprise a layer of a microfluidic chip. The layer can comprise an inlet that can receive fluid, an outlet that can output a purified version of the fluid, and a condenser array coupled between and in fluid communication with the inlet and the outlet. The condenser array can comprise a plurality of pillars arranged in a plurality of columns. Also, a pillar gap sized to facilitate a throughput rate of the fluid of greater than or equal to about 1.0 nanoliter per hour can be located between a first pillar of the plurality of pillars in a first column of the plurality of columns and a second pillar of the plurality of pillars in the first column.

Claims

1. An apparatus, comprising: a layer of a microfluidic chip, the layer comprising a condenser array in fluid communication with an inlet and a plurality of outlets, the condenser array coupled between the inlet and the plurality of outlets, wherein the condenser array comprises a lattice structure and a collection channel, wherein the lattice structure is in fluid communication with a first outlet of the plurality of outlets and is defined a plurality of pillars arranged in a plurality of columns, wherein a pillar gap sized to facilitate a throughput rate of a fluid of greater than or equal to about 1.0 nanoliter per hour is located between a first pillar of the plurality of pillars in a first column of the plurality of columns and a second pillar of the plurality of pillars in the first column, wherein the collection channel is in fluid communication with a second outlet of the plurality of outlets.

2. The apparatus of claim 1, wherein the microfluidic chip is a lab-on-chip designed to purify a biological sample fluid.

3. The apparatus of claim 1, wherein the apparatus comprises at least one of a handheld device or a purification system.

4. The apparatus of claim 1, wherein the layer of the microfluidic chip further comprises a nanoscale deterministic lateral displacement array, wherein the nanoscale deterministic lateral displacement array is coupled to the condenser array, wherein the nanoscale deterministic lateral displacement array separates particles of the fluid purified in the condenser array.

5. The apparatus of claim 1, wherein the apparatus further comprises a first reservoir coupled to and in fluid communication with the inlet and a second reservoir coupled to and in fluid communication with the second outlet, wherein the first reservoir receives the fluid that is purified by the condenser array and wherein the second reservoir receives a purified version of the fluid that is output from the collection channel.

6. The apparatus of claim 1, wherein the lattice structure is defined by a pair of pillars of the first column and a pair of pillar of the second column.

7. The apparatus of claim 6, wherein the layer comprises a second inlet that is in fluid communication with the collection channel, wherein the collection channel is in fluid communication with an outlet bus, and wherein the outlet bus is in fluid communication with the second outlet.

8. The apparatus of claim 6, wherein a first ratio of the lattice is greater than or equal to 0.1 and less than or equal to 1, the first ratio characterized by D.sub.x/D.sub.y, wherein D.sub.x is a length of the lattice structure in a flow direction of the condenser array, and wherein D.sub.y is a width of the lattice structure in a direction orthogonal to the flow direction.

9. The apparatus of claim 8, wherein the condenser array is characterized by a geometry ratio of D.sub.0/D.sub.y, wherein D.sub.0 is a diameter of the plurality of pillars that define the lattice structure, and wherein the geometry ratio is greater than or equal to 0.1 and less than or equal to 1.

10. An apparatus comprising: a layer of a microfluidic chip, the layer comprising an inlet, a plurality of outlets, and a condenser array in fluid communication with the inlet and the outlet, wherein the condenser array has a throughput rate greater than about 1.0 nanoliters per hour, the condenser array comprising a lattice structure and a collection channel, the lattice structure defined by a plurality of pillars and in fluid communication with a first outlet of the plurality of outlets, and the collection channel in fluid communication with a second outlet of the plurality of outlets.

11. The apparatus of claim 10, wherein the plurality of pillars are arranged in a plurality of columns, wherein a pillar gap greater than or equal to about 0.5 micrometers is located between a first pillar of the plurality of pillars in a first column of the plurality of columns and a second pillar of the plurality of pillars in the first column, and wherein the first pillar is adjacent to the second pillar.

12. The apparatus of claim 11, wherein a first ratio of the lattice structure is characterized by D.sub.x/D.sub.y and is greater than or equal to 0.1 and less than or equal to 1, wherein D.sub.x is a length of the lattice structure in a flow direction of the condenser array, wherein D.sub.y is a width of the lattice structure in a direction orthogonal to the flow direction, wherein the condenser array is characterized by a geometry ratio of D.sub.0/D.sub.y that is greater than or equal to 0.1 and less than or equal to 1, and wherein D.sub.0 represents a diameter of the plurality of pillars that define the lattice structure.

13. The apparatus of claim 12, wherein the first ratio is about 1.0, and wherein the geometry ratio is about 0.5.

14. The apparatus of claim 10, wherein the layer further comprises a nanoscale deterministic lateral displacement array.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 illustrates a diagram of an example, non-limiting microscale condenser array that can comprise a microfluidic chip in accordance with one or more embodiments described herein.

(2) FIG. 2 illustrates a diagram of an example, non-limiting microfluidic chip in accordance with one or more embodiments described herein.

(3) FIG. 3 illustrates a diagram of an example, non-limiting lattice structure for a microscale condenser array that can comprise a microfluidic chip in accordance with one or more embodiments described herein.

(4) FIG. 4 illustrates another diagram of an example, non-limiting lattice structure for a microscale condenser array that can comprise a microfluidic chip in accordance with one or more embodiments described herein.

(5) FIG. 5 illustrates another diagram of an example, non-limiting lattice structure for a microscale condenser array that can comprise a microfluidic chip in accordance with one or more embodiments described herein.

(6) FIG. 6 illustrates another diagram of an example, non-limiting microfluidic chip in accordance with one or more embodiments described herein.

(7) FIG. 7 illustrates a diagram of an example, non-limiting flow path that can be facilitated by a microfluidic chip in accordance with one or more embodiments described herein.

(8) FIG. 8 illustrates another diagram of an example, non-limiting flow path that can be facilitated by a microfluidic chip in accordance with one or more embodiments described herein.

(9) FIG. 9 illustrates a diagram of an example, non-limiting manifold interface that can comprise a microfluidic chip in accordance with one or more embodiments described herein.

(10) FIG. 10 illustrates a flow diagram of an example, non-limiting method that can comprise purifying and/or fractionalizing one or more particles via a microfluidic chip in accordance with one or more embodiments described herein.

DETAILED DESCRIPTION

(11) The following detailed description is merely illustrative and is not intended to limit embodiments and/or application or uses of embodiments. Furthermore, there is no intention to be bound by any expressed or implied information presented in the preceding Background or Summary sections, or in the Detailed Description section.

(12) One or more embodiments are now described with reference to the drawings, wherein like referenced numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a more thorough understanding of the one or more embodiments. It is evident, however, in various cases, that the one or more embodiments can be practiced without these specific details.

(13) FIG. 1 illustrates a diagram of an example, non-limiting condenser array 100 in accordance with one or more embodiments described herein. The condenser array 100 can be located within a microchannel 103 and can comprise a plurality of pillars 102. The condenser array 100 can operate on a principle of hydrodynamic chaos facilitated by one or more lattice structures 104 defined by the plurality of pillars 102. The condenser array 100 can be a microscale condenser array and/or a mesoscale condenser array. For example, the condenser array 100 can have one or more geometries on the microscale and/or the mesoscale. As used herein, the term microscale can refer to one or more devices, apparatuses, and/or features having one or more characteristic dimensions greater than or equal to 1 micrometer and less than or equal to 999 micrometers. As used herein, the term mesoscale can refer to one or more devices, apparatuses, and/or features having one or more characteristic dimensions greater than or equal to 0.1 millimeters and less than or equal to 100 millimeters.

(14) A fluid can flow through the microchannel 103, and thereby the condenser array 100, in a direction indicated by the arrow F in FIG. 1. When a fluid flow F is directed through the condenser array 100, the plurality of pillars 102 can act to deflect the fluid itself, causing a minor lateral component to the fluid flow which does not average out over the length of the microchannel 103. A net lateral displacement of the fluid can laterally move one or more particles (e.g., colloids) comprising the fluid, and thereby can affect a spatial displacement or condensation within the condenser array 100. The condenser array 100 can concentrate one or more particles (e.g., colloids) into a concentrated stream. Further, the concentrated stream can comprise one or more particles (e.g., colloids) of a particular size and/or one or more particles (e.g., colloids) of various sizes.

(15) Condensing one or more particles (e.g., colloids) of the fluid into a concentrated stream can be useful for concentrating a sample and/or preparing a sample for further separation into streams based on size/chemistry for purification. Since the condenser array 100 can manipulate the fluid flow itself, particles (e.g., colloids) within the fluid, regardless of size, can experience the same lateral displacement. The condensing (e.g., the lateral fluid displacement) that can be achieved by the condenser array 100 can depend on the geometry of the one or more lattice structures 104 and/or the plurality of pillars 102. Previous art has specified the geometry only on the nanoscale (e.g., less than 500 nanometers (nm) for all dimensions). In one or more embodiments described herein, the condenser array 100 can comprise a microscale structure that can still manipulate nano-size particles (e.g., colloids).

(16) As shown in FIG. 1, the plurality of pillars 102 can be arranged in a plurality of columns (e.g., column 105 traversing the microchannel 103 along the y axis) and/or a plurality of rows (e.g., column 107 traversing the microchannel 103 along the x axis). Additionally, adjacent columns (e.g., adjacent columns 105, 109) comprising the plurality of pillars 102 can be arranged offset each other (e.g., along the y axis), thereby positioning the plurality of rows at an angle to one or more walls 106 of the microchannel. FIG. 1 shows an expanded view of an exemplary lattice structure 104 defined by four pillars (e.g., pillar 102 can be an example of one of the four pillars).

(17) The lattice structure 104 can be defined by four pillars of the plurality of pillars (e.g., where one or more pillars can be as shown at pillar 102). The lattice structure 104 can be located throughout the condenser array 100 and/or at portion of the condenser array 100. Further, the four pillars 102 can be adjacent to each other. For example, two adjacent pillars 102 of a column 105 and two adjacent pillars of a row 107 can define a lattice structure 104, wherein the column 105 and the row 107 can be adjacent to each other. FIG. 1 shows an example of four exemplary pillars, which can define a lattice structure 104, with dashed lines. Further, as shown in FIG. 1, dashed lines delineate an expanded view of an exemplary lattice structure 104 defined by the four exemplary pillars 102. One of ordinary skill in the art will recognize, that the condenser array 100 can comprise one or more lattice structures 104 in one or more locations within the microchannel 100 other than the location of the exemplary, expanded lattice structure 104 shown in FIG. 1.

(18) As shown in FIG. 1 E can represent a lateral shift between centers 108 of pillars 102 of sequential columns. The lateral shift (e.g., represented by E) between sequential columns of pillars 102 can be characterized by formula 1: D.sub.y/N. The lateral shift (e.g., represented by E) of the condenser array 100 can be greater than or equal 0.01 and/or less than or equal to 0.3.

(19) As shown in FIG. 1, D.sub.y can represent a first distance across the lattice structure 104 along the y axis of the condenser array 100. D.sub.y can extend from a first boundary 110 of the lattice structure 104 to a second boundary 112 of the lattice structure104. Further, the first boundary 110 can be defined by a first center line of a first row of pillars 102, and the second boundary 112 can be defined by a second center line of a second row of pillars 102; wherein the first row of pillars 102 and the second row of pillars 102 can be adjacent to each other in some embodiments. In some embodiments, D.sub.y can be greater than or equal to 1 m and/or less than or equal to 100 m.

(20) As shown in FIG. 1, N can represent a number of sequential columns necessary to overcome the lateral shift and place two columns in alignment. For example, for the condenser array 100 shown in FIG. 1, N can equal 10 as indicated by the dashed triangle 114, which exemplifies the lateral shift.

(21) Further, as shown in FIG. 1, D.sub.x can represent a second distance across the lattice structure 104 along the x axis of the condenser array 100. D.sub.x can extend from a third boundary 116 of the lattice structure 104 to a fourth boundary 118 of the lattice structure 104. Further, the third boundary 116 can be defined by a third center line of a first column of pillars 102, and the fourth boundary 118 can be defined by a fourth center line of a second column of pillars 102; wherein the first column of pillars 102 and the second column of pillars 102 can be adjacent to each other. Additionally, D.sub.y can be measured along a first direction (e.g., along the y axis of the condenser array 100) that is orthogonal to a second direction (e.g., along the x axis of the condenser array 100), along which the D.sub.x can be measured. In some embodiments, D.sub.x can be greater than or equal to 1 m and less than or equal to 100 m.

(22) Moreover, as shown in FIG. 1 D.sub.0 can represent a diameter of the plurality of pillars 102 defining a subject lattice structure 104. The D.sub.0 of the pillars 102 can be greater than or equal to 0.5 m and/or less than or equal to 99.5 m. Further, the plurality of pillars 102 can have a height greater than or equal to 1 m and/or less than or equal to 100 m. As shown in FIG. 1, G can represent a pillar gap between adjacent pillars 102 of the same column. The condenser array 100 can have a G of greater than or equal to 0.5 micrometers (m) and/or less than or equal to 100 m. Further, as shown in FIG. 1, can represent an angle respective of a wall 106 of the microchannel 103. The can be greater than 0 degrees and less than 90 degrees.

(23) A lattice ratio of the lattice structure 104 can be characterized by formula 2: D.sub.x/D.sub.y. The lattice ratio can be greater than 0.1 and/or less than or equal to 1.0 to facilitate operation of the condenser array 100. Additionally, a geometry ratio of the condenser array 100 can be characterized by formula 3: D.sub.0/D.sub.y. The geometry ratio can be greater than 0.1 and less than or equal to 1.0 to facilitate operation of the condenser array 100. Additionally, the condenser array 100 can comprise greater than or equal 100 columns of pillars 102 to facilitate operation. For example, the condenser array 100 can have an overall length (e.g., along the x axis) greater than or equal to 0.1 millimeters (mm) and less than or equal to 10 mm. An embodiment of the condenser array 100 comprising one or more of the geometries described herein can facilitate a microscale and/or mesoscale condenser array 100 structures and/or facilitate high throughput rates.

(24) In various embodiments, the plurality of pillars 102 can have a variety of shapes that can facilitate the geometric dimensions (e.g., regarding the condenser array 100 and/or the lattice structure 104) described herein. Example, pillar 102 shapes can include, but are not limited to: a circular shape, a triangular shape, a square shape, a U shape, a napiform shape, a pentagonal shape (e.g., an irregular pentagon), and/or the like. In one or more embodiments, the condenser array 100 can a plurality of lattice structures 104, wherein respective lattice structures 104 can have varying geometries depending on the subject lattice structure's 104 location along the condenser array 100.

(25) Embodiments in which the one or more condenser arrays 100 comprise the geometries described herein can have microscale and/or mesoscale pillar 102 gaps (e.g., represented by G), which can be more conductive to fluid flow than conventional nanoscale pillar 102 gaps. Additionally, the microscale and/or mesoscale pillar 102 gaps can facilitate larger pillar 102 than conventional arrays, which can be formed using reactive-ion etching during fabrication thereby getting a further linear enhancement in throughput.

(26) FIG. 2 illustrates a diagram of an example, non-limiting layer 200 of a microfluidic chip in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity. The microfluidic chip can be a lab-on-chip designed to purify and/or fractionize a sample fluid (e.g., a biological sample fluid). Additionally, the microfluidic chip can be a part of a handheld apparatus and/or a purification system (e.g., including an automated system). For example, the handheld apparatus and/or purification system can comprise one or more pressure devices to facilitate flowing a fluid (e.g., a sample fluid and/or a buffer fluid) from one or more first reservoirs (e.g., inlet basins), through one or more condenser arrays 100, and into one or more second reservoirs (e.g., outlet basins).

(27) The layer 200 can comprise a plurality of inlets and/or outlets in fluid communication with one or more condenser arrays 100 to facilitate purification and/or fractionation of one or more fluids. In one or more embodiments, a microfluidic chip can comprise a plurality of layers 200 (e.g., wherein respective layers 200 can be located adjacent, horizontally and/or vertically, to each other or other chip layers). One or more fluids can flow through layer 200 at a steady state, which can be affected by an external driving force that can include, but is not limited to: electro-osmotic flow, pressure driven flow, capillary flow, a combination thereof, and/or the like.

(28) A challenge with and stronger constraint of nanoDLD as it applies to sample preparation is that the resulting small arrays and features have high fluidic resistance and thus lower throughput for a given array (e.g., about 0.2 L/hr) making single arrays impractical for higher volume exosome sample preparations of 1-10 mL. However, integrated condenser arrays 100 on single and/or multi-layer substrates can provide a means of scaling up sample volume to several mL per hour throughput rates.

(29) As shown in FIG. 2, one or more condenser arrays 100 can be in fluid communication with one or more sample inlets 202. A sample fluid can enter the one or more condenser arrays 100 via the one or more sample inlets 202. The layer 200 can further comprise a buffer inlet 204 in fluid communication with one or more inlet buses 206, which can also be in fluid communication with the one or more condenser arrays 100. The buffer inlet 204 can also be in fluid communication with a buffer reservoir located on or off the microfluidic chip. A buffer can flow from the buffer reservoir to the one or more inlet buses 206 via the buffet inlet 204. The buffer can further flow through the one or more inlet buses 206 and enter the one or more condenser arrays 100. The buffer can serve as a purification medium, which can facilitate particle (e.g., exosome) exchange within the condenser array 100.

(30) The one or more condenser arrays 100 comprising the layer 200 of the microfluidic chip can comprise a plurality of lattice structures 104 configured to displace fluid towards one or more collection channels 208 (e.g., comprising a portion of the one or more condenser arrays 100). The buffer can flow from the one or more inlet buses 206 into the one or more collection channels 208. Further, one or more particles (e.g., exosomes) comprising the sample fluid can be laterally displaced into the one or more collection channels 208. For example, FIG. 2 shows an expanded view of a configuration of lattice structures 104 that can displace particles into the one or more collection channels 208. Thus, the one or more condenser arrays 100 can concentrate and/or redirect particle (e.g., exosome) populations down to a particle size into a buffer stream, thereby purifying the subject particles (e.g., exosomes) from the sample fluid.

(31) The one or more condenser arrays 100 can further be in fluid communication with one or more waste outlets 210 and/or one or more outlet buses 212. Additionally, the one or more outlet buses 212 can be in fluid communication with one or more particle outlets 214. The concentrated stream of buffer and displaced particles (e.g., exosomes) can flow through the one or more collection channels 208 and into the one or more outlet buses 212. The stream of buffer and particles (e.g., exosomes) can further flow through the one or more outlet buses 212 and into a particle reservoir via the one or more particle outlets 214. The sample fluid which is not displaced into the one or more collection channels 208 (e.g., waste comprising the sample fluid) can flow from the one or more condenser arrays 100 into one or more waste outlets 210. Unwanted salts, small molecules, proteins, and/or the like can exhibit unaltered trajectories through the one or more condenser arrays 100 due to sufficiently small particle size, and thereby enter one or more waste outlets 210.

(32) In one or more embodiments, because condensers arrays 100 can be most efficient at separating for a given pillar gap size G when the row-shift fraction value is small, the length of a condenser array 100 can be 20 times (20) or greater in distance compared to the width of the condenser array 100. Hence, the narrow and long dimensions of a single condenser array 100 can lend the device more practically to a multiplexed arrangement of condenser arrays 100, where the microfluidic chip surface can be more efficiently utilized to enhance throughput linearly with the number of condenser arrays 100 added. Inlets (e.g., buffer inlet 204 and/or sample inlets 202) and outlets (e.g., particle outlet 214 and/or waste outlets 210) can extend through the microfluidic chip using for example through silicon vias (TSVs) with a glass bonded ceiling and/or from the top of the chip through aligned, structured glass holes in the bonded glass. These vias and devices can also be fabricated in molded plastics, such as cyclo-olefin polymer (COP), that are compatible with biological samples.

(33) Referring again to FIG. 2, here a biological sample (e.g., a sample fluid), such as urine, blood, plasma, etc. can be inputted through top vias (e.g., sample inlets 202) and introduced into an optional on-chip filtration element. This may include cross-flow serpentine filters, traps, sieves, or a number of other microfluidic filter arrangements to capture cells and larger MVBs and/or EVs while letting exosomes pass into the downstream condenser devices. Alternatively, pre-filtration can be performed off-chip or a combination of the two (e.g. filter cells off-chip, filter larger MVBs and/or EVs on-chip). Sample fluids can be introduced as fully concentrated (or as-received) from a patient or first diluted by an operator. A wash buffer can be introduced from a common inlet (e.g., inlet bus 206) that can feed the condenser array 100. The condenser array 100 can deflects particles (e.g., EVs) down to a specified cutoff between 30-100 nm, as defined by the condenser dimensions and geometry, toward one or more collection channels 208. Deflected EVs can be displaced into a buffer where they are purified and smaller contaminants (e.g., small molecules, lipids, proteins, and/or the like) can move with the flow and into the one or more waste outlets 210.

(34) Purified particles (e.g., exosomes) can exit from the condenser array 100 and empty into a common outlet (e.g., a particle reservoir) where they can be collected by an operator of the microfluidic chip. The process can be partially or fully automated by mounting microfluidic chips in flow cells and prewetting, and/or by incorporating the technology into a disposable plastic format and driving fluid flow with a pressure manifold. The plurality of pillars 102 are shown as triangular posts in FIG. 2 given their demonstrated efficiency in deflection compared to circular posts.

(35) FIG. 3 illustrates a diagram of an example, non-limiting first arrangement 300 of pillars 102 (e.g., plurality of lattice structures 104) that can comprise one or more condenser arrays 100 in layer 200 in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity. The first arrangement 300 depicted in FIG. 3 can be located between the one or more collection channels 208. Further, the pillar 102 arrangement depicted in FIG. 3 can facilitate displacement of one or more particles (e.g., exosomes) to a plurality of collection channels 208 (e.g., displacement towards a first collection channel 208 can be located to the left of the first arrangement, and/or displace towards a second collection channel 208 that can be located to the right of the first arrangement 300). One of ordinary skill in the art will recognize: that FIG. 3 shows a portion of the first arrangement 300, that the dimensions (e.g., number of pillars 102) is not limited to those depicted in FIG. 3, and/or the first arrangement 300 can traverse the length of one or more adjacent collection channels 208.

(36) FIG. 4 illustrates another diagram of another example, non-limiting second arrangement 400 of pillars 102 (e.g., plurality of lattice structures 104) that can comprise one or more condenser arrays 100 in layer 200 in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity. The second arrangement 400 depicted in FIG. 4 can also be located between the one or more collection channels 208. Further, the second arrangement 400 can also facilitate displacement of one or more particles (e.g., exosomes) to a plurality of collection channels 208 (e.g., displacement towards a first collection channel 208 can be located to the left of the second arrangement 400, and/or displace towards a second collection channel 208 that can be located to the right of the second arrangement 400). One of ordinary skill in the art will recognize: that FIG. 4 shows a portion of the second arrangement 400, that the dimensions (e.g., number of pillars 102) is not limited to those depicted in FIG. 4, and/or the second arrangement 400 can traverse the length of one or more adjacent collection channels 208.

(37) As shown in FIGS. 3 and 4, the second arrangement 400 can comprise a partition wall 402, whereas the first arrangement 300 can be absent such a wall. Both the first arrangement 300 and/or the second arrangement 400 can serve to direct a sample fluid inputted into the one or more condenser arrays 100 towards one or more collection channels 208 (e.g., located adjacent to the first arrangement 300 and/or second arrangement 400). Further, the one or more condenser arrays 100 can comprise: one or more first arrangements 300, one or more second arrangements 400, and/or one or more first arrangements 300 and second arrangements 400. Further, in one or more embodiments the first arrangement 300 and/or the second arrangement 400 can serve to operably couple adjacent condenser arrays 100. Various embodiments comprising the first arrangement 300 and/or the second arrangement 400 can advantageously comprise one or more condenser arrays 100 that can share a common buffer and particle (e.g., exosome) stream; thereby minimizing layout complexity on the layer 200.

(38) FIG. 5 illustrates a diagram of an example, non-limiting gradient geometry scheme 500 that can be applicable to one or more condenser arrays 100 comprising one or more layers 200 of a microfluidic chip. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity. As shown in FIG. 5 one or more geometries of the condenser arrays 100 (e.g., of one or more lattice structures 104, first arrangements 300, second arrangements 400, and/or collection channels 208 comprising a condenser array 100) can vary along different portions of the condenser array 100.

(39) The one or more condenser arrays 100 can comprise a first region characterized by one or more first geometries and/or a second region characterized by one or more second geometries. For example, FIG. 5 illustrates the pillar 102 arrangement of a portion of an exemplary collection channel 208, which can comprise a first region and/or a second region. The first region can be represented by G.sub.1 region, and can be characterized as having a first pillar gap, which can be represented by G.sub.1. The second region can be represented by G.sub.2 region, and can be characterized as having a second pillar gap, which can be represented by G.sub.2. Further, the first pillar gap (e.g., represented by G.sub.1) can be different than the second pillar gap (e.g., represented by G.sub.2). For example, the first pillar gap (e.g., represented by G.sub.1) can be greater than the second pillar gap (e.g., represented by G.sub.2).

(40) In addition, one of ordinary skill in the art will recognize that while variations in pillar gaps are shown in FIG. 5, the gradient geometry scheme 500 can be characterized by any of the other geometries described herein. Moreover, while the gradient geometry scheme 500 is described above with regard to two regions, the gradient geometry scheme 500 can comprise additional regions (e.g., three and/or more) to further facilitate efficiency of the condenser array 100. An embodiment in which the one or more condenser arrays 100 comprise a gradient geometry scheme 500 can advantageously allowing larger particles (e.g., EVs) to exit the condenser array 100 into an alternate exit channel within a subject collection channel 208 before the gap size reduces downstream, which may be useful in clog mitigation, particularly in cases where there is a large range of particles (e.g., EVs) that cannot be efficiently captured by a single pillar gap size.

(41) FIG. 6 illustrates a diagram of an example, non-limiting layer 600 of a microfluidic chip that can comprise one or more condenser arrays 100 in conjunction with one or more nanoDLD array banks in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity. Layer 600 can comprise one or more condenser arrays 100, one or more nanoDLDs, a plurality of inlets, and/or a plurality of outlets. In one or more embodiments, a microfluidic chip can comprise a plurality of layers 600 (e.g., wherein respective layers 600 can be located adjacent, horizontally and/or vertically, to each other or other chip layers). One or more fluids can flow through layer 600 at a steady state, which can be effected by an external driving forced that can include, but is not limited to: electro-osmotic flow, pressure driven flow, capillary flow, a combination thereof, and/or the like.

(42) As shown in FIG. 6, one or more sample inlets 202 and/or one or more buffer inlets 204 can be in fluid communication with one or more condenser arrays 100. As described with regard to FIG. 2, a sample fluid can flow from the one or more sample inlets 202 to the one or more condenser arrays 100. Also, as a buffer can flow from the one or more buffer inlets 204 to the one or more condenser arrays 100. As the sample fluid flows through the one or more condenser arrays 100, one or more particles (e.g., exosomes) within the sample fluid can be displaced towards a collection wall 602 of the one or more condenser arrays 100. One or more displaced particles within the sample fluid can collect along the collection wall 602 and thereby form a concentrated stream of a sample, which can flow adjacent to the collection wall 602 to one or more first inlet buses 604. Also, the buffer can flow through the condenser array 100, adjacent to the collection wall 602, and to the one or more first inlet buses 604; such that the one or more displaced particles can be displaced into the buffer to form the concentrated stream. Additionally, other particles comprising the sample fluid that are not displaced by the one or more condenser arrays 100 (e.g., waste and/or other contaminants comprising the sample fluid) can flow through the one or more condenser arrays 100 to one or more waste buses 601, which can guide the fluid to a waste outlet 210 (e.g., which can be in fluid communication with a waste reservoir).

(43) The one or more first inlet buses 604 can be in fluid communication with one or more nanoDLDs. For example, the one or more first inlet buses 604 can be in fluid communication with a first bank 606 of one or more nanoDLD arrays. As the concentrated stream of sample and/or buffer flows from the one or more first inlet buses 604 and through the first bank 606 of one or more nanoDLD arrays; one or more particles of a first size, which can comprise the sample, can be displaced and carried to one or more outlets, while the remaining sample can flow to one or more second inlet buses 608. The one or more second inlet busses 608 can be in fluid communication with a second bank 610 of one or more nanoDLD arrays. Thus, the remaining sample can flow from the one or more second inlet buses 608 into the second bank 610 of one or more nanoDLD arrays. As the remaining sample flows through the second bank 610 of one or more nanoDLD arrays, particles of a second size can be displaced and carried to one or more other outlets, while non-displaced particles comprising the remaining sample can flow to one or more outlet buses 212. The one or more outlet buses 212 can be in fluid communication with one or more particle outlets 214. Thus, particles, which comprised the sample, of a third size can flow through the one or more outlet buses 212 to the one or more particle outlets 214 (e.g., which can be in fluid communication with one or more particle reservoirs). While FIG. 6 illustrates two banks of nanoDLD arrays, the architecture of layer 600 is not so limited. For example, layer 600 can comprise more or less than the two banks depicted in FIG. 6.

(44) Operation of layer 600 can be similar to operation of layer 200 depicted in FIG. 2; however, layer 600 can also sub-fractionate one or more purified particle (e.g., exosome) populations downstream of one or more condenser arrays 100 (e.g., via one or more banks of nanoDLD arrays). The sample inlet can bring sample to an optional upstream filtration element as in the previous case. Here, sample can be inputted into one or more condenser arrays 100 with a buffer exchange. Additionally, purified particle (e.g., exosome) populations at a condenser array 100 exit can next be distributed across as a bus system (e.g., comprising first inlet bus 604, second inlet bus 608, and/or outlet bus 212) that can feed one or more banks of multiplexed nanoDLD arrays, wherein the purified particles can be more finely fractionated according to size. The bus system can be independently defined and etched deeper than the arrays (e.g., the one or more condenser arrays and/or the nanoDLD arrays) themselves to ensure proper fluid distribution. The nanoDLD element may include a single fractionation bank or several. The smaller fraction of the particle (e.g., exosome) population can be feed to the next nanoDLD array bank where the smaller size population can be further subdivided. Successive nanoDLD array banks can necessarily have progressively smaller gaps, such that successive banks can have more multiplexed arrays than the previous one in order to conductance match the banks.

(45) Further, a resistive element 612 for the waste material can be included in the waste outlet bus 601 for the purpose of conductance matching, and can thereby prevent any unexpected or uneven flow distribution along the condenser array 100 exit. The resistive element 612 can be constructed from serpentine channels, contain constricting channels or features, such as pillars or sieves, or other such microfluidic features known in the art.

(46) FIG. 7 illustrates a diagram of an example, non-limiting array 700 that can comprise the first bank 606 of nanoDLD arrays in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity.

(47) As shown in FIG. 7, the array 700 can be in fluid communication with the first inlet bus 604 and/or the second inlet bus 608. Fluid can flow from the first inlet bus 604, through the array 700, and into the second inlet bus 608. As fluid flows through the array 700, particles of a first size can be directed to an array outlet 702, while particles of a second size can flow to the second inlet bus 608. As shown in FIG. 7 a first region 704 depicts an exemplary flow path that can be achieved by particles of the first size, while a second region 706 depicts an exemplary flow path that can be achieved by particles of the second size.

(48) FIG. 8 illustrates a diagram of an example, non-limiting array 800 that can comprise the second bank 608 of nanoDLD arrays in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity.

(49) As shown in FIG. 8, the array 800 can be in fluid communication with the second inlet bus 608 and/or the outlet bus 212. Fluid can flow from the second inlet bus 608, through the array 800, and into the outlet bus 212. As fluid flows through the array 800, particles of the second size can be directed to an array outlet 802, while particles of a third size can flow to the outlet bus 212. As shown in FIG. 8 a third region 804 can depict an exemplary flow path that can be achieved by particles of the second size, while a fourth region 806 can depict an exemplary flow path that can be achieved by particles of the third size. In various embodiments, the first particle size (e.g., which can characterize particles that can exit via array outlet 702) can be greater than the second particle size (e.g., which can characterize particles that can exit via array outlet 802), and the second particle size can be greater than the third particle size (e.g., which can characterize particles that can flow into the outlet bus 212).

(50) FIG. 9 illustrates a diagram of an example, non-limiting interface manifold 900 that can facilitate fluid communication between layer 600, and/or layer 200, and the microfluidic chip in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity. The interface manifold 900 can comprise one or more waste ports 902, one or more sample inlet ports 904, one or more buffer inlet ports 906, one or more particle outlet ports 908, one or more first particle reservoirs 910, and/or one or more second particle reservoirs 912.

(51) The interface manifold 900 can be located on a separate layer of a microfluidic chip than layer 600 (e.g., or layer 200). The one or more waste ports 902 can be in fluid communication with the one or more waste outlets 210 and can receive waste exiting layer 600 (e.g., and/or layer 200) via the one or more waste outlets 210. The one or more sample inlet ports 904 can be in fluid communication with the one or more sample inlets 202 and can supple a sample fluid to layer 600 (e.g., and/or layer 200) via the one or more sample inlets 202. The one or more buffer inlet ports 906 can be in fluid communication with the one or more buffer inlets 204 and can supply a buffer fluid to layer 600 (e.g., and/or layer 200) via the one or more buffer inlets 204. The one or more particle outlet ports 908 can be in fluid communication with the one or more particle outlets 214 and can receive particles (e.g., exosomes) exiting layer 600 (e.g., and/or layer 200) via the one or more particle outlets 214. The one or more first particle reservoirs 910 can be in fluid communication with the one or more array outlets 702 and can receive particles of a first size exiting layer 600 via the one or more array outlets 702. The one or more second particle reservoirs 912 can be in fluid communication with the one or more array outlets 802 and can receive particles of a second size exiting layer 600 via the one or more array outlets 802. The interface manifold 900 can further comprise one or more o-rings (e.g., one or more gaskets and/or the like) to facilitate one or more seals between layer 600 (e.g., and/or layer 200) and the interface manifold 900 and/or provide structural support for layer 600 (e.g., and/or layer 200).

(52) FIG. 10 illustrates a flow diagram of an example, non-limiting method that can facilitate purification and/or fractionation of a sample fluid via a microfluidic chip that can comprise one or more condenser arrays 100 in accordance with one or more embodiments described herein. Repetitive description of like elements employed in other embodiments described herein is omitted for sake of brevity.

(53) At 1002, the method 1000 can comprise receiving a buffer solution and a sample solution at a microfluidic chip comprising a condenser array 100, an inlet (e.g., sample inlet 202, buffer inlet 204, and/or inlet bus 206), and an outlet (e.g., waste outlet 210, outlet bus 212, and/or particle outlet 214), wherein the sample solution can comprise a sample and waste, and wherein the buffer solution and the sample solution can flow through the condenser array 100 at a rate greater than about 1.0 nanoliters per hour. For example, the buffer solution and the sample solution can flow through the condenser array 100 at a rate greater than or equal to about 1.0 nL/hr and less than or equal to about 5 mL/hr.

(54) At 1004, the method 1000 can comprise displacing, by the condenser array 100, a sample from the sample solution in a direction lateral to a side wall of the microfluidic chip. For example, the sample can be displaced into the buffer solution. At 1006, the method 1000 can comprise collecting the sample separate from the waste via the outlet.

(55) In one or more embodiments, the method 1000 can further comprise pre-filtration and/or dilution of the sample solution, and/or pre-wetting the microfluidic chip with antifouling chemical agents including, but not limited to: buffers of varying pH and ionic strength, surfactants, and/or biological coating agents such as bovine serum albumin (BSA).

(56) In addition, the term or is intended to mean an inclusive or rather than an exclusive or. That is, unless specified otherwise, or clear from context, X employs A or B is intended to mean any of the natural inclusive permutations. That is, if X employs A; X employs B; or X employs both A and B, then X employs A or B is satisfied under any of the foregoing instances. Moreover, articles a and an as used in the subject specification and annexed drawings should generally be construed to mean one or more unless specified otherwise or clear from context to be directed to a singular form. As used herein, the terms example and/or exemplary are utilized to mean serving as an example, instance, or illustration. For the avoidance of doubt, the subject matter disclosed herein is not limited by such examples. In addition, any aspect or design described herein as an example and/or exemplary is not necessarily to be construed as preferred or advantageous over other aspects or designs, nor is it meant to preclude equivalent exemplary structures and techniques known to those of ordinary skill in the art.

(57) What has been described above include mere examples of systems, computer program products and computer-implemented methods. It is, of course, not possible to describe every conceivable combination of components, products and/or computer-implemented methods for purposes of describing this disclosure, but one of ordinary skill in the art can recognize that many further combinations and permutations of this disclosure are possible. Furthermore, to the extent that the terms includes, has, possesses, and the like are used in the detailed description, claims, appendices and drawings such terms are intended to be inclusive in a manner similar to the term comprising as comprising is interpreted when employed as a transitional word in a claim. The descriptions of the various embodiments have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.