Method of making an integrated circuit for a single-molecule nucleic-acid assay platform
10921314 ยท 2021-02-16
Assignee
Inventors
- Kenneth L. Shepard (Ossining, NY)
- Steven Warren (White Plains, NY, US)
- Scott Trocchia (Edgewater, NJ, US)
- Yoonhee Lee (New York, NY, US)
- Erik Young (Tappan, NY, US)
Cpc classification
B82Y40/00
PERFORMING OPERATIONS; TRANSPORTING
H01L2924/00014
ELECTRICITY
B01L7/52
PERFORMING OPERATIONS; TRANSPORTING
B82Y10/00
PERFORMING OPERATIONS; TRANSPORTING
B01J2219/00653
PERFORMING OPERATIONS; TRANSPORTING
H01L2924/00014
ELECTRICITY
B01L3/502707
PERFORMING OPERATIONS; TRANSPORTING
G01N27/4145
PHYSICS
G01N33/5308
PHYSICS
H01L2924/00
ELECTRICITY
H01L29/775
ELECTRICITY
B82Y30/00
PERFORMING OPERATIONS; TRANSPORTING
B82Y15/00
PERFORMING OPERATIONS; TRANSPORTING
International classification
G01N33/00
PHYSICS
B01L7/00
PERFORMING OPERATIONS; TRANSPORTING
G01N27/414
PHYSICS
G01N33/53
PHYSICS
B82Y10/00
PERFORMING OPERATIONS; TRANSPORTING
Abstract
Methods of making an integrated circuit for a single-molecule nucleic-acid assay platform. In one example, the method includes adhering a carbon nanotube to a surface of a transfer film, the transfer film comprising gold or a polymer; placing the surface of the transfer film on a CMOS integrated circuit; releasing the carbon nanotube from the transfer film; and forming a pair of post-processed electrodes proximate opposing ends of the carbon nanotube, the post-processed electrodes electrically connecting the carbon nanotube to the CMOS integrated circuit. The method can also include exposing the carbon nanotube to a diazonium salt solution to form a point defect on a portion of the carbon nanotube.
Claims
1. A method of making an integrated circuit for a single-molecule nucleic-acid assay platform, comprising: adhering a carbon nanotube to a surface of a transfer film; placing the surface of the transfer film on a CMOS integrated circuit; releasing the carbon nanotube from the transfer film; and forming a pair of post-processed electrodes proximate opposing ends of the carbon nanotube, the post-processed electrodes electrically connecting the carbon nanotube to the CMOS integrated circuit.
2. The method of claim 1, wherein the transfer film comprises gold or a polymer.
3. The method of claim 1, further comprising chemically removing the transfer film to release the carbon nanotube.
4. The method of claim 3, wherein: chemically removing the transfer film comprises wet etching the transfer film, and the transfer film comprises gold.
5. The method of claim 3, wherein chemically removing the transfer film comprises soaking the CMOS integrated circuit in an organic solvent, and the transfer film comprises a polymer.
6. The method of claim 1, further comprising: placing the nanotube on a transfer substrate; depositing the transfer film on the transfer substrate; and lifting off the transfer film from the transfer substrate, the transfer film comprising the nanotube.
7. The method of claim 6, further comprising growing the nanotube on the transfer substrate.
8. The method of claim 7, wherein: the transfer film comprises a polymer, and depositing the transfer film comprises spinning the polymer onto the transfer substrate.
9. The method of claim 7, wherein: the transfer film comprises gold, and depositing the transfer film comprises physical vapor depositing and/or electroplating the gold onto the transfer substrate.
10. The method of claim 1, wherein forming the pair of post-processed electrodes comprises depositing titanium, palladium, gold, platinum, silver, chromium, and/or aluminum on a pair of surface-exposed electrodes.
11. The method of claim 1, wherein forming the pair of post-processed electrodes comprises etching away a pair of surface-exposed electrodes and replacing the pair of surface-exposed electrodes with a pair of electrodes that comprise titanium, palladium, gold, platinum, silver, chromium, and/or aluminum.
12. The method of claim 1, further comprising forming one or more reference electrodes on the CMOS integrated circuit to allow control of an electrolytic gating potential.
13. The method of claim 12, wherein the one or more reference electrodes comprise platinum, palladium, and/or silver.
14. The method of claim 13, wherein: the one or more reference electrodes comprise a silver electrode, and the silver electrode is converted into a silver-chloride electrode.
15. A method of making an integrated circuit for a single-molecule nucleic-acid assay platform, comprising: spraying a carbon nanotube suspension on the surface of the CMOS integrated circuit, the carbon nanotube suspension comprising a liquid and carbon nanotubes; evaporating the liquid from the carbon nanotube suspension to deposit the carbon nanotubes on the surface of the CMOS integrated circuit; and forming a pair of post-processed electrodes proximate opposing ends of one or more of the carbon nanotubes, the post-processed electrodes electrically connecting the one or more carbon nanotubes to the CMOS integrated circuit.
16. The method of claim 15, further comprising rasterizing the CMOS integrated circuit and/or a spray nozzle during the spraying.
17. The method of claim 15, further comprising spraying the carbon nanotube suspension from a print head nozzle or an ultrasonic nozzle.
18. The method of claim 17, further comprising heating the CMOS integrated circuit to evaporate the liquid from the carbon nanotube suspension.
19. The method of claim 15, wherein forming the pair of post-processed electrodes comprises etching away a pair of surface-exposed electrodes and replacing the pair of surface-exposed electrodes with a pair of electrodes that comprise titanium, palladium, gold, platinum, silver, chromium, and/or aluminum.
20. The method of claim 15, further comprising forming one or more reference electrodes on the CMOS integrated circuit to allow control of an electrolytic gating potential.
21. The method of claim 20, wherein the one or more reference electrodes comprise platinum, palladium, and/or silver.
22. The method of claim 21, wherein: the one or more reference electrodes comprise a silver electrode, and the silver electrode is converted into a silver-chloride electrode.
23. A method of making an integrated circuit for a single-molecule nucleic-acid assay platform, comprising: forming a pair of electrodes on opposing ends of a carbon nanotube, the electrodes electrically connecting the carbon nanotube to a CMOS integrated circuit; exposing the carbon nanotube to a diazonium salt solution; and applying a reaction liquid-gate bias voltage that promotes a reaction between (a) the diazonium salt solution and (b) the carbon nanotube to form a point defect on a portion of the carbon nanotube.
24. The method of claim 23, further comprising: applying an initial liquid-gate bias voltage to inhibit the reaction; and adjusting the liquid-gate bias voltage to the reaction liquid-gate bias voltage to promote the reaction.
25. The method of claim 24, further comprising: monitoring an electrical current through the carbon nanotube while applying the reaction liquid-gate bias voltage; and detecting a discrete drop in the electrical current through the carbon nanotube; and returning the liquid-gate bias voltage to the initial liquid-gate bias voltage after detecting the discrete drop.
26. The method of claim 24, further comprising: applying the reaction liquid-gate bias voltage for a predetermined time period; and returning the liquid-gate bias voltage to the initial liquid-gate bias voltage at the end of the predetermined time period.
27. The method of claim 24, further comprising: exposing the carbon nanotube to the diazonium salt solution for a predetermined time period; and rinsing the surface of the CMOS integrated circuit to halt a reaction between (a) the diazonium salt solution and (b) the carbon nanotube to form the point defect.
28. The method of claim 24, further comprising depositing a photoresist or an e-beam resist on a portion of the surface of the CMOS integrated circuit prior to exposing the carbon nanotube to the diazonium salt solution to define an isolated exposed region on the surface of the CMOS integrated circuit for a reaction between the carbon nanotube and the diazonium salt solution.
29. The method of claim 23, further comprising: exposing the carbon nanotube to the diazonium salt solution for a predetermined time period; and rinsing the surface of the CMOS integrated circuit to halt a reaction between (a) the diazonium salt solution and (b) the carbon nanotube to form the point defect.
30. The method of claim 23, further comprising depositing a photoresist or an e-beam resist on a portion of the surface of the CMOS integrated circuit prior to exposing the carbon nanotube to the diazonium salt solution to define an isolated exposed region on the surface of the CMOS integrated circuit for a reaction between the carbon nanotube and the diazonium salt solution.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) For a fuller understanding of the nature and advantages of the present concepts, reference is made to the following detailed description of preferred embodiments and in connection with the accompanying drawings.
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DETAILED DESCRIPTION
(21) An aspect of the disclosed subject matter provides systems and methods for single-molecule nucleic-acid assay platforms. Single-molecule nucleic-acid assay platforms according to the disclosed subject matter can provide improved sensitivity without amplification, while also providing improved multiplexing capabilities. Transduction can be performed label-free, which can simplify sample preparation protocols.
(22) Another aspect of the disclosed subject matter relates to a spin-cast method for fabrication large arrays of metal-contacted single nanotubes. This method may be applied to the fabrication of passive array devices. The application of these techniques also includes but is not limited to fabrication of these devices within the back-end flow of a standard CMOS process. This is beneficial since the scope of smFET applications has been restricted by the low yield of fabrication. Large arrays of smFETs will enable parallelization and scale useful for many applications. The devices can be converted to smFETs by employing electrochemical reduction of compounds such as aryldiazonium salts. The reduction can be controlled with applied potential with yields for single defects of equal or better than 80%.
(23) In accordance with certain embodiments, wafer-scale SWCNT-FET can be fabricated by covering the entire surface of a 100-mm silicon wafer with 285 nm of thermal oxide with 1-2 ml of a CNT suspension for spin coating (with a nanotube concentration of 1.6 to 2.5 g/ml), resulting in a surface concentration of 0.130.02 CNTs/m.sup.2 post-spinning.
(24) A method for controllably point functionalizing of these nanotube devices through a bias applied between the device and the surrounding electrolyte is also provided. In accordance with certain embodiments, the spin-cast devices may be exposed to 4-formylbenzene diazonium hexafluorophosphate (FBDP) with an applied liquid-gate potential (V.sub.lg) to form an aryl point defect on a portion of the CNT. For example, at V.sub.lg of 500 mV, a m-SWCNT device exhibits a single current level with no discernible current drops for the entire recording time (515 seconds) after FBDP exposure.
(25) In another embodiment, an m-SWCNT device with fixed V.sub.lg at 0 V exhibits discrete current levels 90-sec after FBDP exposure, which indicates the formation of a point defect on a portion of the m-SWCNT. At certain higher defect densities, transport can change from ballistic to localized with very significant increases in resistance. In some cases, m-SWCNT devices with higher initial resistance (>500 k) can exhibit larger resistance steps during the FBDP incubation.
(26)
(27) The smFET 100 assay platform can operate differently from traditional ensemble assays. For example, and as embodied herein, rather than measuring the hybridization behavior of an ensemble, as in a traditional microarrays, the smFET 100 assay platform can measure the time between capture events. Capture rates can thus be diffusion limited and concentration dependent. As such, low levels of detection, as low as one molecule, can be performed, which can be affected at least in part by diffusion time of the target to the sensor site. With reference to
(28) Nanotube and nanowire field-effect sensors can be utilized as biosensors. In some implementations, an electrolyte buffer with mobile ions can be used to gate the transistor. The sensing mechanism can be attributed at least in part to changes in the Schottky barrier at the contacts and electrostatic doping of the nanotube channel due to adsorption of biomolecules.
(29) As embodied herein, introducing a defect onto the nanotube 110 surface can provide smFET 100 sensors with localized charge sensitivity and improved gain. Such defects can, in turn, be used to covalently bind molecules at the scattering site. The resulting smFET 100 device can have improved sensitivity and detect the binding of a single molecule, due at least in part to Coulomb interactions between the molecule and the defect which modulates scattering in the 1D channel. The charge sensitivity can be screened by counterions and can be localized to the region of the defect. The single-point defects can be electrochemically created in a controllable manner, as described in further herein. Such defect-dominated conductance in nanotubes can produce measurements of DNA hybridization kinetics with suitable high signal-to-noise ratio (SNR) and bandwidth to measure single-molecule kinetics and thermodynamics through a label-free smFET approach.
(30) According to another aspect of the disclosed subject matter, an integrated circuit for a single-molecule nucleic-acid assay platform is provided. With reference to
(31) Various techniques can be utilized to transfer one or more nanotubes 110 to a substrate of a CMOS integrated circuit 210.
(32) Alternatively, as illustrated in
(33) After the thin-film polymer 205 is placed on top of the CMOS substrate 210, along with the nanotubes 110, the thin-film polymer 205 is chemically removed, for example by soaking the CMOS substrate 210 in acetone (and/or another organic solvent). The CMOS substrate 210 can be subsequently rinsed in isopropanol and dried using nitrogen. Subsequently, the CMOS substrate 210 can undergo a high-temperature anneal to remove any residual polymer. The anneal can occur in vacuum, in nitrogen, in forming gas, in argon, under oxygen, or in air. Chemically removing the thin film polymer 205 causes the nanotubes 110 to be released from the thin-film polymer 205 and deposited onto the surface of the CMOS substrate 210.
(34) Alternatively, a thin film of gold can be used to transfer nanotubes 110 to the CMOS substrate 210. For example, gold film (e.g., a high purity gold film) can be deposited onto the solid substrate and the nanotubes 110 attach or adhere to a first surface of the thin gold film. The gold film, which can be preferably about 50 nm thick or greater, can be deposited by physical vapor deposition or electroplating. After the gold film is deposited, it is mechanically pulled off of the solid substrate. Tape or a polymer (e.g., polydimethylsiloxane (PDMS)) can be applied to the second surface of the gold film to provide a handle for peeling off the gold film from the solid substrate. The nanotubes 110 that are attached or adhered to the first surface of the gold film are pulled off of the solid substrate when the gold film is peeled off of the solid substrate. The first surface of the gold film with the nanotubes 110 attached thereto is then placed on top of the CMOS substrate 210, along with the nanotubes 110. After the gold film is placed on top of the CMOS substrate 210, along with the nanotubes 110, the gold film is chemically removed by wet etching. Chemically removing the gold film causes the nanotubes 110 to be released from the gold film and deposited onto the surface of the CMOS substrate 210.
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(36) In one or more alternative embodiments, the carbon nanotubes are disposed in a carbon nanotube suspension.
(37) In step 510 a carbon nanotube suspension is placed on the surface of the CMOS integrated circuit. The CMOS integrated circuit includes source and drain electrodes 600A, 600B (
(38) The carbon nanotube suspension includes carbon nanotubes suspended in a liquid. The liquid can be water that includes surfactants, which can help keep the nanotubes well-dispersed. The surfactants can include sodium dodecyl sulfate, sodium cholate, cetyl trimethyl ammonium bromide, polyoxyethylene (20) sorbitan monolaurate (e.g., TWEEN 20 available from Sigma-Aldrich, Inc.), 4-(1,1,3,3-tetramethylbutyl)phenyl-polyethylene glycol (e.g., TRITON X-100 available from Sigma-Aldrich, Inc.), and/or sodium deoxycholate. Alternatively, the liquid can include an organic solvent such as toluene. For example, in the case of toluene, the liquid can include one or more polymers (e.g., the copolymer of 9,9-dioctylfluorenyl-2,7-diyl and bipyridine (PFO-BPy)) that help keep the nanotubes well-dispersed. The liquid can also be an organic solvent that does not require any surfactants or polymers to help keep the nanotubes well-dispersed, such as N-methyl-2-pyrrolidone (NMP), N-cyclohexyl-2-pyrrolidone (CHP), and/or dimethylformamide (DMF).
(39) A variety of techniques can be used to place the carbon nanotube suspension on the surface of the CMOS integrated circuit such as spin-coating or spraying (e.g., using a spray nozzle, a printer head nozzle (e.g., in an ink jet or 3D printer), or an ultrasonic nozzle). Spraying can occur in a rasterized manner to improve the uniformity of the thickness and distribution of the carbon nanotube suspension across the surface of the CMOS integrated circuit. The spraying process may occur in air or in an inert atmosphere (nitrogen or argon) to prevent the solvent/liquid from undergoing any sort of reaction with oxygen at elevated temperatures (e.g., during step 520).
(40) In step 520, the liquid (e.g., water or organic solvent) in the carbon nanotube suspension is evaporated. For example, the evaporation can occur as a result of the spin-coating deposition process without additional heating. The evaporation can occur during or after the spay deposition process. For example, heating and evaporation can occur in the spray deposition process itself and/or during the spray deposition process by placing the substrate on a hot plate. Heating can also occur after the spray deposition process in an oven, on a hot plate, or by another process. In some embodiments, the CMOS integrated circuit can be heated to within a temperature range of about 40 C. up to about 250 C. to promote substantially complete evaporation of the liquid (e.g., solution or solvent) in the carbon nanotube suspension. As used herein, about means plus or minus 10% of the relevant value.
(41) The heat can cause the liquid to evaporate when (or approximately when) the carbon nanotube suspension touches the surface of the CMOS integrated circuit 210 to deposit the carbon nanotubes thereon in step 530 without re-aggregating the carbon nanotubes on the surface of the CMOS integrated circuit 210. The carbon nanotubes can have a continuous uniform probability distribution across the surface of the CMOS integrated circuit. In step 540, a metal is deposited and patterned onto the CMOS integrated circuit to form post-processed contacts/electrodes 220. The post-processed contacts 220 form an electrical connection between the carbon nanotube(s) and the source and drain electrodes 600A, 600B of the CMOS integrated circuit. The metal can include titanium, palladium, gold, platinum, silver, chromium, and/or aluminum.
(42) Previous spin-cast efforts have utilized multiple deposition cycles to manipulate the thin-film deposition of unbundled nanotubes from an air-liquid interface or laminar flow at a liquid-liquid interface. Deposition conditions can be affected by multiple parameters, such as flow velocity, surface pressure, and/or thin-film thickness, and it can make the manufacturing process difficult. Using a single spin cycle (e.g., in step 510) to randomly place a dilute SWCNT suspension across large wafer surfaces reduces or eliminates one or more of these manufacturing problems. For example, using a single spin cycle results in the evaporation of the solvent in the SWCNT suspension without any additional heating (e.g., in subsequent processing steps).
(43) Simulations enable understanding of the relationship between spin-cast parameters and device yield. In one embodiment, the expected number of nanotubes bridging on the fixed electrode pairs is a function of both nanotube density and electrode width (w) at a fixed electrode gap (I) of 0.5 m (spacing between electrodes) and an electrode height (h) of 10 m. The nanotube solution used can comprise a purified, commercially-available unsorted SWCNT solution (e.g., <5% carbonaceous impurities). The electrodes can be designed as a zig-zag shape to allow for CNT transits in both the horizontal and vertical directions. In the simulations, placement of nanotubes by spin-cast deposition is assumed to produce a continuous uniform probability distribution across the wafer.
(44) Both higher nanotube density and wider electrodes are expected to result in a higher frequency of nanotube bridges between electrode pairs. In this embodiment, statistics are collected for 500 simulated electrode pairs with a nanotube density ranging from 0.05 CNT/m.sup.2 to 0.25 CNT/m.sup.2 and electrode widths ranging between 5 m and 25 m.
(45) After transfer of nanotubes 110 to the substrate of the CMOS integrated circuit 210, additional lithography and metallization can be performed to deposit a metal, such as titanium, palladium, gold, platinum, silver, chromium, and/or aluminum to form post-processed electrodes 220A, 220B connecting the nanotubes 110 to the integrated circuit 210, as shown for example in
(46) The reference electrodes can be formed, for example and without limitation, by electroplating silver with subsequent chlorination with FeCl.sub.3. The reference electrodes can thus be configured as Ag/AgCl electrodes, which can have a relatively low current level therethrough, and thus can operate for days continuously before being exhausted. Chlorination of the Ag/AgCl electrodes can be repeated multiple times before the silver electrode can become exhausted at which point it can be re-electroplated. Additionally or alternatively, platinum can be deposited to create the reference electrodes to allow control of the electrolytic potential gating the nanotube 110. Platinum can be deposited onto the set of surface-exposed aluminum electrodes, or the set of surface-exposed aluminum electrodes can be etched away and replaced with platinum. Additionally or alternatively, palladium can be deposited to create the reference electrodes to allow control of the electrolytic potential gating the nanotube 110. Palladium can be deposited onto the set of surface-exposed aluminum electrodes, or the set of surface-exposed aluminum electrodes can be etched away and replaced with palladium. Thus, the reference electrodes can comprise platinum, palladium, and/or or silver. Additionally or alternatively, one or more external reference electrodes 125 can be utilized to allow control of the electrolytic gating potential, as described herein. The external reference electrodes 125 can be formed of the same material(s) and/or different material(s) than reference electrodes.
(47) Integration of nanotubes 110 with CMOS chips 210 can allow multiple devices to be integrated on the same measurement substrate and can allow reduction in the parasitic capacitance associated with assay measurements. As such, measurement bandwidth can be increased while reducing amplifier noise. Furthermore, the integrated circuit 210 CMOS substrates can also be automated to quickly probe devices and select those with suitable performance.
(48) Concentrations of target analytes can be determined by the mean time between capture events, as shown for example in
(49) The capture probe can be immobilized or programmed on a site-specific basis, for example and as embodied herein through either robotic spotting or through electrically programmed immobilization. With robotic spotting, drops of capture probe can be placed over each selected site. In this manner, sensor density can have a pitch as low as approximately 150-m. With electrically programmed immobilization, individual probe sites can be electrically selected such that only those selected sites can bind the probe. In this manner, sensor density can be increased without limit over that obtained with robotic spotting.
Example 1
(50) In a specific example, about 1 ml to about 2 ml of a CNT suspension (with a nanotube concentration of about 1.6 g/ml to about 2.5 g/ml) was spin-coated onto a thermal oxide layer on a 100-mm silicon wafer using a single spin cycle during which the liquid in the CNT suspension is evaporated. The thermal oxide layer can be about 285 nm thick, and the resulting surface concentration is 0.130.02 CNTs/m.sup.2, assessed from eleven SEM micrographs (with the field of view of 500 m.sup.2) of the wafer post-spinning.
(51) Metal electrodes were then deposited on top of the carbon nanotubes through a photolithographic process. The metal extended out to the side of the chip, where it was electrically connected to a measurement board through wire bonds.
(52) Each wafer prepared this way yielded 45 chips (11-mm-by-10-mm size); each chip contained 280 pairs of source-drain electrical contacts (w=20 m, I=0.5 m, and h=10 m). Representative micrographs of devices with single nanotube crossings, taken at various locations on a single die, are shown in
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(54) To ensure that the SWCNT devices electrically conduct after all processing steps, current-voltage (I-V) characteristics of 1,960 electrode pairs from seven chips were examined by applying back-gated voltage sweeps (V.sub.bg, applied on the underlying silicon substrate) from 10 to +10 V. Since solution-processed SWCNTs are composed of mixtures of metallic (m-SWCNTs) and p-type semiconducting nanotubes (s-SWCNTS), conductive devices were determined based on measured on-current (I.sub.on) at V.sub.bg=10 V and a source-to-drain (V.sub.sd) of 100 mV. Conductive SWCNTs were defined by an I.sub.on of at least 1.0 nA, and 67.49.9% of electrode pairs were identified as non-conductive, as illustrated in
(55) After initial electrical characterization, several chips containing tens of working SWCNT devices were wire-bonded to land-grid array (LGA) packages to interface with a custom printed circuit board. Once a microfluidic chamber was attached to the chip surface, aqueous buffer solution (e.g., 100 mM sodium phosphate buffer at pH 8.0) was introduced. I-V characteristics were measured by varying V.sub.lg, set by a Pt electrode relative to the source potential of the device, as illustrated in
(56) As discussed above, it can be advantageous to create a functionalized point or a functionalized point defect in or on the carbon nanotube to improve the sensitivity of the device (e.g., by reducing the region of charge sensitivity to the region around the functionalized point or functionalized point defect).
(57) In step 1120, a pair (or pairs) of electrodes is formed on the surface of the CMOS integrated circuit such that each electrode is electrically coupled to opposing ends of the CNT. The pair of electrodes can include a source electrode and a drain electrode which can be the same as source electrodes 120a, 320a and drain electrodes 120b, 320b, respectively. The electrodes can be formed before or after the CNT(s) is/are transferred to the CMOS integrated circuit. For example, the electrodes can be formed before the CNT(s) is/are transferred to the CMOS integrated circuit when CNTs are transferred using dielectrophoresis (e.g., using an AC signal for nanotube placement). In other embodiments, the source and drain electrodes are formed and then, after the CNTs are transferred to the CMOS integrated circuit, a metal (e.g., titanium, palladium, gold, platinum, silver, chromium, and/or aluminum) is deposited and patterned to form electrical bridges (e.g., post-processed contacts or electrodes 220) between one or more CNTs and the source and drain electrodes.
(58) In optional step 1130, one or more nano-wells is/are created on each CNT. The nano-well(s) can be created by depositing and patterning a photoresist or an e-beam resist (e.g., PMMA (poly(methyl methacrylate)) on the CMOS integrated circuit surface. The resist can be patterned and developed to define the nano-wells in the gaps between the resist. The nano-well(s) define discrete area(s) (e.g., reaction area(s)) on the CMOS integrated circuit surface, including on the CNT(s), where the diazonium salt solution can contact the CNT(s). The CMOS integrated circuit surface on which the resist remains is not exposed (or is not substantially exposed such that a reaction will occur) to the diazonium salt solution.
(59) After optional step 1130, flow chart 1100 proceeds to either step 1140 or step 1160.
(60) In step 1140, the CNT(s) is/are exposed to the diazonium salt solution for a predetermined time period (e.g., 90 seconds to 24 hours depending on the concentration of the diazonium salt solution). An example of a diazonium salt solution is 4-formylbenzene diazonium hexafluorophosphate (FBDP), which forms an aldehyde group as the point defect on the CNT.
(61) In step 1150, a point defect is formed on a portion of the CNT. For example, the point defect can include an aldehyde group, as discussed above. After step 1150, flow chart 1100 proceeds to step 1190 (discussed below) via placeholder A.
(62) In step 1160, which follows optional step 1130, a liquid-gate bias voltage V.sub.lg is applied to the CNT at a potential that inhibits the reaction between (a) the diazonium salt solution and (b) the CNT. For example, the bias voltage V.sub.lg can be initially set at 500 mV or lower to inhibit the reaction in step 1160.
(63) The extent of electron transfer, which leads to the formation of aryl radicals, is dependent on the electron density near the Fermi energy of the nanotube. Hence, the diazonium reactivity can be controlled through the applied V.sub.lg, which modulates this Fermi level. The bias voltage V.sub.lg can be varied to promote or inhibit the reaction between (a) the diazonium salt solution and (b) the CNT. For example,
(64) The effects of the applied V.sub.lg on reaction kinetics can be studied by examination of current-time (I-t) recordings (collected at 25 kSps) of two representative spin-cast devices with a fixed V.sub.lg of 500 mV and 0 V and a fixed V.sub.sd of 50 mV in the presence of FBDP solution at micro-molar concentrations, as illustrated in
(65) Returning to
(66) In step 1180, the bias voltage V.sub.lg is applied at a reaction potential (e.g., 300 mV or higher). Unlike in step 1170, the bias voltage V.sub.lg is not applied for a predetermined time period. Instead, the electrical current through the CNT is monitored in real time in step 1182. When a point defect is formed on a portion of the CNT in step 1184, the electrical current through the CNT exhibits a discrete drop in current. When this discrete current drop is detected in step 1186, the bias voltage V.sub.lg is lowered to a non-reactive potential (e.g., 500 mV or lower) to inhibit additional reaction between the CNT and the diazonium salt. In some embodiments, V.sub.lg is initially set to inhibit the reaction, then Vlg is adjusted to promote the reaction until a reaction is detected, and then Vlg returns to a non-reactive potential (e.g., to the initial value) to inhibit the reaction. In an alternative embodiment, another change in the electrical properties of the CNT can be monitored in real time in step 1182, such as an increase in the CNT'S resistance or a decrease in its conductivity, which can trigger the lowering of the bias voltage Vlg to a non-reactive potential in step 1184.
(67) After steps 1174 and 1186, flow chart 1100 proceeds to step 1190 via placeholder D. In step 1190, the reagent (e.g., diazonium salt solution) is rinsed from the substrate (e.g., semiconductor substrate), for example using deionized water. The non-reaction potential can optionally be applied to the CNT during step 1190 to inhibit additional reaction between the CNT and the diazonium salt. In step 1192, a biomolecule (e.g., ssDNA) is attached to the defect site. Flow chart 1100 also proceeds through steps 1190 and 1192 after step 1150 via placeholder A.
(68) For example, when V.sub.lg is fixed at 0 V, an m-SWCNT device exhibits discrete current levels 90-sec after exposure to a 10 M FBDP solution (
(69) Modulation of V.sub.lg can be further used to halt the reaction. During the FBDP incubation, V.sub.lg (which begins at 500 mV) for each individual device is increased by +50 mV steps every ten seconds until one discrete downward step of current is detected. Within ten seconds after this defect generation is detected, V.sub.lg is switched back to 500 mV to halt further reactions. Device conductance is continuously monitored (while holding V.sub.lg at 500 mV) until the FBDP solution is flushed from the device to ensure that the single defect status remains unchanged as residual reagent is purged. m-SWCNTs were shown to be more susceptible to conjugation with aryl radicals than s-SWCNTs; in particular, m-SWCNTs are better able to stabilize the transition state through electron donation and are consequentially more reactive in aryl-radical reactions due to their finite electron density at the Fermi level.
(70) The reaction potential and predetermined time period can be determined statistically to yield the desired point functionalization. The functionalization efficiency can be tuned through both functionalization time (the predetermined time period) and concentration of diazonium molecules in solution. For example, the concentration of diazonium molecules and the solution potential can be selected such that the predetermined time period is about 30 seconds to about 10 minutes, or any time or time range therebetween.
(71) In some embodiments, electrochemical surveillance of the reaction can also detect unstable or reverse reactions on the CNT sidewall. In one functionalization trial, one upward current step after three serial step-wise drops induced at V.sub.lg of 50 mV was detected indicating a detachment of the unstable isolated aryl defect, as illustrated in
(72) Feedback-controlled diazonium reaction for single-point functionalization can be employed. Initially, a liquid gate potential V.sub.lg of 500 mV is applied and subsequently increased to promote the reaction. When a downward current step is detected, V.sub.lg is immediately switched back to 500 mV to halt the reaction. Overlaid I-t and V.sub.lg-t records of Device A1 during FBDP exposure, in which a device is exposed to 73 M FBDP solution at V.sub.sd of 100 mV, is illustrated in graph 1400 in
(73) Representative stable first and second single-defect devices are shown in
(74) The stability of the functionalized point defect can be determined by calculating conductance changes before and after FBDP exposure. Compared to the initial value of I.sub.on at V.sub.lg of 500 mV, single-point-defected devices exhibited average conductance changes of 29.816.9%. On the other hand, devices with two defect sites exhibited conductance changes of 23.519.1%. No positive correlation is observed between the number of defects and the resulting reduced conductance at V.sub.lg of 500 mV. The relatively large variance in conductance associated with a single defect can be attributed to differences in the geometric configuration of the defect. As expected, the non-functionalized devices showed conductance changes of 0.030.05%, indicating that initial conductance was retained after FBDP exposure.
Example 2Estimation of Conjugation Yield by Sensing Single-Molecule DNA Melting Dynamics
(75) To demonstrate the functioning of the spin-cast smFETs as single-molecule transducers, the single spa defect sites created in each device are covalently conjugated to an amine-modified 20-mer single-stranded DNA (ssDNA). Since spin-cast deposition results in surface-bound CNT devices, substrate-charge-trap-induced random telegraph signals (RTS) can occur. In some cases, devices display significant RTS at some point up to and including probe conjugation, and these devices can be excluded from further use.
(76) It has been demonstrated that smFETs are capable of characterizing DNA hybridization and melting kinetics by temporal analysis of the resulting RTS and that a positive V.sub.lg is able to promote the molecular dissociation. RTS is observed with two discrete conductance levels (high and low) which correspond to the hybridized and melted state of the probe molecule, respectively.
(77) A similar experiment can be performed to validate single-molecule sensing capabilities of the devices fabricated. After tethering the 20-mer probe DNA to the defect site, a solution containing fully complementary target DNA (100 nM) was introduced at a fixed temperature (40 C.), close to the theoretical melting temperature of T.sub.m=49.7 C. while holding V.sub.lg at 400 mV. It has been previously shown that the electrostatic force induced by a positive V.sub.lg lowers the effective melting temperature, decreasing DNA hybridization rate (k.sub.hyb) and increasing DNA melting rate (k.sub.melt). I-t series were monitored at several liquid gate potential (V.sub.lg) to modulate DNA dissociation dynamics. I-t traces for two different devices, one having two defects (device 1502 in
(78) The histograms of 60-sec I-t traces show two distinct conductance levels, as illustrated in
(79) An idealized trace, resulting from fits to the raw data using an iterative detection algorithm, can be used for subsequent temporal analysis. I-t traces can be fit to a two-state model to determine dwell times in the hybridized (.sub.hyb) and melted states (.sub.melt). A double-exponential fit to the resulting histograms can determine the rate constants (k.sub.hyb) and (k.sub.melt), as illustrated in
(80) The Schiff base reaction between the amine-modified ssDNA probe and aldehyde group of FBDP also has a finite yield. As a result, a two-point-functionalized device can tether two, one, or no probes. The device 1502 that has two defect sites, for example, shows two discrete conductance states in the presence of a fully-complementary target DNA solution. The device 1501 has one defect site also shows two discrete states in the presence of a fully-complementary target DNA solution.
(81) These multiple-conductance-state transitions are attributed to the fact that two probe DNAs are attached to device 1501.
(82) The foregoing merely illustrates the principles of the disclosed subject matter. Various modifications and alterations to the described embodiments will be apparent to those skilled in the art in view of the teachings herein. It will be appreciated that those skilled in the art will be able to devise numerous modifications which, although not explicitly described herein, embody its principles and are thus within its spirit and scope.