INJECTION METAL ASSISTED CATALYTIC ETCHING

Abstract

An electroless etching process. The process produces nanostructured semiconductors in which an oxidant (Ox.sub.1) is deposited as a metal on a semiconductor surface and used as a catalytic agent to facilitate reaction between a semiconductor and a second oxidant (Ox.sub.2). Ox.sub.2 is used to initiate etching by injecting holes into the semiconductor valence band as facilitated by the catalytic action of the deposited metal. The extent of reaction is controlled by the amount of Ox.sub.2 added; the reaction rate is controlled by the injection rate of Ox.sub.2. The process produces high specific surface area and/or hierarchically structured porous Si with higher and controllable yield. In addition, the ability is demonstrated to vary the pore size distribution of mesoporous silicon including producing hierarchically structured mesoporous silicon with more than one peak in the pore size distribution. In principle, the process applies to any semiconductor onto which metal can be deposited galvanically.

Claims

1. A process to improve the yield of electroless etching to produce porosified or hierarchical silicon particles comprising the steps of: (a) providing electronics-grade, metallurgical-grade, or other silicon-comprising powders; (b) adding a first oxidant, which deposits on the powder as a metal; (c) using a pump to inject the soluble form of the metal with controlled rate to facilitate even deposition of the metal catalyst; (d) initiating nanostructure formation through injection with a controlled rate and amount of a second oxidant.

2. The process according to claim 1, wherein the second oxidant is selected from H.sub.2O.sub.2, VO.sub.2.sup.+, Ce.sup.4+, nitrates, nitrites, NO.sub.2, NOBF.sub.4, NOHSO.sub.4, MnO.sub.4.sup., dihalogens, and halogenates.

3. The process according to claim 1, wherein the metal is Ag, Au, Pd, Pt, Rh, Ir, Tl, W, Re, Bi, Cu, Po, or Ru.

4. The process according to claim 1, wherein the electronics-grade, metallurgical-grade, or other silicon-comprising powders exhibit visible to near-infrared luminescence after etching.

5. The process according to claim 1, wherein particles are produced that are porosified completely through for particles with a thickness of up to about 75 m.

6. The process according to claim 1, wherein particles are produced that have a porous layer thickness of over 35 m on each side of a particle for particles with an initial thickness of greater than 75 m.

7. The process according to claim 1, wherein the yield of the etched silicon-comprising particle is variable over the range 1% to 85% by exercising control over one or more of the rate of oxidant injection, the molar ratio of oxidant injected to silicon, and the amount of metal deposited.

8. The process according to claim 1 with a yield in excess of 15%, wherein the metal loading is reduced below 0.1 mmol per g of silicon with respect to the surface area of the silicon powder.

9. The process according to claim 1 with a yield in excess of 15%, wherein etching leads directly to porous or hierarchical porous silicon production in which pillars/nanowires cover less than 10% of individual particles.

10. The process according to claim 8 with a yield in excess of 30%, wherein etching leads directly to porous or hierarchical porous silicon production in which pillar/nanowires cover less than 10% of individual particles.

11. The process according to claim 8 with a yield in excess of 30%, wherein the pore size distribution, specific surface area, and pore volume can be tuned by varying one or more of etch time, the amount of oxidant, the chemical identity of the metal catalyst, the doping/impurity level of the silicon, the reaction temperature, and post-etching parameters including drying technique.

12. The process according to claim 1 with a yield in excess of 15%, wherein chilled acetic acid is used during the nucleation and etching steps to enhance the uniformity of metal deposition, the yield of etched semiconductor, and the minimization of structural damage caused by gas bubble formation and capillary forces.

13. The process according to claim 8 with a yield in excess of 30%, wherein chilled acetic acid is used during the nucleation and etching steps to enhance the uniformity of metal deposition, to enhance the yield of etched semiconductor, and to minimize structural damage caused by gas bubble formation and capillary forces.

14. The process according to claim 8 with a yield in excess of 30%, wherein particles are produced that have specific surface areas in the range of 0.42 to 210 m.sup.2g.sup.1 as measured by the Brunauer-Emmett-Teller method.

15. The process according to claim 8 with a yield in excess of 30%, wherein particles are produced that have specific pore volumes in the range of 0.12 to 1.1 cm.sup.3g.sup.1, as measured by the Brunauer-Emmett-Teller method together with Barrett-Joyner-Halenda theory.

16. The process according to claim 8, wherein the electronics-grade, metallurgical-grade, or other silicon-comprising powders exhibit visible to near-infrared luminescence after etching.

17. A process of electroless and/or chemical etching to produce porous semiconductor particles, the process comprising the steps of: (a) providing semiconductor-comprising powders; (b) dispersing the semiconductor-comprising powders in a liquid; (b) injecting an etchant into the dispersion at a controlled rate; and (c) initiating through the action of the etchant nanostructure formation.

18. A process of electroless and/or chemical etching to produce a hierarchical porous semiconductor material comprising the steps of: (a) providing semiconductor-comprising powders; (b) dispersing the semiconductor-comprising powders in a liquid; (b) injecting an etchant into the dispersion at a controlled rate; (c) initiating through the action of the etchant nanostructure formation.

19. The process according to claim 17, wherein the porosified semiconductor particles produced are selected from silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, or Sb.sub.2Se.sub.3.

20. The process according to claim 18, wherein the hierarchical porous semiconductor particles produced are selected from silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, or Sb.sub.2Se.sub.3.

Description

BRIEF DESCRIPTION OF THE DRAWING

[0016] The invention is best understood from the following detailed description when read in connection with the accompanying drawing. Included in the drawing are the following figures:

[0017] FIG. 1(a) illustrates the ReEtch cycle for etching of silicon, Si;

[0018] FIG. 1(b) illustrates the injection MACE cycle for etching Si, denoted iMACE;

[0019] FIGS. 2(a)-(f) show that, by performing the deposition step with injection of the metal salt, metal deposition can be controlled and made more uniform;

[0020] FIGS. 3(a)-(f) compare of typical powder particle structures formed by high-load iMACE (HL-iMACE) and low-load iMACE (LL-iMACE);

[0021] FIG. 4 shows the pore size distribution of different Si powders after LL-iMACE as determined by nitrogen adsorption/desorption isotherm in conjunction with BET and BJH analysis;

[0022] FIGS. 5(a) and 5(b) demonstrates that the HL and LL regimes are characterized by decidedly different yield curves;

[0023] FIGS. 6(a)-(d) show that the yield, pore size distribution, specific surface area, and pore volume in LL-iMACE can be tuned by variation of the temperature, changing the impurity/doping level in Si, and changing the metal used as a catalyst; and

[0024] FIGS. 7(a) and 7(b) reflect the effect of the chemical identity of the metal catalyst on yield, BET surface area, and BJH pore volume.

DETAILED DESCRIPTION OF THE DISCLOSURE

[0025] FIG. 1(a) illustrates the ReEtch cycle for etching of silicon, Si. A vanadium ion in a +5 oxidation state, denoted V(V), injects a hole, h.sup.+, into the silicon valence band and is reduced to a vanadium ion in the +4 oxidation state, V(IV). The hole initiates the etching of silicon atoms to form a pore in the substrate. The product of the etching reaction is SiF.sub.6.sup.2. Injected hydrogen peroxide, H.sub.2O.sub.2, removes an electron from V(IV) to regenerate V(V) so that the cycle can begin again.

[0026] FIG. 1(b) illustrates the injection MACE cycle for etching Si, denoted iMACE. Injected H.sub.2O.sub.2 removes an electron from a metal nanoparticle, M, which then injects a hole into the silicon substrate. The hole initiates the etching of silicon forming the etch product SiF.sub.6.sup.2, to form a pore in the substrate.

[0027] Semiconductor dissolution and nanostructuring initiated by valence band hole injection is not limited to silicon but is a general process applicable to any semiconductor. The chemical identity of the first oxidant, Ox.sub.1, is a metal with a positive standard reduction potential, e.g., W, Re, Bi, Cu, Po, Ru, Hg, Ag, Au, Pd, Pt, Rh, Ir, and Tl. The chemical identity of the second oxidant, Ox.sub.2, may include, but is not limited to, H.sub.2O.sub.2, VO.sub.2.sup.+, Ce.sup.4+, nitrates (including HNO.sub.3 and Fe(NO.sub.3).sub.3), nitrites, NO.sub.2, NOBF.sub.4, NOHSO.sub.4, MnO.sub.4.sup., dihalogens (e.g., Br.sub.2 and I.sub.2), halogenates (e.g., IO.sub.3.sup.), IrCl.sub.6.sup.2, Fe.sup.3+, S.sub.2O.sub.8.sup.2, HCrO.sub.4.sup., ClO.sub.4.sup., Co.sup.3+, Ru(CN).sub.6.sup.3, and UO.sub.2.sup.+. Preferentially, the second oxidant is H.sub.2O.sub.2.

[0028] In certain embodiments, injection of Ox.sub.2 at a steady rate lowers the steady-state concentration of Ox.sub.2 during the reaction, which has the added benefit that it makes Ox.sub.2 less likely to dissolve the metal catalyst.

[0029] A number of semiconductors have a valence band maximum (VBM) that lies at or is less positive than an electrochemical potential of 1.8 V versus the standard hydrogen electrode (SHE), which is approximately equal to the standard electrode potential of H.sub.2O.sub.2, which is 1.78 V. This positioning of the valence band maximum facilitates rapid hole injection from the oxidant and the initiation of electroless etching. Therefore, the process described in this document can in principle be used to produce porosified and hierarchical semiconductors in, e.g., silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, and Sb.sub.2Se.sub.3 from electronics-grade, metallurgical-grade, or other silicon-comprising or semiconductor-comprising powders. Similarly, although the specific examples described below pertain to substrates that comprise silicon, the process is general to all semiconductors and semiconductor-comprising powders with an appropriately positioned valence band maximum.

[0030] It is the position of the valence band maximum with respect to the Nernstian potential of the oxidant E.sub.ox that is important. The Nernst equation, E.sub.ox=E(RT/zF)lnQ, defines this potential in terms of the standard potential E, gas constant R, temperature T, electron number z, Faraday constant F, and reaction quotient Q. Therefore, the Nernstian potential of the oxidant depends both on the choice of oxidant and control of the reaction conditions through Q.

[0031] FIGS. 2(a)-(f) show that, by performing the deposition step with injection of the metal salt, metal deposition can be controlled and made more uniform. SEM (a, b, d, e) and HAADF STEM (c,f) images are included of: (a-c) 4.8 mmol of deposited Ag, and (d-f) 0.025 mmol of deposited Ag on the surfaces of MG Si particles. The darker left sides and brighter right sides of FIG. 2(b) and FIG. 2(e) are backscattered and secondary electron images, respectively. The cross-sections in FIG. 2(c) reveal a thick layer of Ag, a roughened Si surface, and etch tracks formed during deposition. The cross-sections in FIG. 2(f) reveal small Ag particles confined to the near-surface region. The Pt layers shown in FIG. 2(c) and FIG. 2(f) were used to preserve surface morphology during ion-beam cross sectioning.

[0032] FIGS. 2(a)-(f) demonstrate the well-behaved deposition of metal onto silicon powder afforded by injection of the first oxidant, which contains a dissolved form of the metal. Under high-load (HL) conditions, as shown in FIGS. 2(a)-(c), the metal deposits as discreet particles as well as larger aggregates and dendrites. Some of the metal nanoparticles begin to etch into the silicon substrate during deposition. Under low-load (LL) conditions, as shown in FIGS. 2(d)-(f), the metal deposits uniformly as nanoparticles that are distributed randomly over the surface. The extent of etching into the silicon substrate is substantially less than under HL conditions and no dendrites are formed.

[0033] iMACE of Si powders was investigated by varying the amount of deposited Ag over a wide range, from 4.8 mmol to 0.001 mmol per 1 g of Si powder. Thus, the metal amount to surface area ratio, defined by MAR=n(Ag)/A.sub.Si, varied from 11.4 mmol.Math.m.sup.2 to 0.0024 mmol.Math.m.sup.2 for 44-75 m Si particles, where A.sub.Si=0.42 m.sup.2g.sup.1 is the Brunauer-Emmett-Teller (BET) specific surface area. Furthermore, should powder with a different size distribution be used as the staring material, it is the amount of metal deposited per unit area rather than per unit mass that is the parameter that distinguishes attainment of the HL versus LL regime. Such experiments indicate that Ag, Au, Pd, and Pt all exhibit efficient etching in both the HL and LL regimes. The experiments also indicate that Cu, because of its less positive E value, is more difficult to operate in the HL regime but etches efficiently in the LL regime.

[0034] After etching with a catalyst deposited in the HL or LL regime, the structure of the etched porous silicon particles and the structure of particles harvested from the etched particles were completely different, as demonstrated by the electron micrographs shown in FIGS. 3(a)-(f). FIGS. 3(a)-(f) compare typical powder particle structures formed by high-load iMACE (HL-iMACE, panels a-c) and low-load iMACE (LL-iMACE, panels d-f). The HL-iMACE of FIG. 3(a) shows that deposition of 3 mmol Ag per g Si then etching induced by H.sub.2O.sub.2 injection led to the formation of uniform, parallel etch track pores. FIG. 3(b) shows that parallel etch track pores with roughly 50-100 nm widths not pillars/nanowires were formed directly by HL-iMACE. FIG. 3(c) shows ultrasonic agitation cleaved silicon nanowires (elongated structures) from the HL-iMACE-etched substrate. The LL-iMACE image of FIG. 3(d) shows that deposition of 20 mol Ag per g Si then etching induced by H.sub.2O.sub.2 injection led to the formation of smaller randomly oriented pores. FIG. 3(e) shows that randomly oriented pores not pillars/nanowires were formed directly by LL-iMACE. FIG. 3(f) shows ultrasonic agitation cleaves irregular porous nanoparticles from the LL-iMACE-etched substrate.

[0035] In the HL regime, Ag atoms redistributed dynamically during etching between the deposited metal structures to form Ag nanoparticles in 50-100 nm range that created parallel etch track pores as they descended into the silicon particles under the influence of etching initiated by the reduction of the injected H.sub.2O.sub.2. In the LL regime, Ag atoms redistribution appeared to be much less important. Deposited Ag nanoparticles that were <50 nm created randomly oriented etch track pores as they descended into the silicon particles under the influence of etching initiated by the reduction of the injected H.sub.2O.sub.2. The cross sectional images in FIGS. 3(b) and 3(e) conclusively show that the particles are not covered by pillars/nanowires. Indeed, the coverage of silicon pillars/nanowires on all of the particles produced by iMACE under the conditions reported in this document is less than 10%.

[0036] The dependence of structural characteristics on the purity of the silicon powder was investigated as detailed in Table 1 below. The pore size distribution and the nature of the pores depended strongly on the impurity level. In both the HL regime and the LL regime, >10 nm etch track pores are formed for all grades of silicon. When using low-resistivity (i.e., highly doped) silicon powder, however, etching far removed from the metal catalyst was observed in addition to etch track pores. This is called remote etching. Remote etching leads to the formation of very small (<10 nm) mesopores. Importantly, the formation of these small pores is also correlated with the observation of visible photoluminescence in the orange to near-infrared range when excited by ultraviolet or blue irradiation. Any sample that is not initially photoluminescent can be made photoluminescent by regenerative electroless etching (ReEtching). The photoluminescence of a LL-iMACE etched sample can be made more intense by regenerative electroless etching (ReEtching).

TABLE-US-00001 TABLE 1 Particle size, Etch time, BET surface Pore volume, Sample m min Yield, % area, m.sup.2/g cm.sup.3/g MG 44-75 30 44.4 58.1 0.235 EG 44-75 30 37.9 40.1 0.177 MG 11-25 90 30.0 85.4 0.244 DW 11-25 90 21.0 65.2 0.134 ESMC10 2-10 90 19.6 60.8 0.359 ESPS30 11-30 90 66.4 33.7 0.177 UW 11-25 90 25.4 22.4 0.121

[0037] Table 1 summarizes the yields, surface areas, and pore volumes for powders milled to different sizes from different Si grades etched in the low load regime (LL-iMACE). The samples were MGmetallurgical grade Si (99.6%, polycrystalline); EGelectronics grade reclaimed wafer chunks; ESMC10metallurgical grade Si powder (99.999%, polycrystalline); ESPS30metallurgical grade Si powder (99.999%, polycrystalline); DWp+ single crystal Si wafer (B-doped, 10-20 m cm); and UWundoped wafer (>100 S.sub.2 cm). The amount of Ag was 0.025 mmol, and the Ag nucleation time was 15 min.

[0038] As demonstrated in FIG. 4, variation of the impurity/doping level in the silicon powder can be used to create porous silicon with one maximum in the pore size distribution in the 10-100 nm range as the result of etch track pore formation. Alternatively, hierarchically nanostructured porous silicon (hierarchical porous silicon) with a pore size distribution containing two maxima can be created as the result of both etch track pore formation and remote etching.

[0039] FIG. 4 shows the pore size distribution of different Si powders after LL-iMACE as determined by nitrogen adsorption/desorption isotherm in conjunction with BET and BJH analysis. For the details of the Si grades and etching parameters see Table 1. Si particles of different sizes and grades as indicated were etched with an etching time of 90 min.

[0040] FIGS. 5(a) and 5(b) demonstrate that the HL and LL regimes are characterized by decidedly different yield curves. By introducing the oxidant (H.sub.2O.sub.2) with an injection pump the yield was improved and could be systematically varied. The injection time was 40 min for HL-iMACE and 90 min for LL-iMACE. FIG. 5(a) shows, for HL-iMACE, a linear relationship between H.sub.2O.sub.2:Si molar ratio and yield was found with a low intercept at zero injected H.sub.2O.sub.2 of only 0.650.06 due to Si losses incurred by secondary reactions and etching during metal deposition. FIG. 5(b) shows, for LL-iMACE a linear relationship between H.sub.2O.sub.2:Si molar ratio and yield was found with an ideal intercept at zero injected H.sub.2O.sub.2 of only 0.970.04 due to an almost complete lack of Si losses incurred by secondary reactions and etching during metal deposition.

[0041] Several aspects of the data in FIGS. 5(a) and 5(b) are important. First, the HL regime has an intrinsically lower yield than the LL regime over the entire range of molar ratios. Second, the HL regime has a lower intercept at a molar ratio of zero, 656%, versus the LL regime with an intercept of 974%. In other words, the HL regime suffers from an intrinsically lower yield as the result of secondary reactions and etching during metal deposition. Third, the yield at a molar ratio of 0.9 is raised from 1-3% to 17% in the HL regime when the oxidant is injected over 30 min rather than all being added at the beginning of the etch. Fourth, the yield in the LL regime at a molar ratio of 0.9 when the oxidant is injected over 30 min exceeds 30%. Fifth, in both the HL and LL regimes, the yield is improved and can be systematically varied by using injection of the oxidant.

[0042] In FIGS. 6(a)-(d), the yield, pore size distribution, specific surface area, and pore volume in LL-iMACE were tuned by variation of the temperature and changing the metal used as a catalyst (MGmetallurgical grade Si (99.6%, polycrystalline); UWundoped wafer (>100 S.sub.2 cm)). The results in FIG. 6(a) and FIG. 6(b) are for a deposited silver (Ag) catalyst. The results in FIG. 6(c) and FIG. 6(d) are for a deposited gold (Au) catalyst.

[0043] In addition to the temperature at which etching is performed and the grade of the silicon powder, the effect of the chemical identity of the metal catalyst was investigated. As shown in FIGS. 7(a) and 7(b), five different metals, i.e., Cu, Ag, Au, Pd, and Pt, support efficient porosification in the LL-iMACE regime with yields in excess of 35%. Furthermore, by changing the metal catalyst the specific surface area and specific pore volume can be varied. Variation of the temperature during LL-iMACE with the various metals allows for further variations in the pore size distribution, specific surface area and pore volume.

[0044] FIG. 7(a) depicts the dependence of yield, BET surface area, and BJH pore volume from the metal catalyst used in LL-MACE of 11-25 m MG Si powders. The x axis shows the reduction potentials of the metal ions. FIG. 7(b) depicts BJH pore size distributions for the etched powders. Copper (Cu), silver (Ag), gold (Au), palladium (Pd), and platinum (Pt) all support porosification of the silicon powder. FIG. 7(a) demonstrates yield in excess of 30% with the use of all five metal catalysts; specific surface areas in the range of roughly 90-210 m.sup.2 g.sup.1 can be achieved; and specific pore volumes of roughly 0.15 to 0.44 cm.sup.2g.sup.1 can be achieved.

TABLE-US-00002 TABLE 2 Average size Average size Total pore of small of large volume, Metal pores, nm pores, nm cm.sup.3/g Ag 4.32 24.19 0.358 Pd 4.81 0.212 Pt 4.33 0.405 Au 4.66 18.16 0.431 Cu 4.54 0.267

[0045] Table 2 summarizes the average pore sizes and pore volumes calculated from pore size distributions for various metals used to catalyze LL-iMACE. The values displayed were derived from the same set of N.sub.2 adsorption data used to generate the graphs shown in FIGS. 7(a) and 7(b). Pore volume data for small pores were taken for sizes that are smaller than the local minimum (9 nm for Ag and Au etched samples). Data points for large pores were taken after the local minimum.

[0046] The following paragraphs summarize some of the embodiments of the present invention.

[0047] Disclosed is a process of producing porosified and/or hierarchical silicon comprising particles from electronics-grade, metallurgical-grade, or other silicon-comprising powders in which injection of an oxidant is used to initiate catalytic reduction of the oxidant at a deposited metal nanoparticle and in which the reduction initiates nanostructure formation. Oxidants include, but are not limited to, H.sub.2O.sub.2, VO.sub.2.sup.+ (from, e.g., dissolved V.sub.2O.sub.5), Ce.sup.4+, nitrates including HNO.sub.3 and Fe(NO.sub.3).sub.3, nitrites, NO.sub.2, NOBF.sub.4, NOHSO.sub.4, MnO.sub.4, dihalogens including Br.sub.2 and I.sub.2, halogenates including IO.sub.3.sup., IrCl.sub.6.sup.2, Fe.sup.3+, S.sub.2O.sub.8.sup.2, HCrO.sub.4.sup., ClO.sub.4.sup., Co.sup.3+, Ru(CN).sub.6.sup.3, or UO.sub.2.sup.+.

[0048] Also disclosed is a process to produce porosified and/or hierarchical silicon comprising particles from electronics-grade, metallurgical-grade, or other silicon-comprising powders that exhibit visible to near-infrared luminescence in which injection of an oxidant is used to initiate catalytic reduction of the oxidant at a deposited metal nanoparticle and in which the reduction initiates nanostructure formation. Oxidants include, but are not limited to, H.sub.2O.sub.2, VO.sub.2.sup.+ (from, e.g., dissolved V.sub.2O.sub.5), Ce.sup.4+, nitrates including HNO.sub.3 and Fe(NO.sub.3).sub.3, nitrites, NO.sub.2, NOBF.sub.4, NOHSO.sub.4, MnO.sub.4, dihalogens including Bra and I.sub.2, halogenates including IO.sub.3.sup., IrCl.sub.6.sup.2, Fe.sup.3+, S.sub.2O.sub.8.sup.2, HCrO.sub.4.sup., ClO.sub.4.sup., Co.sup.3+, Ru(CN).sub.6.sup.3, or UO.sub.2.sup.+.

[0049] A process is further disclosed to produce porosified and/or hierarchical silicon-comprising particles from electronics-grade, metallurgical-grade, or other silicon-comprising powders in which injection of H.sub.2O.sub.2 is used to introduce H.sub.2O.sub.2 that is catalytically reduced and in which Ag, Au, Cu, Pd, or Pt act as the catalyst that initiates nanostructure formation.

[0050] A process is further disclosed to produce porosified and/or hierarchical silicon-comprising particles from electronics-grade, metallurgical-grade, or other silicon-comprising powders that exhibit visible to near-infrared luminescence in which injection of H.sub.2O.sub.2 is used to introduce H.sub.2O.sub.2 that is catalytically reduced and in which Ag, Au, Cu, Pd, or Pt act as the catalyst that initiates nanostructure formation.

[0051] Further disclosed is a process to produce porosified and/or hierarchical semiconductor (e.g., silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, or Sb.sub.2Se.sub.3) particles from electronics-grade, metallurgical-grade, or other semiconductor-comprising powders in which injection of an oxidant is used to initiate catalytic reduction of the oxidant at a deposited metal nanoparticle and in which the reduction initiates nanostructure formation.

[0052] Still further disclosed is a process to produce porosified and/or hierarchical semiconductor (e.g., silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, or Sb.sub.2Se.sub.3) particles from electronics-grade, metallurgical-grade, or other semiconductor-comprising powders that exhibit visible to near-infrared luminescence in which injection of an oxidant is used to initiate catalytic reduction of the oxidant at a deposited metal nanoparticle and in which the reduction initiates nanostructure formation.

[0053] Another disclosed process produces porosified and/or hierarchical semiconductor (e.g., silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, or Sb.sub.2Se.sub.3) particles from electronics-grade, metallurgical-grade, or other semiconductor-comprising powders in which injection of H.sub.2O.sub.2 is used to introduce H.sub.2O.sub.2 that is catalytically reduced and in which Ag, Au, Cu, Pd, or Pt act as the catalyst that initiates nanostructure formation.

[0054] Yet another disclosed process produces porosified, pillared, and/or hierarchical semiconductor (e.g., silicon, silicon carbide, GaAs, GaP, CdS, CdSe, MoS.sub.2, Cu.sub.2O, Ce.sub.2O.sub.3, InVO.sub.4, Ta.sub.2N.sub.5, SnS.sub.2, Sb.sub.2S.sub.3, ZnSe, Ce.sub.2S.sub.3, In.sub.2S.sub.3, PbS, Sb.sub.2S.sub.3, CdTe, or Sb.sub.2Se.sub.3) particles from electronics-grade, metallurgical-grade, or other semiconductor-comprising powders that exhibit visible to near-infrared luminescence in which injection of H.sub.2O.sub.2 is used to introduce H.sub.2O.sub.2 that is catalytically reduced and in which Ag, Au, Cu, Pd, or Pt act as the catalyst that initiates nanostructure formation.

[0055] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon powder particles that are porosified completely through for particles with a thickness of smaller than and greater than 4 m, up to at least 75 m.

[0056] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon powders with a porous layer thickness of over 35 m on each side of a particle for particles with an initial thickness of greater than 75 m.

[0057] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous semiconductor powder particles that are porosified completely through for particles with a thickness of smaller than and greater than 4 m, up to at least 75 m.

[0058] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous semiconductor powders with a porous layer thickness of over 35 m on each side of a particle for particles with an initial thickness of greater than 75 m.

[0059] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon-comprising powder particles that are porosified completely through for particles with a thickness of smaller than and greater than 4 m, up to at least 75 m.

[0060] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon-comprising powders with a porous layer thickness of over 35 m on each side of a particle for particles with an initial thickness of greater than 75 m.

[0061] Disclosed is a process according to any one of the preceding summary paragraphs of producing hierarchical porous silicon in which HL-iMACE or LL-iMACE is used to create luminescent or non-luminescent porous silicon and ReEtching is used to introduce smaller pores within the walls of the larger pores.

[0062] Disclosed is a process according to any one of the preceding summary paragraphs of producing hierarchical porous silicon in which HL-iMACE or LL-iMACE is used to create luminescent or non-luminescent porous silicon and ReEtching is used to introduce luminescence centers.

[0063] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon powders with specific surface areas in the range of 0.42 to 210 m.sup.2g.sup.1, as measured by the BET method.

[0064] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon powders with specific pore volumes in the range of 0.12 to 1.1 cm.sup.3g.sup.1, as measured by the BET method together with Barrett-Joyner-Halenda (BJH) theory.

[0065] Disclosed is a process according to any one of the preceding summary paragraphs of producing porous silicon powders in which pillars/nanowires cover less than 10% of any individual particle.

[0066] Also disclosed is a process to produce porosified and/or hierarchical silicon-comprising particles from electronics-grade, metallurgical-grade, or other silicon-comprising powders in which continuous addition of an oxidant is used to control the rate of electroless etching, for example, stain etching, ReEtching, or metal assisted catalyzed etching (MACE), independent of the extent of electroless etching. Oxidants include, but are not limited to, H.sub.2O.sub.2, VO.sub.2.sup.+ (from, e.g., dissolved V.sub.2O.sub.5), Ce.sup.4+, nitrates including HNO.sub.3 and Fe(NO.sub.3).sub.3, nitrites, NO.sub.2, NOBF.sub.4, NOHSO.sub.4, MnO.sub.4, dihalogens including Bra and I.sub.2, halogenates including IO.sub.3.sup., IrCl.sub.6.sup.2, Fe.sup.3+, S.sub.2O.sub.8.sup.2, HCrO.sub.4, ClO.sub.4.sup., Co.sup.3+, Ru(CN).sub.6.sup.3, or UO.sub.2.sup.+.

[0067] Disclosed is a process to produce porosified and/or hierarchical silicon-comprising particles from electronics-grade, metallurgical-grade, or other silicon-comprising powders in which injection of an oxidant is used to control the rate of electroless etching, for example, metal assisted catalyzed etching (MACE), independent of the extent of electroless etching, and in which the pore size distribution, specific surface area, and pore volume can be tuned by varying one or more of etch time, the amount of oxidant (more specifically the oxidant to silicon molar ratio), the chemical identity of the metal catalyst, the doping/impurity level of the silicon, the reaction temperature, and post-etching parameters including drying technique.

[0068] Also disclosed is a process to produce porosified and/or hierarchical semiconductor-comprising particles from electronics-grade, metallurgical-grade, or other semiconductor-comprising powders in which continuous addition of an oxidant is used to control the rate of electroless etching, for example, stain etching, ReEtching, or metal assisted catalyzed etching (MACE), independent of the extent of electroless etching. Oxidants include, but are not limited to, H.sub.2O.sub.2, VO.sub.2.sup.+ (from, e.g., dissolved V.sub.2O.sub.5), Ce.sup.4+, nitrates including HNO.sub.3 and Fe(NO.sub.3).sub.3, nitrites, NO.sub.2, NOBF.sub.4, NOHSO.sub.4, MnO.sub.4, dihalogens including Br.sub.2 and I.sub.2, halogenates including IO.sub.3.sup., IrCl.sub.6.sup.2, Fe.sup.3+, S.sub.2O.sub.8.sup.2, HCrO.sub.4, ClO.sub.4.sup., Co.sup.3+, Ru(CN).sub.6.sup.3, or UO.sub.2.sup.+.

[0069] Disclosed is a process to produce porosified and/or hierarchical semiconductor-comprising particles from electronics-grade, metallurgical-grade, or other semiconductor-comprising powders in which injection of an oxidant is used to control the rate of electroless etching, for example, metal assisted catalyzed etching (MACE), independent of the extent of electroless etching, and in which the pore size distribution, specific surface area, and pore volume can be tuned by varying one or more of etch time, the amount of oxidant (more specifically the oxidant to silicon molar ratio), the chemical identity of the metal catalyst, the doping/impurity level of the silicon, the reaction temperature, and post-etching parameters including drying technique.

[0070] Although illustrated and described above with reference to certain specific embodiments and examples, the present invention is nevertheless not intended to be limited to the details shown. Rather, various modifications may be made in the details within the scope and range of equivalents of the claims and without departing from the spirit of the invention. It is expressly intended, for example, that all ranges broadly recited in this document include within their scope all narrower ranges which fall within the broader ranges. It is also expressly intended that the steps of the processes disclosed are not restricted to any particular order, unless otherwise noted above.