Device and method for switching an electrical system into standby mode

Abstract

A system, supplied by a power supply, is switched into standby mode by an electronic device that includes a charging input coupled to a charge voltage obtained from the voltage delivered by the power supply. A first input is coupled to the power supply and a power supply output is coupled to the system. A storage capacitive element is coupled to the charging input and configured to be charged by the charge voltage. A switching circuit, coupled between the first input and the power supply output, disconnects the power supply output from the first input when the voltage across the terminals of the storage capacitive element is higher than a threshold. A discharge circuit discharges the storage capacitive element so that the capacitor voltage becomes lower than the threshold. The switching circuit further re-connects the first input to the power supply output at the end of the discharge period.

Claims

1. A method for switching a system supplied by an electrical power supply source into standby mode, comprising: a) charging a storage capacitive element by a charge voltage obtained from a voltage delivered by the electrical power supply source; b) switching the system into standby mode by decoupling the system from the electrical power supply source in response to a value of a voltage across terminals of the storage capacitive element rising to a level that is higher than a threshold that is lower than the charge voltage; c) discharging the storage capacitive element for a discharge period in such a manner that the value of the voltage across the terminals of the storage capacitive element falls to become lower than the threshold; and d) re-coupling the electrical power supply source to the system at the end of the discharge period.

2. The method according to claim 1, further comprising adjusting the discharge period.

3. The method according to claim 2, wherein adjusting the discharge period comprises adjusting the charge voltage.

4. The method according to claim 2, wherein discharging the storage capacitive element is carried out via a charge flow capacitive element and wherein adjusting the discharge period comprises adjusting a capacitive value of the charge flow capacitive element.

5. The method according to claim 1, wherein discharging of the storage capacitive element is carried out via a charge flow capacitive element and further comprising partially discharging the storage capacitive element through the charge flow capacitive element in step a).

6. The method according to claim 1, further comprising cyclically executing the steps a) to d).

7. An electronic device configured to switch a system, supplied by an electrical power supply source, into standby mode, comprising: a charging input configured to be coupled to a charge voltage obtained from a voltage delivered by the power supply source; a first input configured to be coupled to the power supply source; a power supply output configured to be coupled to the system; a storage capacitive element coupled to the charging input and configured to be charged by the charge voltage; a switching circuit coupled between the first input and the power supply output and configured to decouple the power supply output from the first input in response to a value of the voltage across the terminals of the storage capacitive element rising to a level that is higher than a threshold which is lower than the charge voltage; and a discharge circuit configured to discharge the storage capacitive element for a discharge period in such a manner that the value of the voltage across the terminals of the storage capacitive element falls to become lower than the threshold; wherein the switching circuit is further configured to re-couple the first input to the power supply output at the end of the discharge period.

8. The device according to claim 7, wherein the discharge circuit comprises a charge flow capacitive element coupled between a first terminal of the storage capacitive element and a ground.

9. The device according to claim 8, further comprising an initialization capacitive element coupled between a first terminal of the storage capacitive element and the charging input.

10. The device according to claim 7, wherein the switching circuit comprises a depletion-mode transistor having a gate receiving the voltage at the first terminal of the storage capacitive element, a source coupled to the power supply source and a drain coupled to the output of device, the threshold being equal to a threshold voltage of said depletion-mode transistor.

11. The device according to claim 10, wherein the depletion-mode transistor comprises a PMOS transistor.

12. An electronic circuit, comprising: a power supply source; a system configured to be supplied by the power supply source; and an electronic device configured to switch the system into standby mode, comprising: a charging input configured to be coupled to a charge voltage obtained from a voltage delivered by the power supply source; a first input configured to be coupled to the power supply source; a power supply output configured to be coupled to the system; a storage capacitive element coupled to the charging input and configured to be charged by the charge voltage; a switching circuit coupled between the first input and the power supply output and configured to decouple the power supply output from the first input in response to a value of the voltage across the terminals of the storage capacitive element rising to a level that is higher than a threshold which is lower than the charge voltage; and a discharge circuit configured to discharge the storage capacitive element for a discharge period in such a manner that the value of the voltage across the terminals of the storage capacitive element falls to become lower than the threshold; wherein the switching circuit is further configured to re-couple the first input to the power supply output at the end of the discharge period.

13. The circuit according to claim 12, further comprising an adjustment circuit configured to adjust the discharge period.

14. The circuit according to claim 12, wherein the discharge circuit comprises a charge flow capacitive element coupled between a first terminal of the storage capacitive element and a ground.

15. The circuit according to claim 14, further comprising an adjustment circuit configured to adjust a capacitive value of the charge flow capacitive element.

16. The circuit according to claim 12, further comprising a control circuit configured to cyclically activating the charging of the storage capacitive element.

17. The circuit according to claim 12, wherein the system is a connected autonomous wireless system.

18. The circuit according to claim 7, wherein the switching circuit comprises a depletion-mode transistor having a gate receiving the voltage at the first terminal of the storage capacitive element, a source coupled to the power supply source and a drain coupled to the output of electronic device, the threshold being equal to a threshold voltage of said depletion-mode transistor.

19. The device according to claim 18, wherein the depletion-mode transistor comprises a PMOS transistor.

20. The method of claim 1, further comprising applying the voltage across terminals of the storage capacitive element to a control terminal of a transistor switch connected between the electrical power supply source and the system wherein b) switching occurs in response to the voltage across terminals of the storage capacitive element rising to cause a turn off of the transistor switch and d) re-coupling occurs in response to the voltage across terminals of the storage capacitive element falling to cause a turn on of the transistor switch.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) Other advantages and features will become apparent upon examining the detailed description of non-limiting embodiments and from the appended drawings in which:

(2) FIG. 1, previously described, illustrates an autonomous wireless system;

(3) FIG. 2 shows one example of an embodiment of an electrical circuit comprising a system and an electronic device for switching a system into standby mode;

(4) FIG. 3 illustrates one exemplary embodiment of the electronic device;

(5) FIG. 4 shows a charge flow element; and

(6) FIG. 5 illustrates power consumption of the system as a function of time.

DETAILED DESCRIPTION OF THE DRAWINGS

(7) Reference is made to FIG. 2 which shows one example of an embodiment of an electrical circuit CI comprising a system SYS and an electronic device DISP for switching a system SYS into standby mode. Here, the system is a connected autonomous wireless system.

(8) The system SYS comprises an electrical power source BATT, a module for managing the electrical power 10, a processing unit 20, a radio transmission module (Tx/Rx) 30, an antenna ANT and an operational module 40. Here, the electronic device DISP is incorporated into the module for managing the electrical power 10.

(9) A connection terminal B_BATT of the source BATT is connected to a first input E10 of the power management module 10.

(10) The electrical power source BATT supplies the electrical power needed for the operation of the system SYS and is, for example, a battery (LiOn).

(11) A terminal S102 of the power management module 10 is connected to an input terminal E20 of the processing unit 20, and a terminal Ec10 of the power management module 10 is connected to a terminal Sc201 of the processing unit 20.

(12) Terminals S103 and S104 of the power management module 10 are respectively connected to terminals E30 of the radio transmission module 30 and E40 of the operational module 40.

(13) A terminal S30 of the radio transmission module 30 is connected to the antenna ANT.

(14) The antenna ANT receives and emits signals, notably radio signals.

(15) The processing module 20 furthermore comprises two terminals Sc203 and Sc204 respectively connected to the terminals Ec30 of the radio transmission module 30 and Ec40 of the operational module 40 and incorporates an adjustment circuit comprising a power control circuit PWR and a control circuit MC configured for cyclically activating the charging of the storage capacitive element C1.

(16) The operational unit 40 is configured for performing one or more actions. It incorporates, for example, a pressure sensor making a pressure measurement and transmits the measured value to the processing unit 20 via the terminal Ec40.

(17) When the system operates in reception mode, in other words when the antenna ANT receives a signal, the radio transmission module 30 is configured for demodulating the signal received according to techniques well known to those skilled in the art and transmits the information received to the processing unit 20 which is configured for controlling the operational module 40 according to the signal received.

(18) When the system operates in transmission mode, in other words when the antenna ANT emits a signal, the radio transmission module 30 is configured for modulating the signal received from the processing unit 20 configured for processing the data supplied by the operational module 40 according to techniques well known to those skilled in the art.

(19) The power management module 10 is configured for supplying the processing unit 20 and the modules 30 and 40 during the operational phases of the system SYS in reception and transmission mode, and for setting the system SYS into standby mode during the standby phases at regular intervals, for example every 10 seconds.

(20) The power management module 10 here comprises the electronic device DISP and an electrical power repeater (PR) 50 configured for supplying the processing unit 20 and the modules 30 and 40 with electrical power.

(21) The electronic device DISP comprises a first connection terminal E connected to the terminal E10, a second terminal Ec connected to the terminal Ec10 and a power supply terminal S connected to a terminal E50 of the power repeater 50.

(22) The second terminal Ec is a charging input.

(23) The power repeater 50 comprises terminals S52, S53 and S54 respectively connected to the terminals S102, S103 and S104.

(24) The power repeater 50 may, for example, comprise circuitry for adapting the power supply voltage and/or current according to the electrical characteristics of each of the modules 30 and 40 and of the processing unit 20.

(25) The electronic device DISP further comprises a switching circuit T which will allow either the system SYS to be connected to the power supply source BATT for supplying the system, or the system to be disconnected from the power supply source so as to switch it into standby mode.

(26) FIG. 3 illustrates one exemplary embodiment of the electronic device DISP.

(27) The electronic device DISP comprises a discharge circuit MD, a storage capacitive element C1, an initialization capacitive element C2, the switching circuit T and a voltage source Vcc.

(28) A first terminal of the storage capacitive element C1 is coupled, on the one hand, to the charging input Ec via an initialization capacitive element C2, and on the other hand, to an input E.sub.MD of the discharge circuit MD.

(29) As a variant, the first terminal of the storage capacitive element C1 could be coupled directly to the charging input Ec.

(30) The charging input Ec is connected to the terminal B_BATT of the power supply source BATT via the control circuit PWR.

(31) The control circuit PWR is configured for controlling the charge voltage V.sub.CH of the storage element C1 for a time T.sub.CH, for example of one second, and are for example incorporated in the form of software into the processing unit 20.

(32) The control circuit PWR can, for example, be implemented using a microcontroller, but may take the form of any device capable of controlling the charge voltage of the element C1.

(33) The unit 20 is further configured for controlling the control circuit PWR.

(34) The processing unit 20 is implemented, for example, using a microcontroller, but may take the form of any device capable of processing the data supplied by the modules 30 and 40, capable of controlling the module 40 and of supplying information to the module 30, and incorporating the control circuit PWR into the embodiment described. This may notably be a microprocessor.

(35) The discharge circuit MD is configured for discharging the storage capacitive element C1 by tunnel effect for a time T.sub.0, in the range for example between one minute and twenty-four hours.

(36) The switching circuit T is preferably a depletion-mode PMOS transistor.

(37) Nevertheless, the use of a depletion-mode NMOS transistor would also be possible.

(38) The first terminal of the storage capacitive element C1 is connected to the gate G of the transistor for the switching circuit T.

(39) The transistor for the switching circuit T is conducting when the value of its threshold voltage V.sub.GS is lower than a threshold Vthreshold, for example 3 volts. The transistor is turned off when the voltage V.sub.GS is higher than the threshold Vthreshold.

(40) The source ST of the transistor for the switching circuit T is connected to the terminal E10 and the drain of the transistor for the switching circuit T is connected to the terminal S.

(41) The switching circuit T is connected between the first input E and the power supply output S and is configured for disconnecting the output S from the first input E when the value of the voltage V.sub.C1 across the terminals of the element C1 is higher than the threshold Vthreshold.

(42) The switching circuit T is further configured for re-connecting the input E10 to the output S when the voltage V.sub.C1 across the terminals of the element C1 is lower than the threshold Vthreshold.

(43) A second terminal of the storage capacitive element C1 is connected to a variable voltage source Vcc.

(44) The discharge circuit MD comprises a charge flow capacitive element C3, a first terminal B1 of which is connected to a ground GND and a second terminal B2 of which is connected to the input E.sub.MD.

(45) The capacitive element C1 has a charge retention capacity greater than that of C3, and the capacitive element C2 has a charge retention capacity greater than that of C3, but less than that of the element C1.

(46) The capacitive elements C1, C2 and C3 form a circuit allowing electrical charges to be retained in a controllable manner for a given time. The capacities of the elements C1, C2 and C3 depend on the implementation technology. By way of example, the capacitance of the storage capacitive element C1 is in the range between 10 and 100 picofarads, the capacity of the initialization capacitive element C2 is in the range between 10 and 100 femtofarads and the capacitance of the charge flow capacitive element C3 is in the range between 1 and 5 femtofarads.

(47) One role of the storage capacitive element C1 is to store electrical charges.

(48) One role of the initialization capacitive element C2 is to allow an injection of charges into the storage capacitive element C1, while avoiding the stresses that would result, for the charge flow element C3, of a direct charging of the storage element C1 by the application of a power supply voltage across its terminals.

(49) One role of the charge flow capacitive element C3 is to discharge the storage element C1 relatively slowly with respect to a direct connection of the element C1 to ground GND. The element C3 is designed to allow charges to flow away via tunnel effect.

(50) FIG. 4 shows one exemplary embodiment of the charge flow element C3 such as described in the French Patent application publication number 2,981,190 (incorporated by reference).

(51) The element C3 is formed from a semiconductor substrate 200, for example made of silicon, onto which an insulating layer 201 is deposited, for example of silicon oxide of the Shallow Trench Isolation (STI) type.

(52) On top of this layer 201 is a first level of polycrystalline silicon P1 comprising a lower electrode 202 and a connection contact B2. The electrode 202 is coated with a dielectric layer 203 comprising a oxide-nitride-oxide dielectric stack for example of the ONO (silicon oxidesilicon nitride silicon oxide) type at least one region of which 203b is thinner than the other regions 203a and 203c of the layer 203, and designed to allow charges to flow by tunnel effect.

(53) The layer 203 is covered by a second level of polycrystalline silicon P2 comprising an upper electrode 204 and a connection point B1.

(54) The thickness of the dielectric regions 203a, 203b and 203c of the layer 203 determines the time for discharging the storage capacitive element C1.

(55) Those skilled in the art will be able to adjust the thickness of the regions of the layer 203 according to the value of the capacitance of the elements C1 and C2 and of the charge voltage of the element C1 delivered by the control circuit PWR in such a manner that the voltage V.sub.GS is higher than the threshold Vthreshold for the duration T.sub.0 then lower than the threshold Vthreshold for a duration T.sub.0 plus T.sub.CH.

(56) FIG. 5 illustrates one exemplary embodiment of the device DISP illustrating the power consumption P of the system SYS as a function of time t.

(57) It is assumed that the storage element C1 is discharged at the initial time, in other words at t equal to 0. The voltage V.sub.GS is lower than the Vthreshold, the transistor T is conducting and the source BATT supplies the system SYS.

(58) In a first step for charging the storage capacitive element C1 by the power supply source BATT, of duration T.sub.CH, the control circuit PWR charges the storage capacitive element C1 by applying the charge voltage V.sub.CH higher than the threshold Vthreshold, for example a voltage of 12 volts. The potential Vcc is for example ground.

(59) During this step, the storage capacitive element C1 is partially discharged through the charge flow capacitive element C3. This partial discharge leads to an increase in the time T.sub.CH to reach the threshold Vthreshold.

(60) According to another possible embodiment, in order to charge the element C1, the potential on the terminal Ec and the potential Vcc can respectively take positive and negative values with respect to ground GND, for example +6 volts and 6 volts, respectively.

(61) During this step, the source BATT delivers a power P1 equal for example to a few milliwatts to the system SYS.

(62) In a second step for disconnection of the electrical power supply source BATT, when the value of the voltage V.sub.C1 across the terminals of the storage capacitive element C1 is higher than the threshold Vthreshold at the time T.sub.CH, the transistor T is turned off. The source BATT is electrically disconnected from the system SYS except for the remaining leakage current I.sub.OFF of the transistor T. As a consequence, the source BATT delivers a power P0 to the system SYS corresponding to the current I.sub.OFF and lower than the nominal power for supplying the system SYS.

(63) The system SYS is no longer powered and is in standby mode. The element C1 is no longer supplied by the means PWR.

(64) The power consumption P0 of the system SYS is reduced to a few tenths of microwatts.

(65) Then, in a step for discharging the storage capacitive element C1, the storage element C1 is discharged in a controlled manner through the charge flow element C3.

(66) The charge voltage V.sub.CH, the capacitances of the capacitive elements C1, C2 and C3, and the transistor threshold voltage T have been dimensioned in such a manner that the voltage V.sub.C1 across the terminals of the element C1 is lower than the threshold Vthreshold at the end of a period T.sub.1 starting from the discharge step, in other words at the time T.sub.0 plus T.sub.CH.

(67) In a step for re-connection of the electrical power supply source when the value of the voltage V.sub.C1 across the terminals of the storage capacitive element C1 is lower than the threshold Vthreshold, at the time T.sub.0 plus T.sub.CH, the transistor T is conducting. The source BATT is electrically re-connected to the system SYS. The source BATT delivers a power P1 to the system SYS.

(68) When the storage capacitive element C1 is completely discharged through the charge flow capacitive element C3, the control circuit PWR charges the storage capacitive element C1 by applying the voltage V.sub.CH.

(69) During this period, the system is in reception mode, and receives, for example, instructions for measuring a pressure.

(70) At the time T.sub.1, the system SYS goes into transmission mode and transmits the value of the pressure measurement. At this time, the system SYS consumes a power P.sub.T, for example of a few watts. The duration of transmission is very short with respect to the duration T.sub.CH.

(71) When the value of the voltage V.sub.C1 across the terminals of the storage capacitive element C1 is higher than the threshold Vthreshold at the time T.sub.0 plus twice T.sub.CH, the transistor T is turned off and a new cycle begins.

(72) The duration T.sub.0 is adjusted according to the use of the system SYS.

(73) For a given configuration of elements C1, C2 and C3, the duration T.sub.1 is adjustable by modifying the charge voltage of the capacitive element C1. The processing unit 20 is configured for modifying the charge voltage.

(74) According to another embodiment, the duration T.sub.0 is modifiable by modifying the threshold voltage V.sub.GS of the transistor T, notably by biasing the transistor T.

(75) According to another embodiment, the duration T.sub.0 is modifiable by replacing the charge flow capacitive element C3 with a network of switched charge flow capacitive elements.

(76) The processing unit 20 comprises an adjustment circuit MA for connecting in series the switched charge flow capacitive elements. The higher the number of elements connected in series, the longer will be the duration T.sub.0.

(77) It goes without saying that the processing unit 20 can force the continuous operation of the system SYS, in other words control the control circuit PWR in such a manner that the voltage V.sub.C1 remains below Vthreshold.

(78) Advantageously, no clock is required for timing the duration T.sub.0 and re-starting the system at the end of this duration.

(79) The device DISP disconnects the electrical power supply source BATT from the system SYS during the standby phase of duration T.sub.0 considerably reducing the power consumption of the system SYS. The device thus forms a pseudo clock signal generator whose pulses have a duration T.sub.CH and are separated by T.sub.0.

(80) Furthermore, a charge flow capacitive element C3 has been described hereinabove that allows a partial discharge of the storage capacitive element C1 during the charging step. The charge flow capacitive element C3 could also have been disconnected during the charging step and the element C3 re-connected during the discharge step.