Solar cell stack

Abstract

Solar cell stack comprising III-V semiconductor layers, which includes a first subcell having a first band gap and a first lattice constant and which includes a second subcell having a second band gap and a second lattice constant, and which includes an intermediate layer sequence disposed between the two solar cells. The intermediate layer sequence including a first barrier layer and a first tunnel diode and a second barrier layer, and the layers being arranged in the specified order. The tunnel diode includes a degenerate n+ layer having a third lattice constant and a degenerate p+ layer having a fourth lattice constant, the fourth lattice constant being smaller than the third lattice constant, and the first band gap being smaller than the second band gap, and the p+ layer having a different material composition than the n+ layer.

Claims

1. A solar cell stack formed of III-V semiconductor layers, the solar cell stack comprising: a first subcell having a first band gap and having a first lattice constant; and a second subcell having a second band gap and having a second lattice constant; and an intermediate layer sequence disposed between the first subcell and the second subcell, the intermediate layer sequence including a first barrier layer and a tunnel diode and a second barrier layer, the tunnel diode including a degenerate n+ layer having a third lattice constant and a degenerate p+ layer having a fourth lattice constant, the fourth lattice constant being smaller than the third constant, and the first band gap being smaller than the second band gap, and the p+ layer having a different material composition than the n+ layer, wherein the p+ layer contains at least 5 atomic percent of indium and contains carbon as the dopant, wherein the layers of the tunnel diode and the other layers of the intermediate layer sequence are not strain-compensated with respect to each other, and wherein the first subcell and the second subcell are lattice-matched to each other, and the degenerate p+ layer has a lattice mismatch of at least 0.5%, and the lattice constant of the p+ layer has a smaller lattice constant than the first lattice constant and the second lattice constant, and the third lattice constant of the degenerate n+ layer is lattice-matched to the first lattice constant or to the second lattice constant.

2. The solar cell stack according to claim 1, wherein the degenerate p+ layer of the tunnel diode has a lattice mismatch between 0.5% and 2.0% with respect to the degenerate n+ layer of the tunnel diode.

3. The solar cell stack according to claim 1, wherein the degenerate p+ layer of the tunnel diode comprises an AlInGaAs material composition or is made up of a material composition of AlInGaAs, the carbon concentration in the material being greater than 1E19 cm.sup.3.

4. The solar cell stack according to claim 1, wherein the indium content of the degenerate p+ layer of the tunnel diode, made up of AlInGaAs, is between 5% 5 atomic percent and 20% 20 atomic percent, and the aluminum content of the degenerate p+ layer of the tunnel diode is between 10% and 80%.

5. The solar cell stack according to claim 1, wherein the lattice constant of the degenerate p+ layer of the tunnel diode is between 5,674 and 5,734 .

6. The solar cell stack according to claim 1, wherein the degenerate p+ layer of the tunnel diode does not contain any antimony or up to a maximum of 5 atomic percent of antimony.

7. The solar cell stack according to claim 1, wherein the degenerate n+-conducting layer of the tunnel diode is made up of a compound of InGaP or AlInGaP or AlInP and is doped with tellurium, silicon, selenium or germanium, and the lattice constant is between 5,714 and 5,785 .

8. The solar cell stack according to claim 7, wherein the indium content of the degenerate n+ layer of the tunnel diode is between 63 and 80 atomic percent, and the aluminum content is up to 37%.

9. The solar cell stack according to claim 1, wherein the solar cell stack comprises a Ge or GaAs substrate.

10. The solar cell stack according to claim 9, wherein the Ge substrate includes an n+ layer and forms a Ge subcell as the bottom subcell.

11. The solar cell stack according to claim 1, the solar cell stack further comprising: a plurality of tunnel diodes including the tunnel diode, one of the plurality of tunnel diodes being situated between two subcells in each case in the solar cell stack, three of at least four subcells being disposed above a metamorphic buffer in the solar cell stack.

12. The solar cell stack according to claim 1, the solar cell stack further comprising: a plurality of tunnel diodes including the tunnel diode, one of the plurality of tunnel diodes being situated once between a metamorphic buffer and subcells located thereover in the solar cell stack and being situated once to twice between two adjacent subcells in the solar cell stack, three of at least four subcells in the solar cell stack being disposed above the metamorphic buffer.

13. The solar cell stack according to claim 1, the solar cell stack further comprising: a plurality of tunnel diodes including the tunnel diode, one of the plurality of tunnel diodes being situated between two subcells in each case in the solar cell stack, four of at least five subcells in the solar cell stack being disposed above the metamorphic buffer.

14. The solar cell stack according to claim 1, the solar cell stack further comprising: a plurality of tunnel diodes including the tunnel diode, one of the plurality of tunnel diodes being situated once between a metamorphic buffer and the subcell located thereover in the solar cell stack and being situated once to three times between two adjacent subcells in the solar cell stack, four of at least five subcells being disposed above the metamorphic buffer in the solar cell stack.

15. The solar cell stack according to claim 1, wherein layers of a metamorphic buffer in the second specific embodiment are made up of material compositions of InGaAs and/or AlInGaAs and/or InGaP, and the metamorphic buffer has a sequence of at least three layers, and the lattice constant increases from layer to layer in the sequence in the direction of the second subcell, and the lattice constants of the layers of the metamorphic buffer being larger than the lattice constant of the first subcell, and one layer of the metamorphic buffer having a fifth lattice constant, and the fifth lattice constant being larger than the lattice constant of the second subcell.

16. The solar cell stack according to claim 1, wherein the p+ layer of the tunnel diode is not strain-compensated by a subsequent layer in the solar cell stack.

17. The solar cell stack according to claim 1, wherein the solar cell stack has a monolithic design.

18. The solar cell stack according to claim 1, wherein the tunnel diode is arranged between the first barrier layer and the second barrier layer.

19. A solar cell stack formed of III-V semiconductor layers, the solar cell stack comprising: a first subcell having a first band gap and having a first lattice constant; and a second subcell having a second band gap and having a second lattice constant; and an intermediate layer sequence disposed between the first subcell and the second subcell, the intermediate layer sequence including a first barrier layer and a tunnel diode and a second barrier layer, the tunnel diode including a degenerate n+ layer having a third lattice constant and a degenerate p+ layer having a fourth lattice constant, the fourth lattice constant being smaller than the third constant, and the first band gap being smaller than the second band gap, and the p+ layer having a different material composition than the n+ layer, wherein the p+ layer contains at least 5% 5 atomic percent of indium and contains carbon as the dopant, wherein the layers of the tunnel diode and the other layers of the intermediate layer sequence are not strain-compensated with respect to each other, and wherein a metamorphic buffer is formed between the first subcell and the second subcell, the p+ layer of the tunnel diode not being lattice-matched to either the first subcell or to the second subcell, and the fourth lattice constant being between the first lattice constant and the second lattice constant, the degenerate n+ layer being lattice-matched to the first subcell or to the second subcell.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, and thus, are not limitive of the present invention, and wherein:

(2) FIG. 1 shows a solar cell stack comprising two subcells and comprising one tunnel diode according to the invention;

(3) FIG. 2 shows a diagram having a qualitative relationship between the indium and carbon content as well as the transparency and relaxation probability for the degenerate p+ layer of the tunnel diode;

(4) FIG. 3 shows a solar cell stack comprising two subcells and comprising one tunnel diode according to the invention and one metamorphic buffer;

(5) FIG. 4 shows a solar cell stack comprising three subcells and comprising two tunnel diodes according to the invention;

(6) FIG. 5 shows a solar cell stack comprising two subcells and comprising two tunnel diodes according to the invention and one tunnel diode;

(7) FIG. 6 shows a solar cell stack comprising four subcells and comprising two tunnel diodes according to the invention and one tunnel diode and one metamorphic buffer; and

(8) FIG. 7 shows a solar cell stack comprising five subcells and comprising three tunnel diodes according to the invention and one tunnel diode and one metamorphic buffer.

DETAILED DESCRIPTION

(9) FIG. 1 shows a solar cell stack ST comprising a first subcell SC1 and a second subcell SC2 and comprising a tunnel diode TD1 according to the invention. Solar cell stack ST predominantly comprises III-V semiconductor layers. Light incidence L takes place through second solar cell SC2.

(10) The size of lattice constant a is depicted by an arrow below illustrated solar cell stack ST. In other words, the illustrated lateral extension of the individual layers, i.e. the extension in the direction of the arrow, corresponds to the size of the lattice constant.

(11) First subcell SC1 has a first band gap having a first lattice constant. Second subcell SC2 has a second band gap having a second lattice constant. Second subcell SC2 preferably has a band gap which is equal in size to or larger than first subcell SC1.

(12) An intermediate layer sequence ZF is disposed between the two subcells SC1 and SC2. Intermediate layer sequence ZF includes a first barrier layer B1 and tunnel diode TD1, which includes a degenerate n+ layer having a third lattice constant and a degenerate p+ layer having a fourth lattice constant, and a second barrier layer B2, the layers being arranged in the specified order.

(13) The fourth lattice constant is smaller than the third lattice constant. The first band gap is also smaller than the second band gap. The degenerate p+ layer has a different material composition that the degenerate n+ layer. In addition, the p+ layer has a smaller lattice constant with a lattice mismatch of at least 0.5% to the n+ layer.

(14) The layers of tunnel diode TD1 and the other layers of intermediate layer sequence ZF, i.e. the two barrier layers B1 and B2, are not strain-compensated with respect to each other.

(15) In the present case, the degenerate p+ layer has indium as well as carbon as the dopant.

(16) In the present specific embodiment, which is referred to as the first alternative, first subcell SC1 and second subcell SC2 are lattice-matched to each other, i.e. both lattice constants are the same. The degenerate n+ layer is also lattice-matched to the two subcells SC1 and SC2.

(17) As a result, solar cell stack ST has a tensile strain induced with the aid of the degenerate p+ layer.

(18) In the illustration in FIG. 2, the qualitative relationship between the indium and carbon content and the relaxation probability is shown for the degenerate p+ layer of the tunnel diode.

(19) In the diagram, the abscissa qualitatively represents the indium content, while the ordinate reflects qualitative carbon content C and crack probability WC.

(20) The solid line represents active carbon content C as a function of the indium content. The dashed line represents crack probability WC as a function of the indium content.

(21) Transparency TV of the p+ layer as a function of the indium content is shown qualitatively by the dash-dot line.

(22) In the event that an indium content close to 0% in the p+ layer of the tunnel diode is selected, the p+ layer has a high carbon doping. At the same time, this material is very far removed from lattice match LM to at least one of the adjacent subcells, so that crack probability WC is also very high. Transparency TV of the p+ layer, however, is high with a indium content close to 0%.

(23) In the opposite case, the p+ layer having a high indium content is lattice-matched LM to at least one of the adjacent subcells. Accordingly, the carbon doping and the crack probability are minimized, so that the tunnel diode does not greatly disturb the crystal but no longer has a sufficient current carrying capacity.

(24) At the same time, transparency TV of the p+ layer in the lattice-matched case is low, so that the input light is unfavorably absorbed to a greater degree in this layer.

(25) The degenerate p+ layer of the tunnel diode according to the invention is selected in terms of the indium content at point NF in such a way that both a sufficiently high carbon doping is incorporated into the material and a low crack formation probability exists, and a sufficiently high transparency is simultaneously ensured.

(26) It is crucial that the dependency of the crack formation probability as well as the dependency of the carbon doping and the dependency of the transparency depend on the In content in different qualitative ways.

(27) In the illustration in FIG. 3, a solar cell stack ST comprising two subcells SC1 and SC2 and comprising a tunnel diode TD1 according to the invention and comprising a metamorphic buffer MP are shown according to a second alternative. Only the differences from the illustration in FIG. 1 are explained below.

(28) First subcell SC1 has a smaller lattice constant than second subcell SC2.

(29) A metamorphic buffer MP is formed between first subcell SC1 and second subcell SC2. In the present case, the metamorphic buffer includes a first layer S1 disposed immediately above first subcell SC1 and a second layer S2 and a third layer S3 and a fourth layer S4 and a fifth layer S5, layers S1 through S5 being arranged in the specified order.

(30) First layer S1 is lattice-matched to first subcell SC1. Fifth layer S5 is lattice-matched to second subcell SC2. Second layer S2 has a larger lattice constant than first layer S1. Third layer S3 has a larger lattice constant than second layer S2. Fourth layer S4 has a larger lattice constant than third layer S3, while the lattice constant of fifth layer S5 is smaller than the lattice constant of fourth layer S4.

(31) It should be noted that metamorphic buffers MP may also be formed with more or fewer than five layers.

(32) Tunnel diode TD1 is disposed between metamorphic buffer MP and second subcell SC2.

(33) The degenerate n+ layer of tunnel diode TD1 is lattice-matched to second subcell SC2. The degenerate p+ layer of tunnel diode TD1 is not lattice-matched to either first subcell SC1 or to second subcell SC2.

(34) A solar cell stack ST comprising three subcells SC1 through SC3 and comprising two tunnel diodes TD1 according to the invention is shown in the illustration in FIG. 4. Only the differences from the illustration in FIG. 1 are explained below.

(35) All three subcells SC1 through SC3 of solar cell stack ST are lattice-matched to each other.

(36) Another intermediate layer sequence comprising another first barrier layer B1 and another tunnel diode TD1 and another second barrier layer B2 is disposed above second subcell SC2.

(37) A third subcell SC3 is disposed above the additional intermediate layer sequence. Light incidence L takes place through third subcell SC3.

(38) Due to the fact that two strained tunnel diodes TD1 are integrated, the tensile strain induced with the aid of the two p+ layers is added.

(39) A solar cell stack ST comprising four subcells SC1 through SC4 and comprising two tunnel diodes TD1 according to the invention and one unstrained tunnel diode TDLM is shown in the illustration in FIG. 5. Only the differences from the illustration in FIG. 4 are explained below.

(40) A fourth subcell SC4 is disposed above the additional intermediate layer sequence. Light incidence L takes place through fourth subcell SC4. All four subcells SC1 through SC4 of solar cell stack ST are lattice-matched to each other.

(41) An unstrained tunnel diode TDLM is disposed between second subcell SC2 and third subcell SC3. Both degenerate layers of tunnel diode TDLM are lattice-matched to subcells SC1 through SC4.

(42) Due to the fact that two strained tunnel diodes TD1 are integrated, the tensile strain induced with the aid of the two p+ layers is added, like in the specific embodiment illustrated in FIG. 4.

(43) To illustrate the lattice match, the course of the height of the lattice constant is also shown to the right of the representation of solar cell stack ST. It is apparent that a tensile strain results in each of the two strained tunnel diodes TD1, so that the solar cell stack as a whole has the sum of the tensile strains from the two strained tunnel diodes TD1 at least in a first approximation.

(44) A solar cell stack ST comprising four subcells SC1 through SC4 and comprising two tunnel diodes TD1 according to the invention and one metamorphic buffer MP is shown in the illustration in FIG. 6. Only the differences from the illustration in FIG. 3 and FIG. 5 are explained below.

(45) The three subcells SC2 through SC4 of solar cell stack ST are lattice-matched to each other above metamorphic buffer MP.

(46) Tunnel diode TDLM is disposed between first subcell SC1 and metamorphic buffer MP.

(47) A first strained tunnel diode TD1 is disposed between second subcell SC2 and third subcell SC3, and another second strained tunnel diode TD1 is disposed between third subcell SC3 and fourth subcell SC4.

(48) In the illustration of the course of lattice constant a to the right of the stack, it is clearly apparent that the compressive strain induced by the large lattice constant of fourth layer S4 of metamorphic buffer MP may be easily compensated, at least partially or completely, without any additional layers, with the aid of the two tensilely strained tunnel diode layers of TD1.

(49) A solar cell stack ST comprising five subcells SC1 through SC5 and comprising three tunnel diodes TD1 according to the invention and one metamorphic buffer MP and one unstrained tunnel diode TDLM is shown in the illustration in FIG. 7. Only the differences from the illustration in FIG. 6 are explained below.

(50) Another lattice-matched, fifth subcell SC5 is formed above fourth subcell SC4. In other words, second subcell SC2, up to and including fifth subcell SC5, of solar cell stack ST are lattice-matched to each other.

(51) Another third strained tunnel diode TD1 is disposed between fourth subcell SC4 and fifth subcell SC5.

(52) In the illustration of the course of lattice constant a to the right of the stack, it is apparent that the compressive strain induced by the large lattice constant of fourth layer S4 of metamorphic buffer MP may be easily compensated, at least partially or completely, without any additional layers, with the aid of the three tensilely strained tunnel diode layers of TD1.

(53) A first metal contact connecting layer M1, which covers the entire surface, is formed on the underside of solar cell stack ST. An anti-reflection layer AR is applied with the aid of a mask process on the upper side of solar cell stack ST, i.e. the side on which light L first strikes solar cell stack ST.

(54) The anti-reflection layer is interrupted for the formation of a finger-like printed conductor structure. The printed conductor structure includes an electrically conductive terminating layer CP disposed on the upper side of fifth subcell SC5 and a second metal contact connecting layer M2 formed above the connecting layer.

(55) It is understood that it is advantageous to dispose a distributed Bragg reflector below a subcell to increase the radiation stability in the aforementioned specific embodiments. Integrating a distributed Bragg reflector makes it possible to reduce the layer thicknesses of the particular subcell by at least 30% compared to a subcell without a distributed Bragg reflector.

(56) The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications as would be obvious to one skilled in the art are to be included within the scope of the following claims.