Method for the deposition of an organic material

Abstract

The present invention relates to a method for the deposition of at least one layer of an organic material on a substrate by (a) providing a source of a solid organic material in an atmosphere at a pressure comprised between 50 and 200 kPa, (b) heating said organic material to a first temperature to produce a vapor of said organic material, (c) exposing at least one surface of a substrate having a second temperature lower than said first temperature to said vapor to deposit organic material from said vapor onto said at least one surface of said substrate.

Claims

1. A method for depositing at least one layer of an organic material onto a substrate, the method comprising heating, in a deposition chamber, a source of a solid organic material in an atmosphere comprising air at a pressure of from 50 to 200 kPa to a first temperature to produce a vapor of the organic material, and depositing, in the same deposition chamber, the organic material from the vapor onto at least one surface of the substrate exposed to the vapor and having a second temperature lower than the first temperature, wherein no carrier gas is used in the method.

2. A method for producing an electronic device, the method comprising depositing the at least one layer of the organic material on the substrate by the method of claim 1.

3. The method according to claim 2, wherein the electronic device is an organic electronic device.

4. The method according to claim 1, wherein the at least one layer of the organic material is selected from the group consisting of an organic semiconducting layer, a dielectric or an insulating layer, a layer of at least one surface modifying agent, a layer with electron-conducting properties, a layer of a hole-conducting material, an exciton- and/or electron-conducting layer, a multiplication layer, a hole-injecting layer, a hole-transporting layer, a light-emitting layer, an electron-transporting layer, an electron-injecting layer, an encapsulation layer, a light-absorbing layer, a sensor layer, a photosensitive layer, a barrier layer, and a self-assembled monolayer.

5. The method according to claim 1, wherein the at least one layer of the organic material is an organic semiconducting layer in an organic field effect transistor, an organic solar cell, or an organic light emitting diode.

6. The method according to claim 1, wherein the pressure is from 80 to 120 kPa.

7. The method according to claim 1, wherein the pressure is ambient pressure.

8. The method according to claim 1, wherein the first temperature and the second temperature are both higher than 20 C.

9. The method according to claim 1, wherein the first temperature is from 20 to 350 C.

10. The method according to claim 1, wherein the second temperature is from 20 to 340 C.

11. The method according to claim 1, wherein a difference between the first temperature and the second temperature is from 10 to 330 C.

12. The method according to claim 1, wherein the atmosphere comprises a gas or a gas mixture that is inert towards the organic material.

13. The method according to claim 1, wherein the substrate is moved through the vapor.

14. The method according to claim 13, wherein the substrate is moved through areas with different concentration of the organic material in the vapor.

15. The method according to claim 13, wherein the substrate is repeatedly moved through the vapor.

16. The method according to claim 1, wherein the substrate is arranged above the source of the solid organic material.

17. The method according to claim 1, wherein a distance between the source and the substrate is from 0.1 to 20 mm.

18. The method according to claim 1, wherein the substrate is selected from the group consisting of an inorganic glass, quartz, a ceramic foil or plate, an undoped or a doped inorganic semiconductor, a polymeric material, a filled polymeric material, and a coated or an uncoated metallic foil or plate.

19. The method according to claim 1, wherein a deposition rate of the at least one layer of the organic material on the substrate is from 1 to 200 nm/min.

20. The method according to claim 1, wherein the organic material is selected from the group consisting of a rylene diimide, a naphthalene diimide, tetraazaperopyrene, a diketopyrrolopyrrole, a fullerene, a fullerene derivative, a thiophene compound, an aromatic compound with at least one condensed thiophene unit, an acene, a spiro compound, a metal complex, and an organo-silicon and organophosphorus compound, optionally in a form of a self-assembled monolayer.

21. The method according to claim 1, wherein the organic material comprises at least one naphthalene diimide.

22. The method according to claim 1, wherein the at least one layer of the organic material is a polycrystalline organic semiconductor layer, and the first temperature is from 20 to 350 C.

23. The method according to claim 1, wherein the at least one layer of the organic material is a layer of an organic electroluminescent device selected from the group consisting of a hole-injecting layer, a hole-transporting layer, a light-emitting layer, an electron-transporting layer and an electron-injecting layer, and the first temperature is from 20 to 350 C.

24. The method according to claim 23, wherein the layer is a hole transporting layer of an organic light emitting diode.

25. The method according to claim 1, wherein the at least one layer of the organic material is a self-assembled monolayer, the source of the solid organic material is a material capable of forming the self-assembled monolayer, and the first temperature is from 20 to 350 C.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 shows a schematic drawing of an organic field-effect transistor (OFET) which has an organic semiconducting layer of compound (A) deposited onto a silicon/silicone dioxide substrate in accordance with the method the present invention;

(2) FIG. 2 shows a schematic drawing of a device for carrying out the method of the present invention;

(3) FIG. 3 is a diagram showing the output characteristics of an OFET on the basis of compound (B) prepared in accordance with the invention;

(4) FIG. 4 is a diagram showing the transfer characteristics of the OFET of FIG. 3;

(5) FIG. 5 is a diagram showing the transfer characteristics of an array of 180 OFETs on the basis of compound (B);

(6) FIG. 6 is a diagram showing mobility distribution of the array of OFETs on the basis of compound (B);

(7) FIG. 7 is a diagram showing the transfer characteristics of an OFET where the organic layer is deposited onto an unmodified substrate; and

(8) FIG. 8 is a diagram showing the transfer characteristics of an OFET where the organic layer is deposited onto a substrate modified with octadecyltrichlorosilane (OTS);

(9) FIG. 9 is a superposition of FIGS. 7 and 8 to depict the influence of OTS

(10) FIG. 10 is a diagram showing the output characteristics of an OFET prepared from compound (C) in accordance with the invention;

(11) FIG. 11 is a diagram showing the transfer characteristics of the OFET of FIG. 10.

EXAMPLES

Example 1

(12) Preparation and Optical Characterization of an Organic Field-Effect Transistor (OFET)

(13) An organic field-effect transistor (OFET) is a typical example of an organic electronic device where certain components of prior art inorganic semiconductor technology have been replaced by organic materials. In the case of an OFET, the channel of a conventional field effect transistor is made from a thin organic semiconducting layer. The thickness the organic semiconducting layer is typically below one micrometer. OFETs have been fabricated with various device geometries.

(14) Preparation

(15) A typical example is depicted in FIG. 1 where the OFET 10 comprises a silicon wafer 11 which has been provided with metal gate electrodes 12 deposited via conventional high-vacuum physical vapor deposition techniques onto the surface of the bulk silicon 11. Subsequently an insulating dielectric layer 13 of thermally oxidized silicon has been grown. In the present case the dielectric layer 13 has a thickness of 100 nm and a relative permittivity .sub.r of 3.9.

(16) The silicone wafer 11 with prefabricated gate structures 12 and dielectric layer 13 represents the substrate 14 onto which a thin layer 15 of a semiconducting organic material is deposited using the method of the present invention as will be described in more detail below in connection with FIG. 2.

(17) After deposition of the organic semiconducting layer 15, drain and source contacts 16, 17 are deposited as gold layers with a thickness of 50 nm through a shadow mask using conventional PVD techniques such as a Biorad Polaron sputter-coater operating at a deposition rate of 0.8 /s at a vacuum pressure of about 510.sup.5 mbar.

(18) The organic semiconducting layer 15 of the OFET 10 is prepared using a simple experimental setup as depicted FIG. 2.

(19) A deposition chamber 18 is filled with an atmosphere 19 of ambient air at ambient pressure. A small amount of solid organic semiconducting material 20 (a few milligrams) having the following structure (A)

(20) ##STR00034##
is distributed on a silicon wafer 21 acting as a support which is then placed onto a electrically powered hot plate 22 (Stuart SD160) and heated up to a temperature of 280 C. As soon as the organic material 20 melts, it immediately begins to evaporate as could be determined by rising fog, schematically denoted by arrows 23 in FIG. 2. The silicon/silicon dioxide substrate 14 described above is heated to a temperature close to the melting temperature of the organic material 20 but in any case below the temperature of the hot plate 22 and supporting silicon wafer 21, i.e. below 280 C. and was then brought into contact with the rising fog 23 to allow the evaporated organic material to deposit onto the surface of substrate 14 in order to form a polycrystalline layer 15 on the thermally oxidized but otherwise untreated surface of the substrate 14.

(21) Layers of different crystal structures and crystal sizes can be deposited by varying deposition conditions such as exposure time, temperature differentials and distances between source 20 and substrate 14. Depending on the thickness of the vapor-deposited layer 15, different colors of the layer can be observed.

(22) Optical Characterization

(23) In photographs taken by polarized light microscopy of organic layers 15 produced with the above described material (A) using the method of the invention, the organic layers exhibit different colors depending on the thickness of the material. The different morphologies observed under the polarized light microscope generally correlate with different electrical properties of the layer. It has been observed that larger the crystals are associated with the fewer grain boundaries thus leading to improved electrical propertiesin particular as far as charge carrier mobility is concerned.

Example 2

(24) Preparation and Electrical Characterization of Another OFET Device

(25) An OFET was prepared and optically characterized in accordance with Example 1 but using a different organic semiconducting material, having the following structure (B):

(26) ##STR00035##

(27) OFETs produced in accordance with Example 2 had a channel width (W) of 200 m and channel length (L) of 100 m and have been electrically characterized using an Agilent 4145C Semiconductor Parameter Analyzer.

(28) The measurement results are depicted in FIGS. 3 and 4, respectively.

(29) FIG. 3 shows the output characteristics with U.sub.DS=0 V to +60V at 2V step size with U.sub.GS=15, 30, 45 and 60V.

(30) FIG. 4 shows the transfer characteristics with U.sub.GS=20 V to +60 V at 2V step size with U.sub.DS=40V

(31) The mobility is calculated from the root representation of the transfer characteristic curve (reference numeral 24 in FIG. 4) calculated in the saturation region. The slope m is determined from the dashed line 25. The dashed line 25 is fitted to a region of the root representation 24 of the current characteristic IDS such that a good correlation to the linear slope of the root representation is obtained (left boundary of the region is denoted by the vertical dashed line 26 and the right boundary by vertical dashed line 27).

(32) The threshold voltage U.sub.Th can be taken from the intersection of dashed line 25 in FIG. 4 with the X-axis portion (U.sub.GS).

(33) In order to calculate the electrical properties of the OFET, the following equations are employed:

(34) $=\frac{m^2*2L}{C_G*W}{C}_G={\mathrm{.Math.}}_0*{\mathrm{.Math.}}_r\frac{1}{d}{U}_{\mathrm{Th}}=-1*\frac{b}{m}\mathrm{ON}\text{/}\mathrm{OFF}=\frac{I_D\max }{I_D\min }$
where .sub.0 is the vacuum permittivity of 8.8510.sup.12 As/Vm.

Example 3

(35) Electrical Characterization of an OFET Array

(36) An organic layer of compound (B) is deposited on a wafer substrate comprising an array of 180 OFETs using the method of the present invention. In this example, the substrate is not only placed at a short distance above the heated source into the rising vapor stream but moved with constant velocity through the vapor by means of a doctor blade drawing table. This method allows to produce a very uniform and homogenous coating over a large area of the substrate surface (complete coverage of the substrate with an organic semiconducting layer having a uniform thickness). In the present example, 180 OFTs were coated and individually contacted to determine their electrical characteristics.

(37) The measurements reveal a very good homogeneity of the transistors with nearly identical transfer characteristics. FIG. 5 is a diagram showing the transfer characteristics of the array of OFETs. Almost the same transfer characteristics is obtained for each OFET. As can be seen from FIG. 5, only two OFETs show a different characteristic. This difference has been attributed to the fact, that these have been the first measurements on this substrate which have been taken while traps in the dielectric were filled during first the measurements. A surface treatment with a SAM of octadecyltrichlorosilane (OTS) is resolving this matter.

(38) FIG. 6 is a diagram showing the mobility distribution of the array of OFETs. Since mobility fluctuations in the order of a magnitude are acceptable for many applications, the variations observed in this in this example are extremely low. As a matter of fact, 91% of all transistors are in a range of from 0.3 and 0.6 cm.sup.2/Vs. The best transistor showed a mobility of 0.9 cm.sup.2/Vs and even the least effective transistor still showed a remarkable mobility of 0.27 cm.sup.2/Vs.

Example 4

(39) Influence of Substrate Surface Modification on Electrical Characteristics of an OFET

(40) It has been shown that by functionalizing the substrate surface, electrical properties such as the threshold voltage U.sub.th can be modified:

(41) For instance, as known in the art, a silicon dioxide surface can be functionalized with octadecyltrichlorosilane (OTS). It has been found that deposition of an organic semiconducting layer onto a substrate 14 functionalized with OTS shifts the threshold voltage towards 0V.

(42) FIG. 7 is a diagram showing the transfer characteristics of an OFET where the organic layer is deposited onto an unmodified substrate at different U.sub.DS values. FIG. 8 is a diagram showing the transfer characteristics of an OFET where the organic layer is deposited onto a substrate modified with octadecyltrichlorosilane (OTS) at different U.sub.DS values. FIG. 9 is a superposition of FIGS. 7 and 8 that clearly shows the effect of the surface modification prior to the deposition of the organic semiconductor material.

(43) From these measurements, the following statistics for the threshold voltage U.sub.th is obtained:

(44) TABLE-US-00001 without OTS with OTS U.sub.th [V] U.sub.th [V] Min. 5.05 3.28 Max 18.42 6.83 Mean 14.40 4.81 Std.Dev. 6.38 2.94

Example 5

(45) Preparation and Electrical Characterization of Another OFET Device

(46) An OFET was prepared and optically characterized in accordance with Example 1 but using a different organic semiconducting material, having the following structure (C):

(47) ##STR00036##

(48) OFETs produced in accordance with Example 5 had a channel length (W) of 200 m and channel width (L) of 100 m and have been electrically characterized using an Agilent 4145C Semiconductor Parameter Analyzer.

(49) The measurement results are depicted in FIGS. 10 and 11, respectively.

(50) FIG. 10 shows the output characteristics with U.sub.DS=0 V to +60V at 2V step size with U.sub.GS=0, 45 and 60V.

(51) FIG. 11 shows the transfer characteristics with U.sub.GS=20 V to +60 V at 2V step size with U.sub.DS=40V

Example 6

(52) XRD characterization of a polycrystalline organic semiconductor layer

(53) The following samples were prepared using the organic semiconducting material having the structure (B):

(54) ##STR00037## 1) spincoating (comparison): A 0.5 wt. % solution of compound (B) in THF was applied to a silicon/silicon dioxide substrate by spincoating. The obtained layer had a thickness of 50 nm. 2) vacuum deposition (comparison): A 50 nm layer of compound (B) was deposited on a silicon/silicon dioxide substrate by vacuum deposition (10.sup.6 mbar) at a substrate temperature of 70 C. 3) deposition at ambient pressure: A 50 nm layer of compound (B) was deposited on a silicon/silicon dioxide substrate by deposition at a source temperature of 320 C. and a substrate temperature of 190 C. The distance between source and substrate was 1-2 mm( ). The substrate is moved through the vapor of the organic material at a speed of 15.8 mm/s.

(55) Sample 1) showed the lowest crystallite size in the XRD (18 nm) and the polarization microscope. and the worst electric properties. Sample 3) that was prepared by the method according to the invention showed the largest crystallite in the XRD (62 nm) as well as in the polarization microscope.

(56) XRD Measurement:

(57) X-ray powder diffraction (XRPD) using a Diffraktometer D 8 Advance Series 2 (Fa. Bruker/AXS)

(58) TABLE-US-00002 mean size of the crystallites [nm] sample in nm 1) 18 2) 23 3) 62

(59) The mean size of the crystallites was determined from the peaks at 8, 12 and 17 2-Theta.

(60) The relative error using single line fit is approx.+/20%.

(61) Crystallite Size Determination

(62) The crystallite size is determined using X-ray diffraction by fitting the diffracted peak width. The software used is TOPAS 4.2. Instrumental broadening is considered during the peak fitting, leading to a separation of the instrumental from the sample broadening. The sample contribution is determined using the Lvol-FWHM method, using a single Voigt profile function. Data is collected in the Bragg-Brentano geometry from 2-30 (2), using a step size of 0.02 (2).

(63) References:

(64) TOPAS 4.2 Users Manual, Bruker AXS GmbH, stliche Rheinbrckenstr. 49, 76187 Karlsruhe, Germany

Example 7

(65) Long Time Stability of an Organic Semiconductor Layer of Compound (A)

(66) ##STR00038##

(67) The OFET from example 1 and a comparative OFET prepared by vacuum deposition of the compound (A) (10.sup.6 mbar) using the same substrate and the same conditions apart from the pressure during deposition are subjected to a long-term storage test under ambient conditions. The results are shown in the following table 1.

(68) TABLE-US-00003 TABLE 1 mobility (normated) month ambient pressure vacuum 0 1 1 2 0.220 8 0.077 20 0.319

(69) In the context of the present invention, normated means divided through the mobility value of month 0.

(70) As can be seen, the OFET prepared at ambient pressure using the method of the invention shows an remarkably improved storage stability. The mobility of the OFET prepared under vacuum conditions showed a reduction to only 22% of the original value after 2 month and to about 8% after 8 month, whereas the OFET prepared according to the invention still showed a mobility of 32% of the original value after 20 month.

Example 8

(71) Fabrication of a Hole Transporting Layer of an Organic Light Emitting Diode (OLED)

(72) The ITO substrate used as the anode is first cleaned with an acetone/isopropanol mixture in an ultrasound bath. To eliminate any possible organic residues, the substrate is exposed to a continuous ozone flow in an ozone oven for further 25 minutes. This treatment also improves the hole injection properties of the ITO. Then Plexcore OC AJ20-1000 (commercially available from Plextronics Inc.) is spin-coated and dried to form a hole injection layer of 40 nm thickness.

(73) Thereafter, the hole transport layer is deposited using the method of the invention. The deposition chamber is filled with an atmosphere of ambient air at ambient pressure. A small amount of the organic semiconducting material N,N-diphenyl-N,N-bis(3-methylphenyl)-1,1-diphenyl-4,4-diamine (-NPD) is distributed in a tungsten crucible and placed onto an electrically powered hot plate (source hot-plate) and heated up to a temperature of 350 C. At this temperature, the material evaporates as could be determined by rising fog over the crucible.

(74) The ITO substrate is placed on a second hot-plate (substrate hot-plate) and heated up to a temperature of 100 C. The substrate is placed in short distance (1-2 mm) above the source hot-plate. The source hot-plate, supporting the crucible, is moved with a constant velocity of 1 mm/sec with respect to the substrate hot-plate and the ITO substrate. While crossing below the ITO substrate, the ITO substrate is exposed to the vapor and a homogenous layer of the -NPD is deposited onto the ITO substrate. To increase the thickness of the deposited layer and ensure a complete coverage of the substrate, the transit of the source hot-plate and therefore the exposure of the ITO substrate to the vapor has been repeated once.

(75) Subsequently, the substrates are transferred in a high vacuum deposition chamber, and the organic materials specified below are applied by vapor deposition in high vacuum (p=10.sup.7-10.sup.9 mbar) to the substrate at a rate of approx. 0.5-5 nm/min.

(76) A mixture of 10% by weight of emitter compound (D) and 90% by weight of -NPD

(77) ##STR00039##
is applied by vapor deposition in a thickness of 20 nm. Subsequently, BAIq (E)

(78) ##STR00040##
is applied by vapor deposition with a thickness of 5 nm as blocker. An additional layer of 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP) doped with Cs.sub.2CO.sub.3 is applied as electron transport layer by vapor deposition in a thickness of 50 nm and finally a 100 nm-thick Al electrode completes the device.

(79) For comparison an OLED without a hole-transport layer was produced. Apart from the deposition of the hole-transport layer using the method of this invention, the preparation of the OLED for the comparison has been identical. Therefore the structure of the OLED for the comparison was as follows: ITO-Anode, a spin-coated layer of Plexcore OC AJ20-1000, a 20 nm thick mixture of 10% emitter compound and 90% -NPD, a 5 nm thick layer of BAIq, a 50 nm thick layer of BCP doped with Cs.sub.2CO.sub.3, and finally a 100 nm thick Al electrode. All organic layers apart from the spin-coated hole-injection layer, have been deposited in high vacuum (p=10.sup.7-10.sup.9 mbar). All fabricated parts are sealed with a glass lid and a getter in an inert nitrogen atmosphere.

(80) To characterize the OLED, electroluminescence spectra are recorded at various currents and voltages. In addition, the current-voltage characteristic is measured in combination with the light output emitted. The light output can be converted to photometric parameters by calibration with a photometer. To determine the lifetime, the OLED is operated at a constant current density and the decrease in the light output is recorded. The lifetime is defined as that time which lapses until the luminance decreases to half of the initial luminance. The performance is shown in Table 2

(81) TABLE-US-00004 TABLE 2 Lifetime at Voltage at Voltage at EQE at EQE at CIE 8000 nits 300 nits 1000 nits 300 nits 1000 nits color [h] [V] [V] [%] [%] coordinate Whitout HTL 170 2.7 3 9.5 9.5 X = 0.60228 -NPD Y = 0.39627 With HTL 215 2.6 2.8 10.49 9.87 X = 0.60635 -NPD Y = 0.3923 1 nit = 1 cd/m.sup.2

(82) The deposition of the hole transport layer of -NPD by the method of this invention increased the EQE at 300 nits by 1% and reduced the voltage necessary to produce a brightness of 300 nits and 1000 nits in comparison to the OLED without HTL. The lifetime at 8000 nits has been increased from 170 h to 215 h.

Example 9

(83) Fabrication of an Organic Self-Assembled Monolayer (SAM)

(84) Using the method of the invention a self-assembled monolayer of octadecyltrichlorosilane (OTS) has been deposited on silicon dioxide and characterized by water-contact angle measurements.

(85) Preparation:

(86) The deposition chamber is filled with an atmosphere of ambient air at ambient pressure. A silicon wafer with a 300 nm thick layer of thermally grown silicon dioxide is used as a substrate. The substrate is rinsed with ethanol and blown with nitrogen gas, before it is mounted on the substrate hot-plate. A small amount of the commercially available octadecyltrichlorosilane (OTS) (structure: CH.sub.3(CH.sub.2).sub.16CH.sub.2SiCl.sub.3) powder is distributed in a tungsten crucible, placed onto the source hot-plate and heated up to a temperature of 170 C. At this temperature, the material evaporates as could be determined by rising fog over the crucible. The silicon substrate on the substrate hot-plate is heated to 100 C. In accordance with example 5 the substrate is placed in short distance (1-2 mm) above the source hot-plate. The source hot-plate, supporting the crucible, is moved with a constant velocity of 2 mm/s with respect to the substrate hot-plate and the silicon substrate. While crossing below the silicon substrate, the silicon substrate is exposed to the vapor and the material is deposited on the silicon substrate. After the deposition, the substrate is dismounted from the hot plate and rinsed with acetone to remove excessive organic material.

(87) Characterization:

(88) OTS is known to form hydrophobic SAMs on the surface of silicon dioxide. To confirm the formation of a hydrophobic self-assembled monolayer using the method of the invention the contact angle of a water droplet (Volume 5 l) on the surface of the silicon/silicon dioxide wafer before and after the deposition is measured. After the deposition of OTS using the method of this invention the water-contact angle increased by 40 from 55 for the untreated silicon/silicon dioxide substrate to 95 for the OTS treated silicon/silicon dioxide substrate. This confirms the formation of a hydrophobic SAM on the silicon dioxide.