METHOD AND DEVICE FOR THE INITIAL PROGRAMMING OF A SECONDARY COMPUTER

Abstract

A method (10) for the initial programming of a secondary computer (22), characterized by the following features: a serial interprocessor interface (21) between the secondary computer (22) and a main computer (23) is configured, and the data (24) are written (12) via the interface (21) to a flash memory (25) of the secondary computer (22).

Claims

1-10. (canceled)

11. A method for an initial programming of a secondary computer with specified data, the method comprising the following steps: configuring a serial interprocessor interface between the secondary computer and a main computer; and writing the data, via the interface, to a flash memory of the secondary computer.

12. The method as recited in claim 11, wherein the configuring of the interface includes configuring a low-voltage differential signal (LVDS) output, an LVDS input, and a system clock.

13. The method as recited in claim 11, wherein before the writing, the data are communicated to the main computer via a field bus.

14. The method as recited in claim 13, wherein the communication takes place through a driver module for the field bus, having a transmitter and a receiver.

15. The method as recited in claim 11, wherein the data are communicated via programming points on a circuit board that is common to the secondary computer and the main computer.

16. The method as recited in claim 11, wherein the main computer receives the data from a programming station, and the writing is performed by the main computer.

17. The method as recited in claim 11, wherein, via the interface, the main computer loads a program to a direct access memory of the secondary computer and communicates the data to the secondary computer, and wherein the writing performed by the program.

18. A non-transitory machine-readable storage medium on which is stored a computer program for an initial programming of a secondary computer with specified data, the computer program, when executed by a computer, causing the computer to perform the following steps: configuring a serial interprocessor interface between the secondary computer and a main computer; and writing the data, via the interface, to a flash memory of the secondary computer.

19. A device for an initial programming of a secondary computer with specified data, the device configured to: configure a serial interprocessor interface between the secondary computer and a main computer; and write the data, via the interface, to a flash memory of the secondary computer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Exemplary embodiments of the present invention are shown in the figures and are explained in more detail in the following description.

[0015] FIG. 1 shows the flow diagram of a method according to a first specific embodiment.

[0016] FIG. 2 schematically shows a control device according to a second specific embodiment.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0017] FIG. 1 shows the basic sequence of a method (10) according to the present invention, whose steps are explained in more detail below on the basis of the control device (20) according to FIG. 2.

[0018] During the boot process of the secondary computer (22), the boot loader checks a defined address of its flash memory (25) for the presence of a valid program start address. If no valid entry is found, the boot loader recognizes the SIPI boot mode via the pre-configuratione.g., external hardware configuration spinsand waits for the data (24) that are to be programmed. So that a reception of data can take place, the SIPI interface (21) is first configured (process 11FIG. 1) during the booting to such an extent that a communication with the main computer (23) can be ensured. For SIPI operation, this includes in particular the initialization of corresponding ports as LVDS input (26), LVDS output (27), and system clock (28). The latter is used either as input clock for the slave SIPI PLL or, instead of a quartz crystal, as input clock for the complete secondary computer (22). In the second case, the clock for the slave SIPI PLL is derived from the system PLL of the secondary computer (22).

[0019] The further programming (process 12FIG. 1) of the secondary computer (22) can take place in various ways. For example, the main computer (23) receives the data (24) to be programmed from a programming station, and writes the data directly to the flash memory (25) of the secondary computer (22).

[0020] According to an alternative specific embodiment, the main computer (23) first loads a program via the SIPI interface (21) into the RAM of the secondary computer (22). This program is executed, and takes over the programming of the flash memory (25). The programming data (24) are communicated from the programming station to the secondary computer (22) via the main computer (23) and the SIPI interface (21).

[0021] The specific software implementation is a function of the programming design, and may be varied without departing from the scope of the present invention.