INTEGRATED CIRCUIT CHIP PACKAGING

Abstract

A method of mounting an integrated circuit chip to a circuit board includes placing the integrated circuit chip into a cavity extending from a surface of the circuit board to an embedded conductor, electrically connecting the integrated circuit chip to the embedded conductor, and disposing a heat sink over a surface of the integrated circuit chip. The electrically connecting the integrated circuit chip to the embedded conductor includes flip chip mounting of the integrated circuit chip within the cavity.

Claims

1. A method of mounting an integrated circuit chip to a circuit board, the method comprising: placing said integrated circuit chip into a cavity extending from a surface of said circuit board to an embedded conductor; and electrically connecting said integrated circuit chip to said embedded conductor, wherein said electrically connecting said integrated circuit chip to said embedded conductor comprises flip chip mounting said integrated circuit chip within said cavity.

2. The method of claim 1, further comprising providing said cavity in said circuit board.

3. The method of claim 2, wherein said providing said cavity comprises milling said surface of said circuit board to said embedded conductor.

4. The method of claim 3, wherein said providing of said cavity comprises providing said cavity with a side surface that includes a step.

5. The method of claim 4, wherein a top surface of said step is aligned with another embedded conductor.

6. The method of claim 4, wherein a top surface of said step exposes said embedded conductor.

7. The method of claim 1, further comprising: disposing a heat sink over a surface of said integrated circuit chip.

8. The method of claim 7, further comprising: disposing the heat sink on an outer surface of a thermal slug for transferring a thermal energy away from said circuit board.

9. The method of claim 8, wherein said integrated circuit chip abuts a bottom surface of the thermal slug.

10. The method of claim 8, wherein, with respect to a bottom surface of said integrated circuit chip, a top surface of the thermal slug is located higher than a top surface of said circuit board.

11. The method of claim 1, wherein said circuit board is disposed on an upper surface and a lower surface of said embedded conductor.

12. The method of claim 1, further comprising: disposing a heat sink on a top surface of a thermal slug for transferring a thermal energy away from said circuit board, the heat sink extending above a top surface of said circuit board.

13. The method of claim 12, further comprising: disposing a flip chip package between the top surface of said circuit board and a bottom surface of the heat sink.

14. The method of claim 13, wherein the bottom surface of the heat sink abuts a top surface of the flip chip package.

15. An electrical circuit device, comprising: a circuit board including a cavity extending from a surface of said circuit board to an embedded conductor; an integrated circuit chip disposed in said cavity; and an electrical connection extending between said integrated circuit chip and said embedded conductor, wherein said electrical connection comprises a flip chip connection.

16. The device of claim 15, further comprising: a thermal slug disposed over a top surface of said integrated circuit chip.

17. The device of claim 16, further comprising: a heat sink mounted to an outer surface of the thermal slug for transferring a thermal energy away from the circuit board.

18. The device of claim 16, further comprising: a heat sink mounted over a top surface of said integrated circuit chip for transferring a thermal energy away from the circuit board.

19. The device of claim 15, further comprising: a heat sink disposed on a top surface of a thermal slug for transferring a thermal energy away from said circuit board.

20. The device of claim 19, wherein the heat sink extends above a top surface of said circuit board.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The foregoing and other exemplary purposes, aspects and advantages will be better understood from the following detailed description of an exemplary embodiment of the invention with reference to the drawings, in which:

[0029] FIG. 1 is a cross-sectional view of a printed circuit board with two conventionally mounted integrated circuit chip packages;

[0030] FIG. 2 is a cross-sectional view of an exemplary embodiment of the present invention;

[0031] FIG. 3 is a cross-sectional view of the exemplary embodiment of FIG. 2 in a passivated configuration;

[0032] FIG. 4 is a cross-sectional view of another exemplary embodiment of the present invention;

[0033] FIG. 5 is a flowchart of an exemplary method in accordance with the present invention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THE INVENTION

[0034] Referring now to the drawings, and more particularly to FIGS. 1-5, there are shown exemplary embodiments of the method and structures of the present invention.

[0035] As explained above, there are many topologies conventionally available for implementing transmission lines in circuit boards (e.g., printed circuit boards (PCBs)). Internal embedded conductors, which may include an embedded conductor sandwiched between solid planes of a reference ground plane, offer many advantages over surface conductors. Embedded conductors support less dispersive transverse electric and magnetic modes which may be advantageous for wide band operation. An embedded conductor may also be self-shielding and, since they may undergo fewer processing steps than surface wiring they may be easier and less costly to fabricate.

[0036] Connecting an integrated circuit chip to embedded conductors conventionally requires the use of vias to connect from the surface of a printed circuit board where components are traditionally attached. However, if the overlying layers are removed from the printed circuit board in accordance with an exemplary embodiment of the present invention (e.g. by milling) these embedded conductors may permit a more direct attachment of these embedded conductors to high speed nets on a chip. A chip may be connected to an embedded conductor using a wire bond, a ribbon bond, or the like, or may be flip chip connected using solder balls, or the like.

[0037] As illustrated by FIG. 2, in accordance with an exemplary embodiment of the present invention, layers in a printed circuit board 200 may be milled back to create a cavity with a step-shaped side surface 202. As shown, the side surface may have a plurality of steps.

[0038] In other words, the outer surface of the printed circuit board may be milled to form a cavity that extends down to a desired embedded conductor. Further, a side of such a cavity may have a terraced profile (step-shaped side surface) wherein each step of the terraced profile exposes a surface of an embedded conductor.

[0039] In another exemplary embodiment of the present invention, after a cavity is formed in the printed circuit board, an exposed surface of the embedded conductor may be treated to facilitate bonding. For example, the surface may be plated with a metal (e.g., a noble metal such as gold, platinum, silver, and the like) to improve wire bonding and/or ribbon bonding.

[0040] In an exemplary embodiment of the present invention, the cavity in the printed circuit board extends deep enough into the printed circuit board such that a top of an integrated circuit chip positioned in the recess would be substantially co-planar with an embedded conductor. The embedded conductor may then be provided the highest speed signal more directly from the integrated circuit chip.

[0041] For example, in FIG. 2 the top surface 204 of the chip 206 is substantially co-planar with an embedded conductor 208. In this manner, an exemplary embodiment of the present invention offers a launch from the chip 206 into the printed circuit board more directly to a desired embedded conductor 208. The top of the chip 204 may be connected to the highest performance embedded conductor 208 with a ribbon bond 210 because a ribbon bond may offer a higher performance potential.

[0042] The step-shaped surface of the cavity may also reveal the surfaces of other embedded conductors, which are not substantially co-planar with a top of the chip. In general, as the distance from the top of the chip 204 to an embedded conductor increases, a longer connection will be required. A longer connection will generally offer poorer performance than a shorter connection and, therefore, the printed circuit board may be designed such that, as the distance between an embedded conductor and the top of the chip increases, the less critical a signal will be carried by that respective embedded conductor. For example, most low speed control lines do not require controlled impedance and, therefore, are insensitive to the longer distances that need to be bridged by a wire bond.

[0043] Further, the less critical connections may use lower performance connections such as, for example, a wire bond and/or a ball bond as opposed to a ribbon bond. However, one of ordinary skill in the art understands that any type of connection may be used to establish electrical communication between a chip and an embedded conductor and still practice the invention.

[0044] In the exemplary embodiment illustrated by FIG. 2, the embedded conductor 212, which is the next closest to the top of the chip 204, and a around plane 214 are also connected to the chip using ribbon bonds 210.

[0045] Further, the next closest embedded conductors 216 to the top of the chip 204 are connected by ball bonds 218 to the chip 206.

[0046] FIG. 2 also illustrates a flip chip package 220, which may be connected to the printed circuit board 200 in a conventional manner.

[0047] A printed circuit board may be constructed by laminating many different layers together using, for example, an epoxy resin. That lamination may be done under a high temperature and a pressure to cure the resin. The resin essentially flows between the layers in a pattern sensitive manner depending upon what copper features happen to be nearby. Thus, the surfaces between the layers of a printed circuit board may not necessarily be planar. Rather, the surfaces of the layers may incorporate a bit of waviness depending upon the copper patterns.

[0048] Thus, when using a conventional milling machine and open-loop programming on the milling machine to mill down to a certain level into a printed circuit board, there is a likelihood that the milling might not reach a level that corresponds to the level of a desired embedded conductor. The thickness of a patterned copper layer of an embedded conductor is typically about 1 mil and the waviness of a reasonably thick layer of a printed circuit board is typically more than 1 mil. Therefore, a conventional milling machine may cut entirely through the embedded conductor, thereby, destroying the embedded conductor in some places, while simultaneously not even reaching the same embedded conductor in another place.

[0049] In an exemplary embodiment of the present invention, a precision milling machine may sense an electrical contact between a cutting edge of the milling machine and a stripline. In this manner, the milling machine may incorporate a closed-loop feedback system that regulates the depth of the milling into the printed circuit board.

[0050] In another exemplary embodiment of the present invention, a closed-loop feedback might not electrically sense the patterned layer of the desired embedded conductor in order to control the depth of the milling process. Rather, a calibration structure that may closely track the local internal waviness may be provided which provides a desired feedback control signal. This may be accomplished either electrically, with optical recognition, or by analyzing the chips as they are received from the milling operation. When copper chips are detected, then the desired target layer has been reached.

[0051] Before connecting the leads, but after milling, an embedded conductor may have a bare surface. In an exemplary embodiment of the present invention, the bare surfaces of the embedded conductor may be plated with a material, which facilitates bonding. A material for plating may include, for example, gold and the like, which may be electro-lessly plated onto a surface of an embedded conductor.

[0052] Alternatively, if a thicker gold layer is required, then a sacrificial plating web may be patterned in the copper and subsequently milled away.

[0053] Although not shown in the Figures, ground planes in a printed circuit board may be electrically connected to each other using a via in close proximity to the milled cavity in order to maintain tight coupling between the planes for embedded conductor integrity.

[0054] FIG. 3 illustrates an exemplary embodiment of a printed circuit board 300 in accordance with the present invention. The step-shaped surface 302 and the chip 304 are incorporated into the printed circuit board 300 in a final passivated configuration. The printed circuit board 300 includes an underfill material 306 which fills the recess 308 in the printed circuit board 300 to protect the chip 304 and the connections 310 from the chip 304 to the embedded conductors 312 within the printed circuit board 300.

[0055] The printed circuit board 300 also includes a thermal slug 314 mounted to a top surface 316 of the chip 304 and a heat sink 318 mounted to an outer surface 320 of the thermal slug 314 to conduct thermal energy away from the printed circuit board 300.

[0056] In another exemplary embodiment in accordance with the present invention (not shown), the chip may be accessed from the backside for thermal management.

[0057] As illustrated by FIG. 4, an exemplary embodiment 400 of the invention may permit a chip 402 to connect with an embedded conductor 404 using a flip chip connection 406.

[0058] The other vias 408 supporting the non-embedded conductor signals from the chip 402 are not buried vias, but are typical through vias that have pads 410 at the level of the embedded conductor 404.

[0059] In accordance with an exemplary embodiment of the present invention, these pads 410 may be revealed in the course of milling a cavity into the printed circuit board. This exemplary method maintains the low cost of throw via construction by avoiding the use of buried vias.

[0060] FIG. 5 illustrates a flowchart 5 for an exemplary method in accordance with the present invention. The flowchart 500 starts at step 502 and continues to step 504 where a cavity is milled into a circuit board to expose an embedded conductor. The flowchart 500 continues to step 506 where an integrated circuit chip is positioned inside the cavity. Next, in step 508, the integrated circuit chip is electrically connected to the embedded conductor that was exposed in step 504. The flowchart ends at step 510.

[0061] While the invention has been described in terms of several exemplary embodiments, those skilled in the art will recognize that the invention can be practiced with modification.

[0062] Further, it is noted that, Applicant's intent is to encompass equivalents of all claim elements, even if amended later during prosecution.