Patent classifications
H01L23/3672
HEAT DISSIPATION DEVICE
A heat discharge device having a bottom plate having a bottom and an upper surface. Heat discharge blades extend between two front faces of the bottom plate and inclinations of the heat discharge blades are configured in a way such that neighbouring heat discharge blades alternatingly approach one another and move away from each other. Neighbouring heat discharge blades are connected to one another at the end regions facing away from the upper surface of the bottom plate directly and delimit a first air flow channel. Neighbouring heat discharge blades delimit a second air flow channel, which is open at the side facing away from the upper surface of the bottom plate. The heat discharge blades have a group of air vents, wherein the first air flow channels are open at the opposite distal ends thereof and the second air flow channels are closed at the opposite distal ends thereof.
POWER SEMICONDUCTOR COOLING ASSEMBLY
A power switch module includes a semiconductor die and a conductive busbar. The semiconductor die is electrically conductively mounted to the busbar. The module also includes a dielectric coolant fluid and the busbar and the semiconductor die mounted thereto are immersed in the dielectric coolant fluid.
THERMAL MANAGEMENT OF THREE-DIMENSIONAL INTEGRATED CIRCUITS
A 3D integrated circuit device can include a substrate, a thermal interface layer and at least one die, at least one device layer bonded between the thermal interface layer and the at least one die, wherein the thermal interface layer enhances conductive heat transfer between the at least one device layer and the at least one die, and a heat sink located adjacent to a heat spreader, wherein the thermal interface layer, the at least one die and the at least one device layer are located between the heat spreader and the substrate.
THERMAL MANAGEMENT OF THREE-DIMENSIONAL INTEGRATED CIRCUITS
A 3D integrated circuit device can include a substrate, a thermal interface layer and at least one die, at least one device layer bonded between the thermal interface layer and the at least one die, wherein the thermal interface layer enhances conductive heat transfer between the at least one device layer and the at least one die, and a heat sink located adjacent to a heat spreader, wherein the thermal interface layer, the at least one die and the at least one device layer are located between the heat spreader and the substrate.
Cooling apparatus
A cooling apparatus includes a cold plate with a first refrigerant channel through which refrigerant flows, and a pump to circulate the refrigerant. The cold plate includes a bottom wall and an upper wall. A lower surface of the bottom wall is in contact with a heating element. The upper wall is located in contact with the bottom wall. A lower surface of the upper wall and an upper surface of the pump directly oppose each other. A lower surface of the pump is exposed to an outside of the cooling apparatus.
Self-cleaning heatsink for electronic components
Systems for cooling semiconductor devices that can comprise a heatsink and a cleaning element for the heatsink. The heatsink can have fins spaced apart from each other by channels. The cleaning element can have a base and one or more arms extending from the base. The cleaning element can be positioned with respect to the heatsink such that each arm is aligned with a corresponding channel between the fins, and the arms are moveable between a flow configuration in which the arms are in the channels and a cleaning configuration in which the arms are outside of the channels.
Chip on film package
A chip on film package is disclosed, including a flexible film and a chip. The flexible film includes a film base, a patterned metal layer includes a plurality of pads and disposed on an upper surface of the film base, and a dummy metal layer covering a lower surface of the film base and capable of dissipating heat of the chip. The dummy metal layer comprises at least one opening exposing the second surface, and at least one of the plurality of pads is located within the at least one opening in a bottom view of the chip on film package. The chip is mounted on the plurality of pads of the patterned metal layer.
LAYERED BONDING MATERIAL, SEMICONDUCTOR PACKAGE, AND POWER MODULE
In a layered bonding material 10, a coefficient of linear expansion of a base material 11 is 5.5 to 15.5 ppm/K and a first surface and a second surface of the base material 11 are coated with pieces of lead-free solder 12a and 12b.
SEMICONDUCTOR DEVICE AND POWER CONVERTER
A semiconductor device includes a semiconductor element, a first wiring member, a second wiring member, and a terminal. The semiconductor element includes a first main electrode and a second main electrode on a side opposite from the first main electrode. The first wiring member is connected to the first main electrode. The terminal has a first terminal surface connected to the second main electrode and a second terminal surface. The second terminal has four sides. Two of the four sides are parallel to a first direction intersecting the thickness direction, and other two sides of the four sides are parallel to a second direction perpendicular to the thickness direction and the first direction. The second wiring member is connected to the second terminal surface of the terminal through solder, and has a groove. The groove overlaps one or two of the four sides of the second terminal surface.
METHODS, SYSTEMS, APPARATUS, AND ARTICLES OF MANUFACTURE TO CONTROL LOAD DISTRIBUTION OF INTEGRATED CIRCUIT PACKAGES
Methods, systems, apparatus, and articles of manufacture to control load distribution of integrated circuit packages are disclosed. An example apparatus includes a heatsink, a base of the heatsink to be thermally coupled to a semiconductor device, and a rigid plate to be coupled to the semiconductor device and the base of the heatsink, the rigid plate stiffer than the base, the rigid plate distinct from a bolster plate to which the heatsink is to be coupled.