Programmable, frequency agile direct conversion digital receiver with high speed oversampling

Abstract

The invention described herein is directed to different embodiments of a wireless communications device that can be used in many different applications, such as but not limited to a digital oversampling receiver adapted to select desired signals and to reject undesired signals. In one embodiment, a wireless communications device is disclosed that comprises an architecture for a receiver front end that obviates the need for high order passive circuitry or RC active circuitry to select desired signals and to reject undesired signals.

Claims

1. A wireless transmission receiver comprising: an N stage ring counter programmed with a count pattern, wherein N is an integer of value greater than one; the N stage ring counter for producing an N-cycle digital waveform; a combiner for combining said N-cycle digital waveform with a wireless transmission; predictive coders for oversampling said combined digital waveform and said wireless transmission to form a high speed serial stream, said high speed serial stream comprised of a signal of interest and a quantization noise signal; a suppressor for suppressing said quantization noise signal; a converter for converting said high speed data stream into a lower speed; a clock coupled to said N stage ring counter; an N path switching network; at least two predictive coders, wherein a respective one of said at least two predictive coders is coupled to a respective switch of said N path switching network; and at least two (M) digital filters, each configured to receive an output signals from all of said at least two predictive coders, wherein the outputs of each of the at least two digital filters, each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states, wherein the converter is an N stage ring counter programmed with a count pattern; and wherein the phase states correspond to bins and Bin 0 is prescribed to correspond to a phase of zero while Bin M1 is prescribed to represent a phase of $2\frac{M-1}{M}.$

2. The receiver of claim 1, wherein said N stage ring counter is configured to produce a clock signal for an N path switching network and an at least one predictive coder.

3. The receiver of claim 2, wherein said N path switching network comprises at least one switch adapted to receive an input signal.

4. A wireless transmission receiver comprising: an N stage ring counter programmed with a count pattern, wherein N is an integer of value greater than one; the N stage ring counter for producing an N-cycle digital waveform; a combiner for combining said N-cycle digital waveform with a wireless transmission; predictive coders for oversampling said combined digital waveform and said wireless transmission to form a high speed serial stream, said high speed serial stream comprised of a signal of interest and a quantization noise signal; a suppressor for suppressing said quantization noise signal; a converter for converting said high speed data stream into a lower speed; a clock coupled to said N stage ring counter; an N path switching network; at least two predictive coders, wherein a respective one of said at least two predictive coders is coupled to a respective switch of said N path switching network; and at least two (M) digital filters, each configured to receive an output signals from all of said at least two predictive coders, wherein the outputs of each of the at least two digital filters, each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states; wherein coefficients of the digital filters are adjusted to ensure that I and Q outputs of the at least two digital filters are amplitude and phase matched notwithstanding timing and gain imperfections in the output signals from all of said at least two predictive coders.

5. A wireless transmission receiver comprising: an N stage ring counter programmed with a count pattern, wherein N is an integer of value greater than one; the N stage ring counter for producing an N-cycle digital waveform; a combiner for combining said N-cycle digital waveform with a wireless transmission; predictive coders for oversampling said combined digital waveform and said wireless transmission to form a high speed serial stream, said high speed serial stream comprised of a signal of interest and a quantization noise signal; a suppressor for suppressing said quantization noise signal; a converter for converting said high speed data stream into a lower speed; a clock coupled to said N stage ring counter; an N path switching network; at least two predictive coders, wherein a respective one of said at least two predictive coders is coupled to a respective switch of said N path switching network; at least two (M) digital filters, each configured to receive an output signals from all of said at least two predictive coders, wherein the outputs of each of the at least two digital filters, each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states; and N paths, each path from a switch of the N path switching network to a predictive coder of the at least two predictive coders, wherein each of the N stage ring counters is configured to produce a different output frequency such that each of N paths processes a relatively narrow subband of a wideband input; said subbands corresponding to each path are arranged in order of ascending frequency; and collectively these subbands cover a wide frequency span.

6. The wireless transmission receiver of claim 5, wherein the wideband input is an intermediate frequency signal formed by downconverting a wireless transmission.

7. A method of receiving a wireless transmission comprising the steps of: programming a count pattern into an N stage ring counter, wherein N is an integer of value greater than one; producing an N-cycle digital waveform; combining said N-cycle digital waveform with said wireless transmission; oversampling said combined digital waveform and said wireless transmission to form a high speed serial stream, said high speed serial stream comprised of a signal of interest and a quantization noise signal; suppressing said quantization noise signal; converting said high speed data stream into a lower speed; clocking said N stage ring counter with a clock coupled to the counter; wherein combining includes using an N path switching network; receiving an output from a respective switch of said N path switching network at a respective predictive coder of at least two predictive coders; and receiving output signals from all of said at least two predictive coders at each of least two (M) digital filters, wherein the outputs of each of the at least two digital filters, each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states wherein the converter is an N stage ring counter programmed with a count pattern; and wherein the phase states correspond to bins and Bin 0 is prescribed to correspond to a phase of zero while Bin M1 is prescribed to represent a phase of $2\frac{M-1}{M}.$

8. The method of claim 7, wherein said N stage ring counter is configured to produce a clock signal for an N path switching network and an at least one predictive coder.

9. The method of claim 8, wherein said N path switching network comprises at least one switch adapted to receive an input signal.

10. A method of receiving a wireless transmission comprising the steps of: programming a count pattern into an N stage ring counter, wherein N is an integer of value greater than one; producing an N-cycle digital waveform; combining said N-cycle digital waveform with said wireless transmission; oversampling said combined digital waveform and said wireless transmission to form a high speed serial stream, said high speed serial stream comprised of a signal of interest and a quantization noise signal; suppressing said quantization noise signal; converting said high speed data stream into a lower speed; clocking said N stage ring counter with a clock coupled to the counter; wherein combining includes using an N path switching network; receiving an output from a respective switch of said N path switching network at a respective predictive coder of at least two predictive coders; and receiving output signals from all of said at least two predictive coders at each of least two (M) digital filters, wherein the outputs of each of the at least two digital filters, each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states, wherein coefficients of the digital filters are adjusted to ensure that I and Q outputs of the at least two digital filters are amplitude and phase matched notwithstanding timing and gain imperfections in the output signals from all of said at least two predictive coders.

11. A method of receiving a wireless transmission comprising the steps of: programming a count pattern into an N stage ring counter, wherein N is an integer of value greater than one; producing an N-cycle digital waveform; combining said N-cycle digital waveform with said wireless transmission; oversampling said combined digital waveform and said wireless transmission to form a high speed serial stream, said high speed serial stream comprised of a signal of interest and a quantization noise signal; suppressing said quantization noise signal; converting said high speed data stream into a lower speed; clocking said N stage ring counter with a clock coupled to the counter; wherein combining includes using an N path switching network; receiving an output from a respective switch of said N path switching network at a respective predictive coder of at least two predictive coders; and receiving output signals from all of said at least two predictive coders at each of least two (M) digital filters, wherein the outputs of each of the at least two digital filters, each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states, receiving output signals at each of N paths from a switch of the N path switching network, each of the N paths outputting a signal to a predictive coder of the at least two predictive coders, wherein each of the N stage ring counters is configured to produce a different output frequency such that each of N paths processes a relatively narrow subband of a wideband input; said subbands corresponding to each path are arranged in order of ascending frequency; and collectively these subbands cover a wide frequency span.

12. The method of claim 11, wherein the wideband input is an intermediate frequency signal formed by downconverting a wireless transmission.

Description

DESCRIPTION OF THE DRAWINGS

(1) FIG. 1 is a block diagram of a prior art receiver;

(2) FIG. 2 is a block diagram of a prior art receiver;

(3) FIG. 3a is a block diagram of a prior art Analog-to-Digital front end;

(4) FIG. 3b is a block diagram of a prior art receiver;

(5) FIG. 4 is a block diagram of a wireless communications device according to an embodiment of the invention;

(6) FIG. 5 is a block diagram of an N stage ring counter according to an embodiment of the invention;

(7) FIG. 6a is a waveform of an N stage ring counter according to an embodiment of the invention;

(8) FIG. 6b is a waveform of an N stage ring counter according to an embodiment of the invention;

(9) FIG. 7a is a block diagram of an N path switching network according to an embodiment of the invention;

(10) FIG. 7b is a block diagram of an N path switching network according to an embodiment of the invention;

(11) FIG. 8 is a block diagram of a predictive coder according to an embodiment of the invention;

(12) FIG. 9a is a waveform of a predictive coder in operation according to an embodiment of the invention;

(13) FIG. 9b is a waveform of a predictive coder in operation according to an embodiment of the invention;

(14) FIG. 10a is a waveform of a predictive coder in operation according to an embodiment of the invention;

(15) FIG. 10b is a waveform of a predictive coder in operation according to an embodiment of the invention;

(16) FIG. 11 is a block diagram of a wireless communications device according to an embodiment of the invention;

(17) FIG. 12 is an example of a phase pairing scheme according to an embodiment of the invention.

(18) FIG. 13 is a block diagram of a wireless communications device having M digital filters according to an embodiment of the invention.

(19) FIG. 14 is a waveform plot of a simulation of FIG. 13.

(20) FIG. 15 is block diagram of a simple scheme to compensate for mismatches in gain deviation from quadrature between I and Q.

(21) FIG. 16 is a block diagram of a wireless communications device that implements a wideband receiver with coordinated sub-band quantization.

(22) FIG. 17 is a block diagram of a PLL based synthesizer used to generate the input switching waveforms for the subband downconversion in the coordinated subband embodiments.

(23) FIG. 18 is a block diagram of a coordinated subband quantization architecture wherein a conventional I-Q downconversion is used at the front end.

(24) FIG. 19 is a block diagram of a two stage I-Q image cancelling mixing operation.

(25) FIG. 20 may be a block diagram of a wideband reconstruction network that includes the subband translation and recombining.

(26) Throughout this description, elements appearing in FIGS. are assigned three-digit reference designators, where the most significant digit is the FIG. number and the two least significant digits are specific to the element. An element that is not described in conjunction with a FIG. may be presumed to have the same characteristics and function as a previously-described element having a reference designator with the same least significant digits.

DETAILED DESCRIPTION

(27) Description of Apparatus

(28) The invention described herein is directed to different embodiments of a wireless communications device that can be used in many different applications, such as but not limited to a digital oversampling receiver adapted to select desired signals and to reject undesired signals.

(29) FIG. 4 is a block diagram showing a digital receiver 100 according to an embodiment of the invention. The architecture of the digital receiver 100 in FIG. 4 is capable of operating in several different modes. The digital receiver 100 of FIG. 4 comprises an N stage ring counter 102, N path switching network 104, predictive coders 106, an in-phase (I) digital filter 108 and a quadrature (Q) digital filter 110, wherein an RF input signal 112 is received by the receiver 100 such that the receiver 100 is adapted to process the RF input signal 112 and produce an I output signal 114 and a Q output signal 116.

(30) The N stage ring counter 102 is configured to generate timing clock signals for the N path switching network 104 and the predictive coders 106. FIG. 5 discloses a block diagram of an embodiment of an N stage ring counter 102. The N stage ring counter 102 is designed using the maximum number of programmable stages for the counter, and a multiplexer is used to select which tap of the counter is fed back into the input. In an embodiment of the N stage ring counter 102, the outputs of both the master and slave stages of the master-slave flip-flops are used in order to permit half-clock cycle delays. The connections to the Preset (Pre) and Clear (Clr) inputs are not shown in FIG. 5, but are used to program the waveform to be conveyed by the counter 102. The programmability of the number of stages is implemented using a multiplexer (MUX) which directs which stage is selected to drive the first stage of the counter 102. In operation, the counter 102 would first be loaded asynchronously with the count pattern using the Preset and Clear inputs and then the counter 102 would be clocked, producing an N-cycle digital waveform. It should be noted, however, that since both master and slave outputs are monitored, an N-stage counter would have 2N outputs, thus doubling the number of available phase outputs. Furthermore, this makes an N-cycle waveform capable of being realized using only N/2 stages, provided that the counter waveforms be restricted to those wherein logic state transitions only one per flip-flop clock cycle. This latter restriction effectively places the restriction that the output waveform having 1s and 0s sequentially occurring in pairs.

(31) FIG. 6a discloses an example of a representative waveform of a five stage ring counter having a 10000 count sequence, while FIG. 6b discloses a six stage ring counter having a 111000 count sequence. Other embodiments having higher numbers of bits, two or more ring counters can be clocked in parallel to create multibit outputs to drive multibit N path switching networks 104.

(32) The N path switching network 104 is configured to have the same number of stages as the first N stage ring counter 102 that drives the network. In an embodiment of the one bit configuration, the switching network 104 can be comprised of N current steering MUXes that take the input differential signal and either inverts its polarity or passes it unchanged (mathematically this amounts to multiplying the signal by 1). In other embodiments, such as a 1.5 bit configuration, two current steering MUXes are used to collectively permit the passing of the signal, inverting the signal, or suppressing the signal (multiplying by 1 or 0). In other embodiments, the complexity of the switching network 104 can be extended to any number of bits through thermometric coding.

(33) An example of a schematic diagram of one path for the N path switching network 104 is shown in FIG. 7a, while FIG. 7b discloses a schematic diagram of a 1.5 bit version of the switching network 104. In the embodiment of FIG. 7a, each of the Sw inputs is driven by one output of the N stage ring counter 102. For the 1.5 bit system, switching signals are generated by simultaneously programming two separate ring counters 102 operating in synchrony. This approach to switching can be extended to M bits through the use of 2.sup.M1 switches operating in parallel and a corresponding increase in the complexity of the ring counter, for example 2.sup.M1 ring counters operating in parallel.

(34) Referring back to FIG. 4, the output of each of the switches 105 in the switching network 104 is arranged to be the input for a respective predictive coder 106, which serves as the front end of an oversampling analog-to-digital (A/D) converter. The output of the predictive coder 106 is then fed into a digital filter, which both suppresses the quantization noise and simultaneously converts the high speed serial data stream into a lower speed parallel data stream. A block diagram of the predictive coder 106 with the post filtering is shown in FIG. 8. In the embodiment of the predictive coder 106 of FIG. 8, the predictive coder 106 comprises a feedback loop including a quantizer 120 and a feedback analog finite impulse response (FIR) filter 122 which is configured to produce a high speed serial stream which contains the signal of interest along with quantization noise. A digital FIR filter 124 is configured to suppress the quantization noise and convert the high speed serial data stream into a lower speed parallel data stream.

(35) At least one advantage of the invention is that the oversampling converter avoids the use of continuous time circuitry, which severely limits the maximum achievable effective number of bits (ENOB) because of the sensitivity to jitter. Furthermore, the invention exploits the inherent speed of differential current steering design technology and is therefore capable of operating at clock speeds in excess of 11 GHz. Yet another advantage of the invention is that the predictive coders 106 can be clocked using the same clock as the switching network 104, a multiple of the clocks, or a submultiple of the clocks used in the switching network discussed above. This programmable ratio is achieved by placing a repeating pattern in the ring counter to be operated at the multiple of the slower frequency.

(36) FIGS. 9a and 9b are examples of timing diagrams of an embodiment of the predictive coder 106 while in operation, wherein the number of stages of the ring counters 102 is set to eight. In FIG. 9a, a 11110000 pattern is programmed into the switching path (an LO frequency of 5 GHz8=625 MHz). The predictive coder 106 is clocked using a 10101010 pattern (a clock frequency of 2.5 GHz). Note that in this configuration there are 16 separate phases (through the use of master and slave outputs from each of the flip-flops). In FIG. 9b, this situation is reversed and the LO is 2.5 GHz and the predictive coder clock is 625 MHz. Thus, the receiver can be programmed to accommodate relatively narrowband, high carrier frequency signals or relatively wideband, low carrier frequency signals through the appropriate programming of the ring counters. The number of stages and/or the pattern programmed into the switching path 104 and the predictive coder 106, as discussed above, are non-limiting examples and are not intended to limit the scope of the invention. In other embodiments, the ring counters 102 can have more or less than eight stages, while the pattern programmed into either the switching path 104 or the predictive coder 106 can be the same or different.

(37) FIGS. 10a-10b disclose a numerical simulation of an embodiment of the predictive coder 106 while in operation. The clock frequency is normalized to 1 Hz and the resolution of the quantizer is one bit. In similar fashion to other feedback oversampling A/D converter engines, such as the delta-sigma converter, the overall resolution is given by the resolution of the quantizer 120 along with the frequency of the clock signal that is being fed into the predictive coder 106. If either the resolution of the quantizer 120 or the ratio of the clock frequency to the bandwidth of the input signal is increased, the resolution of the converter improves. FIG. 10a shows the time domain waveforms, with the original sine wave as a solid line, the predictive coder output (with incomplete filtering) is dotted, and the dashed waveform representing the transient error. FIG. 10b shows the Fast Fourier Transform (FFT) of the output, wherein the spectrum of an ideal sine wave is shown as a dotted line while the coder output is shown as a solid line.

(38) In an embodiment of the invention, the N stage ring counter 102 that drives the N path switching network 104 is/are programmed with a simple 50% duty cycle waveform. However, in other embodiments, the N stage ring counter 102 and the N path switching network 104 can have a duty cycle waveform higher or lower than 50%, and is not intended to be limited to a simple 50% duty cycle waveform. In this embodiment, the N paths of the switching network 104 produce 2N (because both master and slave outputs are used) time shifted (therefore phase shifted) versions of the LO waveform. Although the waveforms are square waves, because the effective LO frequency is so close to the incoming carrier frequency the frequency of the third and higher odd harmonics of the square wave are greatly separated from the fundamental. Thus the effect of these harmonics can be ignored and the system can be analyzed as if the LO signals are sine waves. By the very nature of the ring counter 102, the phases of these signals occur in 360/2N phase increments. For example, an eight stage counter 102 with a 11110000 waveform would produce sixteen outputs separated in phase increments of 22.5. These multiple outputs can be trigonometrically combined to produce conventional I-Q outputs as will be described herein.

(39) The underlying theory of operation for the receiver 100 is that the amplitude and phase information of any incoming waveform can be uniquely extracted from the incoming waveform using two sine waves with any arbitrary phase difference between them. Although the usual case prescribes that the two signals be in perfect phase quadrature (i.e., 90 out of phase with each other), any two arbitrary phases can be used as long as they are not in perfect phase alignment or 180 out of phase with one another. FIG. 11 discloses a block diagram of such a system, which we will now proceed to analyze.

(40) Since amplitude and phase information can be extracted using any two arbitrary phases, it then necessarily follows that it should be possible to use trigonometric identities to generate the waveforms that would result from the use of waveforms in true quadrature. Let us assume, for example, then that the incoming waveform is one that has been modulated using conventional quadrature modulation, that is
x(t)=I(t)cos t+Q(t)sin t

(41) If we mix this signal (or equivalently multiply it) with a signal cos (t+.sub.1), the mathematical expression for the resulting waveform is as follows:

(42) $\begin{array}{c}{y}_1\left(t\right)=x\left(t\right)\left[\cos \left(t+{}_1\right)\right]\\ =x\left(t\right)\left[\cos t\cos {}_1-\sin t\sin {}_1\right]\\ =\left[I\left(t\right)\cos t+Q\left(t\right)\sin t\right]\left[\cos t\cos {}_1-\sin t\sin {}_1\right]\\ =I\left(t\right)\cos {}_1{\cos }^{2}t+Q\left(t\right)\cos {}_1\sin t\cos t-\\ I\left(t\right)\sin {}_1\sin t\cos t-Q\left(t\right)\sin {}_1{\sin }^{2}t\\ =\frac{I\left(t\right)}{2}\cos {}_1\left(1+\cos 2t\right)+\frac{Q\left(t\right)}{2}\cos {}_1\sin 2t-\\ \frac{I\left(t\right)}{2}\sin {}_1\sin 2t-\frac{Q\left(t\right)}{2}\sin {}_1\left(1-\cos 2t\right)\end{array}$

(43) Note that the above waveform contains both baseband (or DC) components as well as components that are spectrally centered about twice the carrier frequency. Since the phase and amplitude information is contained in the baseband components, we can discard the higher frequency components by lowpass filtering to reject the components centered about twice the carrier frequency:

(44) $y_1^{\mathrm{BB}}\left(t\right)=\frac{I\left(t\right)}{2}\cos {}_1-\frac{Q\left(t\right)}{2}\sin {}_1,$

(45) The superscript BB represents just the baseband component (or amplitude and phase information) for the signal under consideration. It also follows that if a second signal (with a phase .sub.2) is additionally mixed with the incoming signal, the resulting baseband waveform would be:

(46) $y_2^{\mathrm{BB}}\left(t\right)=\frac{I\left(t\right)}{2}\cos {}_2-\frac{Q\left(t\right)}{2}\sin {}_2$

(47) These two equations can be arranged in matrix form and used to solve for I(t) and Q(t) in terms of the baseband waveforms y.sub.1.sup.BB(t) and y.sub.2.sup.BB(t).

(48) $\left[\begin{array}{cc}\frac{\cos {}_1}{2}& -\frac{\sin {}_1}{2}\\ \frac{\cos {}_2}{2}& -\frac{\sin {}_2}{2}\end{array}\right]\left[\begin{array}{c}I\left(t\right)\\ Q\left(t\right)\end{array}\right]=\left[\begin{array}{c}{y}_1^{\mathrm{BB}}\left(t\right)\\ y_2^{\mathrm{BB}}\left(t\right)\end{array}\right]$$\mathrm{Solving}\mathrm{for}I\left(t\right),Q\left(t\right)$$I\left(t\right)=\frac{\begin{array}{c}-2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)+\\ 2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\begin{array}{c}-\sin {}_2\cos {}_1+\\ \sin {}_1\cos {}_2\end{array}}=\frac{\begin{array}{c}2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)-\\ 2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\sin \left({}_2-{}_1\right)}$$Q\left(t\right)=\frac{\begin{array}{c}2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)-\\ 2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)\end{array}}{\begin{array}{c}-\sin {}_2\cos {}_1+\\ \sin {}_1\cos {}_2\end{array}}=\frac{\begin{array}{c}2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)-\\ 2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\sin \left({}_2-{}_1\right)}$

(49) Since this embodiment of the N path system generates projections from N different phases of the LO it would follow that N2 of these phases are redundant to generate the amplitude and phase information from the incoming signal of interest. Yet these redundant signals can be advantageously used to improve the detection of the amplitude and phase of the incoming signal, resulting in a signal processing gain and commensurate improvement in signal-to-noise ratio (SNR). However, the challenge in using these N outputs is to accomplish the following:

(50) 1. Choose pairs of outputs from which estimates of I(t) and Q(t) can be computed. These estimates are then added together (effectively averaging them together times a scaling factor).

(51) 2. Since there is no canonical way of choosing such pairs we must establish some reasonable criteria in choosing such pairs: a. Every phase will appear in the same number of pairs as every other phase. This keeps the estimates of I(t) and Q(t) from favoring one or more particular phases. b. Each of the pairs must be chosen in such a way as to ensure that (.sub.2.sub.1) will never be 0 or 180. c. To the extent possible, it is important to ensure that the angle between the two phases (.sub.2 and .sub.1) is large enough so that the values of coefficients are not excessively large or small.

(52) At least one methodology for choosing these pairs that satisfies these criteria is to pair off every other phase (i.e., 0 and 2, 1 and 3, 2 and 4, 3 and 5, etc.) so that N pairs are formed. This methodology satisfies all three criteria above provided that N is not excessively large. For example if N=128, then the angle between pairs would be 5.625, which has a sine of 0.098. An example of how this pairing scheme is implemented, wherein Phase k is paired with Phase k+2 and N=7 is shown in FIG. 12.

(53) Once the pairs are chosen, the equations for I(t) and Q(t) in terms of y.sub.1.sup.BB(t) and y.sub.2.sup.BB(t) are used to compute the necessary coefficients to multiply y.sub.1.sup.BB(t) and y.sub.2.sup.BB(t). For an N path architecture, there are N pairs of phases, which each produce an estimate of I(t) and Q(t). When these N estimates of I(t) and Q(t) are added together, the net effect is that the N estimates are averaged (with a scaling factor), resulting in a processing gain as stated earlier. The results of a Monte Carlo simulation showing the effect processing gain is shown in Table 1.

(54) TABLE-US-00001 TABLE 1 N Gain Err. [dB] Phase Err. [ ] 8 0.512 2.561 12 0.447 2.034 16 0.368 2.009 24 0.339 1.555 32 0.326 1.6 64 0.189 1.044

(55) Each path was simulated with a uniformly distributed random gain error of 1 dB and phase error of 10. As the number of paths (N) increases, the overall gain and phase error of the recovered I and Q information improves, showing the effect of this processing gain.

(56) The architecture of the invention is ideal for implementation as a highly integrated circuit. Digital filters are not prone to the lot-to-lot variations of passive devices, obviating the need for complex architectures to compensate for these variations in inductor and capacitor values. Since conversion to digital is done in functionally the first stage of the receiver, the receiver is less prone to distortion and therefore is capable of much greater dynamic range performance than a conventional analog architecture.

(57) The invention disclosed herein is an improvement over conventional receivers, in particular, the multipath architecture permits more accurate detection of the phase and amplitude of a received signal, thereby achieving far better signal to noise ratio (SNR) relative to it. In addition, by using independently programmable waveforms for frequency translation and quantization, the invention provides a user much greater flexibility programming the desired bandwidth and carrier frequency of the receiver independently. In contrast, U.S. Pat. No. 6,748,025 could only achieve a bandwidth that scales with carrier frequency.

(58) Lastly, all of the above makes it possible to implement a communication device capable of operating over a very wide range of frequencies using a highly integrated circuit without the need to reprogram the circuit using external passive components (referred to as frequency agility). While previous architectures have claimed such agility, they have generally required the use of external passive devices and/or have achieved such agility at the expense of receiver performance.

(59) Although the invention has been described in considerable detail with reference to certain configurations thereof, other versions are possible, such that the invention may be embodied in other specific forms without departing from its spirit or essential characteristics.

(60) In the preceding discussion, the derivation of the N (N being the number of phases or paths) I(t) and Q(t) estimates was based on the computation of coefficients for N non-quadrature decompositions of an incoming signal. Noting, however, that each of the N phases appears twice in the list of decompositions (once as the first phase in a pair and once as the second phase), it is possible then to compute the coefficients corresponding to the k.sup.th phase directly without having to form the pairs referred to in the discussion above. Thus an alternate realization is possible utilizing half as many coefficients (N of them to be exact) as the preceding discussion (which requires the addition of 2N terms). Reviewing the equations derived above:

(61) $I\left(t\right)=\frac{\begin{array}{c}-2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)+\\ 2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\begin{array}{c}-\sin {}_2\cos {}_1+\\ \sin {}_1\cos {}_2\end{array}}=\frac{\begin{array}{c}2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)-\\ 2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\sin \left({}_2-{}_1\right)}$$Q\left(t\right)=\frac{\begin{array}{c}2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)-\\ 2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)\end{array}}{\begin{array}{c}-\sin {}_2\cos {}_1+\\ \sin {}_1\cos {}_2\end{array}}=\frac{\begin{array}{c}2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)-\\ 2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\sin \left({}_2-{}_1\right)}$
We can rewrite these as:
I(t)=C.sub.1.sup.Iy.sub.1.sup.BB(t)+C.sub.2.sup.Iy.sub.2.sup.BB(t)
Q(t)=C.sub.1.sup.Qy.sub.1.sup.BB(t)+C.sub.2.sup.Qy.sub.2.sup.BB(t)
where:

(62) $C_1^I=\frac{2\sin {}_2}{\sin \left({}_2-{}_1\right)}$$C_2^I=\frac{-2\sin {}_1}{\sin \left({}_2-{}_1\right)}$$C_1^Q=\frac{2\cos {}_2}{\sin \left({}_2-{}_1\right)}$$C_2^Q=\frac{-2\cos {}_1}{\sin \left({}_2-{}_1\right)}$

(63) (Note that the definitions of .sub.1 and .sub.2 are different between the first and third equations versus the second and fourth equations. A particular phase (say, k) will appear as .sub.1 in the first and third equations and as .sub.2 in the second and fourth equations.

(64) In the N=7 example previously introduced, Phase 0 appears in the list as the first term in the first pair and as the second term in the sixth pair (see FIG. 12). Since the results of each of the pair is combined to form the overall estimates for I(t) and Q(t), we can combine the contributions of Phase 0 in the first and sixth terms directly and establish the overall coefficient corresponding to Phase 0 without having to form pairs. In the first equation, Phase 0 is combined with Phase

(65) $2.Math.\frac{2}{7}$
(with Phase 0 appearing as .sub.1) and in the sixth equation, Phase 0 is combined with Phase

(66) $5.Math.\frac{2}{7}$
(with Phase 0 appearing as .sub.2). Thus we can combine the C.sub.1.sup.I and C.sub.1.sup.Q from the first equations with the C.sub.2.sup.I and C.sub.2.sup.Q from the second equations to tabulate an overall coefficient representing the total contribution of Phase 0 to I(t) and Q(t) outputs of the N paths:

(67) $K_0^I=\frac{2\sin \left(2.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}-\frac{2\sin \left(5.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}=2$$K_0^Q=\frac{2\cos \left(2.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}-\frac{2\cos \left(5.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}=0$

(68) Even though this is a trivial example (it is not a surprise that Phase 0 would have complete contribution to the cosine term and no contribution to the sine term since Phase 0 is itself identical to the cosine term), we can generalize the above to the k.sup.th phase of N total phases:

(69) 0$K_k^I=\frac{2\sin \left[\left(k+2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}-\frac{2\sin \left[\left(k-2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}=\frac{4\cos \left(\frac{2k}{N}\right)\sin \left(\frac{4}{N}\right)}{\sin \left(\frac{4}{N}\right)}=4\cos \left(\frac{2k}{N}\right)$$K_k^Q=\frac{2\cos \left[\left(k+2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}-\frac{2\cos \left[\left(k-2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}=-\frac{4\sin \left(\frac{2k}{N}\right)\sin \left(\frac{4}{N}\right)}{\sin \left(\frac{4}{N}\right)}=-4\sin \left(\frac{2k}{N}\right)$
where:
k=0 . . . N1

(70) Of course, since the 4 is a scaling factor, it can be dropped from both coefficients yielding a fairly simple result. The implication of this result is that the coefficients corresponding to each of the oversampling converter outputs can be computed without using intermediate pairs.

(71) In the preceding discussion, the derivation of the N (N being the number of phases or paths) I(t) and Q(t) estimates was based on the computation of coefficients for N non-quadrature decompositions of an incoming signal. Noting, however, that each of the N phases appears twice in the list of decompositions (once as the first phase in a pair and once as the second phase), it is possible then to compute the coefficients corresponding to the k.sup.th phase directly without having to form the pairs referred to in the discussion above. Thus an alternate realization is possible utilizing half as many coefficients (N of them to be exact) as the preceding discussion (which requires the addition of 2N terms). Reviewing the equations derived above:

(72) $I\left(t\right)=\frac{\begin{array}{c}-2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)+\\ 2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\begin{array}{c}-\sin {}_2\cos {}_1+\\ \sin {}_1\cos {}_2\end{array}}=\frac{\begin{array}{c}2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)-\\ 2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\sin \left({}_2-{}_1\right)}$$Q\left(t\right)=\frac{\begin{array}{c}2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)-\\ 2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)\end{array}}{\begin{array}{c}-\sin {}_2\cos {}_1+\\ \sin {}_1\cos {}_2\end{array}}=\frac{\begin{array}{c}2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)-\\ 2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)\end{array}}{\sin \left({}_2-{}_1\right)}$
We can rewrite these as:
I(t)=C.sub.1.sup.Iy.sub.1.sup.BB(t)+C.sub.2.sup.Iy.sub.2.sup.BB(t)
Q(t)=C.sub.1.sup.Qy.sub.1.sup.BB(t)+C.sub.2.sup.Qy.sub.2.sup.BB(t)
where:

(73) $C_1^I=\frac{2\sin {}_2}{\sin \left({}_2-{}_1\right)}$$C_2^I=\frac{-2\sin {}_1}{\sin \left({}_2-{}_1\right)}$$C_1^Q=\frac{2\cos {}_2}{\sin \left({}_2-{}_1\right)}$$C_2^Q=\frac{-2\cos {}_1}{\sin \left({}_2-{}_1\right)}$

(74) (Note that the definitions of .sub.1 and .sub.2 are different between the first and third equations versus the second and fourth equations. A particular phase (say, k) will appear as .sub.1 in the first and third equations and as .sub.2 in the second and fourth equations.

(75) In the N=7 example previously introduced, Phase 0 appears in the list as the first term in the first pair and as the second term in the sixth pair (see FIG. 12). Since the results of each of the pair is combined to form the overall estimates for I(t) and Q(t), we can combine the contributions of Phase 0 in the first and sixth terms directly and establish the overall coefficient corresponding to Phase 0 without having to form pairs. In the first equation, Phase 0 is combined with Phase

(76) $2.Math.\frac{2}{7}$
(with Phase 0 appearing as .sub.1) and in the sixth equation, Phase 0 is combined with Phase

(77) $5.Math.\frac{2}{7}$
(with Phase 0 appearing as .sub.2). Thus we can combine the C.sub.1.sup.I and C.sub.1.sup.Q from the first equations with the C.sub.2.sup.I and C.sub.2.sup.Q from the second equations to tabulate an overall coefficient representing the total contribution of Phase 0 to I(t) and Q(t) outputs of the N paths:

(78) $K_0^I=\frac{2\sin \left(2.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}-\frac{2\sin \left(5.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}=2$$K_0^Q=\frac{2\cos \left(2.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}-\frac{2\cos \left(5.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}=0$

(79) Even though this is a trivial example (it is not a surprise that Phase 0 would have complete contribution to the cosine term and no contribution to the sine term since Phase 0 is itself identical to the cosine term), we can generalize the above to the k.sup.th phase of N total phases:

(80) $K_k^I=\frac{2\sin \left[\left(k+2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}-\frac{2\sin \left[\left(k-2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}=\frac{4\cos \left(\frac{2k}{N}\right)\sin \left(\frac{4}{N}\right)}{\sin \left(\frac{4}{N}\right)}=4\cos \left(\frac{2k}{N}\right)$$K_k^Q=\frac{2\cos \left[\left(k+2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}-\frac{2\cos \left[\left(k-2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}=-\frac{4\sin \left(\frac{2k}{N}\right)\sin \left(\frac{4}{N}\right)}{\sin \left(\frac{4}{N}\right)}=-4\sin \left(\frac{2k}{N}\right)$
where:
k=0 . . . N1

(81) Of course, since the 4 is a scaling factor, it can be dropped from both coefficients yielding a fairly simple result. The implication of this result is that the coefficients corresponding to each of the oversampling converter outputs can be computed without using intermediate pairs.

(82) In the preceding discussion, the derivation of the N (N being the number of phases or paths) I(t) and Q(t) estimates was based on the computation of coefficients for N non-quadrature decompositions of an incoming signal. Noting, however, that each of the N phases appears twice in the list of decompositions (once as the first phase in a pair and once as the second phase), it is possible then to compute the coefficients corresponding to the k.sup.th phase directly without having to form the pairs referred to in the discussion above. Thus an alternate realization is possible utilizing half as many coefficients (N of them to be exact) as the preceding discussion (which requires the addition of 2N terms). Reviewing the equations derived above:

(83) $I\left(t\right)=\frac{-2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)+2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)}{-\sin {}_2\cos {}_1+\sin {}_1\cos {}_2}=\frac{2\sin {}_2{y}_1^{\mathrm{BB}}\left(t\right)-2\sin {}_1{y}_2^{\mathrm{BB}}\left(t\right)}{\sin \left({}_2-{}_1\right)}$$Q\left(t\right)=\frac{2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)-2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)}{-\sin {}_2\cos {}_1+\sin {}_1\cos {}_2}=\frac{2\cos {}_2{y}_1^{\mathrm{BB}}\left(t\right)-2\cos {}_1{y}_2^{\mathrm{BB}}\left(t\right)}{\sin \left({}_2-{}_1\right)}$
We can rewrite these as:
I(t)=C.sub.1.sup.Iy.sub.1.sup.BB(t)+C.sub.2.sup.Iy.sub.2.sup.BB(t)
Q(t)=C.sub.1.sup.Qy.sub.1.sup.BB(t)+C.sub.2.sup.Qy.sub.2.sup.BB(t)
where:

(84) $C_1^I=\frac{2\sin {}_2}{\sin \left({}_2-{}_1\right)}$$C_2^I=\frac{-2\sin {}_1}{\sin \left({}_2-{}_1\right)}$$C_1^Q=\frac{2\cos {}_2}{\sin \left({}_2-{}_1\right)}$$C_2^Q=\frac{-2\cos {}_1}{\sin \left({}_2-{}_1\right)}$

(85) (Note that the definitions of .sub.1 and .sub.2 are different between the first and third equations versus the second and fourth equations. A particular phase (say, k) will appear as .sub.1 in the first and third equations and as .sub.2 in the second and fourth equations.

(86) In the N=7 example previously introduced, Phase 0 appears in the list as the first term in the first pair and as the second term in the sixth pair (see FIG. 12). Since the results of each of the pair is combined to form the overall estimates for I(t) and Q(t), we can combine the contributions of Phase 0 in the first and sixth terms directly and establish the overall coefficient corresponding to Phase 0 without having to form pairs. In the first equation, Phase 0 is combined with Phase

(87) $2.Math.\frac{2}{7}$
(with Phase 0 appearing as .sub.1) and in the sixth equation, Phase 0 is combined with Phase

(88) 0$5.Math.\frac{2}{7}$
(with Phase 0 appearing as .sub.2). Thus we can combine the C.sub.1.sup.I and C.sub.1.sup.Q from the first equations with the C.sub.2.sup.I and C.sub.2.sup.Q from the second equations to tabulate an overall coefficient representing the total contribution of Phase 0 to I(t) and Q(t) outputs of the N paths:

(89) $K_0^I=\frac{2\sin \left(2.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}-\frac{2\sin \left(5.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}=2$$K_0^Q=\frac{2\cos \left(2.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}-\frac{2\cos \left(5.Math.\frac{2}{7}\right)}{\sin \left(2.Math.\frac{2}{7}\right)}=0$

(90) Even though this is a trivial example (it is not a surprise that Phase 0 would have complete contribution to the cosine term and no contribution to the sine term since Phase 0 is itself identical to the cosine term), we can generalize the above to the k.sup.th phase of N total phases:

(91) $K_k^I=\frac{2\sin \left[\left(k+2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}-\frac{2\sin \left[\left(k-2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}=\frac{4\cos \left(\frac{2k}{N}\right)\sin \left(\frac{4}{N}\right)}{\sin \left(\frac{4}{N}\right)}=4\cos \left(\frac{2k}{N}\right)$$K_k^Q=\frac{2\cos \left[\left(k+2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}-\frac{2\cos \left[\left(k-2\right).Math.\frac{2}{N}\right]}{\sin \left(\frac{4}{N}\right)}=-\frac{4\sin \left(\frac{2k}{N}\right)\sin \left(\frac{4}{N}\right)}{\sin \left(\frac{4}{N}\right)}=-4\sin \left(\frac{2k}{N}\right)$
where: k=0 . . . N1

(92) Of course, since the 4 is a scaling factor, it can be dropped from both coefficients yielding a fairly simple result. The implication of this result is that the coefficients corresponding to each of the oversampling converter outputs can be computed without using intermediate pairs.

(93) The most common method of demodulating signals that are modulated using phase shift keying (i.e., signals in which digital information is encoded by selecting one of M phases of the carrier to convey log.sub.2 (M) bits of data per symbol), is to compare the magnitude (i.e., amplitude) and sign of the I and Q outputs of a conventional demodulator (see FIG. 2). Assuming that a coherent timing signal can be recovered from the incoming signal (or otherwise generated from a common time base shared between the transmitter and receiver). This method is highly effective for low values of M (for example binary phase shift keying (BPSK) where M=2 or quaternary phase shift keying (QPSK) where M=4), since each of the I and Q outputs need only be distinguished between two possible values, which can be done using low precision analog circuits. Theoretically it can be extended to larger values of M, but such a system would require that each of I and Q outputs be resolved into one of multiple values (for example I and Q take on five possible values for M=8). This places great demands on the performance of the analog circuits in I/Q receivers.

(94) A more direct method of placing the input signal into M phase bins can be developed by exploiting the improved amplitude and timing resolution afforded by the front end of the architecture of FIG. 4. Rather than using two digital filters back end of the receiver to produce I and Q outputs, M digital filters are used to evaluate the maximum likelihood of the input signal phase falling within one of the M phase bins. A block diagram of such a scheme is shown in FIG. 13. FIG. 13 may be a block diagram of an M-ary PSK demodulator based on the digital receiver architecture of this disclosure where the number of switching network paths would be N while the number of phase bins would be M. In one case, FIG. 13 may be similar to FIG. 4 but where the outputs of M digital filters (M, a number greater than two) each represent one phase state of a phase-shift keyed wireless transmission with M possible phase states.

(95) In FIG. 13, the front end of the receiver is as previously shown in FIG. 4, with a wireless transmission driving the input of an N path switching network 104 and culminating in N outputs from predictive coders 106. But rather than using two digital filters (108, 110) to produce I and Q outputs (114, 116) per FIG. 4, in FIG. 13, a collection of M digital filters 1300 is used to combine the outputs of the predictive coders 106 to produce a collection of M outputs 1310 (labeled Bin 0 Out through Bin M1 Out in FIG. 13). Here, Bin 0 is prescribed to correspond to a phase of zero while Bin M1 is prescribed to represent a phase of 2 (M1)/M. Ideally, only one of the M outputs would be non-zero and indicate the phase of the incoming wireless transmission. In practice, the corresponding bin would have the largest output while some adjacent bins may have smaller (but non-zero) outputs.

(96) A design similar to that of FIG. 13 is also considered where the N stage ring counter 102 programmed with a count pattern is replaced by a fixed divider attached to the clock and the predictive coders are replaced by delta-sigma analog to digital converters that are fed by the switches and output of the fixed divider.

(97) The components of FIG. 13 are preferably implemented as portions of specially-designed and manufactured electrical hardware circuitry, for example an integrated system on a chip including all or the majority of the elements as physical components thereof. However, in some cases, one or more the components could also be partially or fully implemented using software, or may operate as provided by or at the direction of configurable firmware.

(98) Note that the number of phases (or paths), which we will designate as N, can be greater than equal to or less than M (the desired number of phase bins). If N is greater than M, then the redundant phase information results in improving the signal to noise ratio of the detection. If N is less than M, much greater demand is placed on the performance of each path to correctly detect the phase of the incoming signal. Of course, the most trivial example of this principle would be the case where M phase bins are created using N=2 (in other words, conventional I-Q detection). Each of the M phase bins would be produced by the weighted sum of I and Q, where the weights would be dependent on the bin being detected. However, quality of the detection could never exceed the performance of a mathematically ideal detector operating on I and Q outputs that exhibit the gain mismatch and deviation from quadrature of an implementation using imperfect analog circuitry.

(99) The ideal method for detecting whether a signal has a particular phase would be to mix it with a signal that matches that exact phase (for example, to detect an ideal cosine wave one would mix it with a signal that is also a cosine, which would generate a DC component that is maximum). Based on this principle, it can be shown that the coefficient for the n.sup.th path of N total paths corresponding to the m.sup.th bin of M total phase bins would be:

(100) $K_n^m=\cos \left[2\left(\frac{m}{M}-\frac{n}{N}\right)\right]$

(101) This is easily checked for the trivial example of QPSK (where N=4 and M=4) . . . note that our notation requires that a conventional IQ detection use four phases.

(102) $\begin{array}{cc}{K}_0^0=\cos \left[2\left(\frac{0}{4}-\frac{0}{4}\right)\right]=1& K_1^0=\cos \left[2\left(\frac{0}{4}-\frac{1}{4}\right)\right]=0\\ K_0^1=\cos \left[2\left(\frac{1}{4}-\frac{0}{4}\right)\right]=0& K_1^1=\cos \left[2\left(\frac{1}{4}-\frac{1}{4}\right)\right]=1\\ K_0^2=\cos \left[2\left(\frac{2}{4}-\frac{0}{4}\right)\right]=-1& K_1^2=\cos \left[2\left(\frac{2}{4}-\frac{1}{4}\right)\right]=0\\ K_0^3=\cos \left[2\left(\frac{3}{4}-\frac{0}{4}\right)\right]=0& K_2^3=\cos \left[2\left(\frac{3}{4}-\frac{1}{4}\right)\right]=-1\end{array}$$\begin{array}{cc}{K}_2^0=\cos \left[2\left(\frac{0}{4}-\frac{2}{4}\right)\right]=-1& K_3^0=\cos \left[2\left(\frac{0}{4}-\frac{3}{4}\right)\right]=0\\ K_2^1=\cos \left[2\left(\frac{1}{4}-\frac{2}{4}\right)\right]=0& K_3^1=\cos \left[2\left(\frac{1}{4}-\frac{3}{4}\right)\right]=-1\\ K_2^2=\cos \left[2\left(\frac{2}{4}-\frac{2}{4}\right)\right]=1& K_3^2=\cos \left[2\left(\frac{2}{4}-\frac{3}{4}\right)\right]=0\\ K_2^3=\cos \left[2\left(\frac{3}{4}-\frac{2}{4}\right)\right]=0& K_3^3=\cos \left[2\left(\frac{3}{4}-\frac{3}{4}\right)\right]=1\end{array}$

(103) The above example demonstrates a simplification that occurs when M is any even number. For the above example (where M=4) the output of the m=2 phase bin is guaranteed mathematically to be the negative of the m=0 phase bin, and the output of the m=3 phase bin is guaranteed to be the negative of the m=1 phase bin. Hence half of these coefficients are redundant. That being said, producing four phase bin outputs permits the user to determine whether the detection is being performed optimally. Detection with suboptimal phasing would produce even bin outputs that do not vanish when the detected phase is odd or vice versa. Furthermore, it may be desirable to implement the detector using N odd, which then avoids the redundancy previously mentioned.

(104) The simulation of a 32 PSK demodulator is shown in FIG. 14. In the simulation of FIG. 14, the architecture of FIG. 13 is simulated, where the RF input is driven by a signal that is offset in frequency offset from that of the N-stage ring counters by 1 MHz. In FIG. 13, the X-axis is time and the Y-axis is phase (specifically a numeric value indicating which phase bin is active). The result is a waveform that sweeps through 2 radians of phase in 1 s. For easy visualization the output of each bin is conveyed in such a way that an output level of 1 (1401) results from Bin 0 being active, while an output level of 32 (1402) results from Bin 31 being active. That is, FIG. 14 is a waveform plot confirming this result in a simulation where within a period of 1 s, the input waveform rolls through 2 radians of phase (corresponding to 32 phase bins).

(105) A number of schemes may be employed to determine the maximum likelihood phase bin output (in the above simulation the correct phase bin was determined by observing which phase bin had an output more positive than its two neighbors).

(106) The block diagram of FIG. 4 was demonstrated (see Table 1) to reduce the inherent gain mismatch and phase deviation from quadrature between the I and Q paths. However, it may nevertheless be desirable to correct for the mismatches remaining in order to effect a perfect image cancellation and enhance the overall signal to noise performance of the receiver subsystem. In many cases this mismatch is static (or at least can be approximated so over a frequency band of interest) it can be compensated for using a simple calibration scheme shown below in FIG. 15. FIG. 15 may show a block diagram of a simple scheme to compensate for mismatches in gain deviation from quadrature between I and Q. FIG. 15 may be case where the coefficients of the digital filters of FIG. 4 or FIG. 13 are adjusted to ensure that the I and Q digital filter outputs (114 and 116, respectively in FIG. 4) are amplitude and phase matched notwithstanding timing and gain imperfections in the outputs of the predictive coders (106).

(107) The analysis of this scheme of FIG. 15 is as follows. Any quadrature downconversion system can be characterized by a gain mismatch (represented as a in the sine path 1520) and a deviation from quadrature (represented as c in 1520). While diagram depicts a zero intermediate frequency (IF) detection, the compensation scheme can be implemented for non-zero IF's in identical fashion. We also assume that the cosine phase (1510) and gain is correct since this assumption does not lead to a lack of generality. The effect of these gain and phase errors can be calculated using trigonometric identities:

(108) $y_I^{\mathrm{IF}}\left(t\right)=\left[I\left(t\right)\cos {}_{c}t+Q\left(t\right)\sin {}_{c}t\right].Math.\cos {}_{c}t=I\left(t\right){\cos }^2{}_{c}t+Q\left(t\right)\sin {}_{c}t\cos {}_{c}t=\frac{I\left(t\right)}{2}\left(1+\cos 2{}_{c}t\right)+\frac{Q\left(t\right)}{2}\sin 2{}_{c}t$$y_Q^{\mathrm{IF}}\left(t\right)=\left[I\left(t\right)\cos {}_{c}t+Q\left(t\right)\sin {}_{c}t\right].Math.\sin \left({}_{c}t+\mathrm{.Math.}\right)=\left[I\left(t\right)\cos {}_{c}t+Q\left(t\right)\sin {}_{c}t\right]\left(\cos \mathrm{.Math.}\sin {}_{c}t+\sin \mathrm{.Math.}\cos {}_{c}t\right)=[I\left(t\right)\cos \mathrm{.Math.}\sin {}_{c}t\cos {}_{c}t+Q\left(t\right)\cos \mathrm{.Math.}{\sin }^2{}_{c}t+I\left(t\right)\sin \mathrm{.Math.}{\cos }^2{}_{c}t+Q\left(t\right)\sin \mathrm{.Math.}\sin {}_{c}t\cos {}_{c}t]=\cos \mathrm{.Math.}\frac{I\left(t\right)}{2}\sin 2{}_{c}t+\cos \mathrm{.Math.}\frac{Q\left(t\right)}{2}\left(1-\cos 2{}_{c}t\right)+\sin \mathrm{.Math.}\frac{I\left(t\right)}{2}\left(1+\cos 2{}_{c}t\right)+\sin \mathrm{.Math.}\frac{Q\left(t\right)}{2}\sin 2{}_{c}t$

(109) As we have done with analyses previously in this disclosure, when we pick out the baseband (or in this case DC components) of the above signal:

(110) $y_I^{\mathrm{BB}}\left(t\right)=\frac{I\left(t\right)}{2}$$y_Q^{\mathrm{BB}}\left(t\right)=\cos \mathrm{.Math.}\frac{Q\left(t\right)}{2}+\sin \mathrm{.Math.}\frac{I\left(t\right)}{2}$

(111) Of course, we can see here that if we had an ideal situation (where =1 and =0) the Q output would produce the trivial and expected result. But we can see here that some of I output has, in a sense, crosstalked its way into Q output. It is also easy to show that this crosstalk can be removed as shown below:

(112) $y_I^{\mathrm{BB}}\left(t\right)=\frac{I\left(t\right)}{2}$$y_Q^{\mathrm{BB}}\left(t\right)=\cos \mathrm{.Math.}\frac{Q\left(t\right)}{2}+\sin \mathrm{.Math.}\frac{I\left(t\right)}{2}=\cos \mathrm{.Math.}\frac{Q\left(t\right)}{2}+\sin \mathrm{.Math.}.Math.y_I^{\mathrm{BB}}\left(t\right)$$y_Q^{\mathrm{BB}}\left(t\right)-\sin \mathrm{.Math.}.Math.y_I^{\mathrm{BB}}\left(t\right)=\cos \mathrm{.Math.}\frac{Q\left(t\right)}{2}\frac{y_Q^{\mathrm{BB}}\left(t\right)-\sin \mathrm{.Math.}.Math.y_I^{\mathrm{BB}}\left(t\right)}{\cos \mathrm{.Math.}}=\frac{Q\left(t\right)}{2}$

(113) which (if we renormalize the scaling factor of ) leads to the diagram of FIG. 15. FIG. 15. Thus, we can see that a correction factor of sin (1530 in FIG. 15) times the I output would correct for the phase error of the Q path. Finally, a scaling of ( cos ).sup.1 (1540 in FIG. 15) corrects the scaling error between the I and Q paths.

(114) The components of FIG. 15 are preferably implemented as portions of specially-designed and manufactured electrical hardware circuitry, for example an integrated system on a chip including all or the majority of the elements as physical components thereof. However, in some cases, one or more the components could also be partially or fully implemented using software, or may operate as provided by or at the direction of configurable firmware.

(115) The methodology for measuring the coefficients and (i.e., calibrating the system) is fairly straightforward. Consider a sine wave with a frequency .sub.i slightly offset from .sub.c. Then:

(116) $y_I^{\mathrm{IF}}\left(t\right)=A\cos {}_{i}t.Math.\cos {}_{c}t=\frac{A}{2}\left[\cos \left({}_i+{}_c\right)t+\cos \left({}_i-{}_c\right)t\right]$$y_Q^{\mathrm{IF}}\left(t\right)=A\cos {}_{i}t.Math.\sin \left({}_{c}t+\mathrm{.Math.}\right)=A\cos {}_{i}t\left(\cos \mathrm{.Math.}\sin {}_{c}t+\sin \mathrm{.Math.}\cos {}_{c}t\right)=A\cos \mathrm{.Math.}\cos {}_{i}t\sin {}_{c}t+A\sin \mathrm{.Math.}\cos {}_{i}t\cos {}_{c}t=\frac{A\cos \mathrm{.Math.}}{2}\left[\sin \left({}_i+{}_c\right)t-\sin \left({}_i-{}_c\right)t\right]+\frac{A\sin \mathrm{.Math.}}{2}\left[\cos \left({}_i+{}_c\right)t+\cos \left({}_1-{}_c\right)t\right]$

(117) Once again taking the baseband components only (i.e., the difference frequency):

(118) $y_I^{\mathrm{BB}}\left(t\right)=A\cos {}_{i}t.Math.\cos {}_{c}t=\frac{A}{2}\cos \left({}_i-{}_c\right)t$$y_Q^{\mathrm{BB}}\left(t\right)=\frac{A\cos \mathrm{.Math.}}{2}\left[-\sin \left({}_i-{}_c\right)t\right]+\frac{A\sin \mathrm{.Math.}}{2}\left[\cos \left({}_i-{}_c\right)t\right]=\frac{A}{2}\left[\sin \mathrm{.Math.}\cos \left({}_i-{}_c\right)t-\cos \mathrm{.Math.}\sin \left({}_i-{}_c\right)t\right]=-\frac{A}{2}\left[\sin \left({}_i-{}_c\right)t\cos \mathrm{.Math.}-\cos \left({}_i-{}_c\right)t\sin \mathrm{.Math.}\right]=-\frac{A}{2}\sin \left[\left({}_i-{}_c\right)t-\mathrm{.Math.}\right]=\frac{A}{2}\left[\sin \left({}_i-{}_c\right)t\sin \left(\mathrm{.Math.}-\frac{}{2}\right)+\cos \left({}_i-{}_c\right)t\cos \left(\mathrm{.Math.}-\frac{}{2}\right)\right]=\frac{A}{2}\cos \left[\left({}_i-{}_c\right)t-\left(\mathrm{.Math.}-\frac{}{2}\right)\right]=\frac{A}{2}\cos \left[\left({}_i-{}_c\right)t+\left(\frac{}{2}-\mathrm{.Math.}\right)\right]$

(119) Thus the result is a pair of sine waves with the I output assumed to be the reference phase and amplitude and the Q: output scaled (relative to I) in amplitude by and with a phase lead of

(120) 0$\frac{}{2}-\mathrm{.Math.}$
radians. A number of methods may be employed to measure the amplitude and phase of the I and Q outputs directly. One such method is the IEEE-STD-1057 algorithm. Other methods (such as using a digitally synthesized cosine and sine wave to extract the phase and amplitude of y.sub.1.sup.BB(t) and y.sub.Q.sup.BB(t)) may also be employed.

(121) A connection can be explained between this embodiment of FIG. 15, this methodology and the structure in FIG. 4 as follows. The implementation of this correction can be embedded into the digital filter (108 and 110 in FIG. 4). If the I output (114 in FIG. 4) is defined as the scaled sum of outputs of the N predictive coders (labeled 106 in FIG. 4):

(122) $\underset{n=0}{\overset{N-1}{.Math.}}{C}_n^I.Math.{\mathrm{PC}}_n$

(123) where PCn is defined as the output of the nth predictive coder and the Q output (116 in FIG. 4) under a no mismatch condition is similarly defined as another scaled sum of the N predictive coders (again 106 in FIG. 4):

(124) $\underset{n=0}{\overset{N-1}{.Math.}}{C}_n^Q.Math.{\mathrm{PC}}_n$

(125) then the correction for and can be applied by calculating a modified set of coefficients for the Q output as follows:

(126) $Q\left(\mathrm{corrected}\right)=\underset{n=0}{\overset{N-1}{.Math.}}{K}_n^Q.Math.{\mathrm{PC}}_n$

(127) where:

(128) $K_n^Q\stackrel{\mathrm{def}}{=}\frac{C_n^Q+\left(\sin \mathrm{.Math.}\right).Math.C_n^I}{\cos \mathrm{.Math.}}$

(129) The objective of any direct sampling scheme is to minimize the noise that referred to the input (in this case the wireless transmission being received). At low speeds oversampling converters (such as delta-sigma converters, predictive coders, or noise shaping converters) are capable of achieving exceptionally high signal-to-noise ratios (SNRs) with SNRs in excess of 100 dB being commonplace. Yet, the behavior of high speed semiconductor circuitry operating at clock rates appropriate for oversampling wireless transmissions (in excess of 1 GHz) have comparatively poor SNR (in rough numbers 60-70 dB, or between 10-11 effective bits).

(130) In this embodiment, the input signal is essentially divided into subbands and each subband is quantized using oversampled quantization in a temporally coordinated way that allows the reconstruction of the original baseband signal from the several narrowband pieces. By limiting the bandwidth over which any single quantizer must operate, it is possible to create wideband converter that nevertheless exhibits the same signal-to-noise ratio as the converter for any single subband.

(131) The block diagram of such a receiver is shown in FIG. 16. FIG. 16 may be a block diagram of a wireless communications device that implements a wideband receiver with coordinated sub-band quantization. Note that the architecture is identical to that of FIG. 4 with two exceptions: (1) the counter (now counters 1610) driving the input switching stage and (2) the combining network following the bank of oversampling converters. A more detailed explanation of the operation follows.

(132) In this embodiment shown in FIG. 16, the switching stage (1630) is used to create a bank of I-Q pairs each designed to downconvert a subband of the input signal to a convenient intermediate frequency (IF), which is then converted to digital data streams by the predictive coders (1640) representing the outputs of the switching network (1630). The output of the predictive coders are processed through digital filters (1650) to produce pairs of I and Q output (1662, 1664), each representing the signal content of a particular subband.

(133) While not necessary, in the preferred embodiment all of the subbands are converted to matching intermediate frequencies in order to ensure delay matching between paths. The number of subbands used is chosen by the designer in order to achieve a desired effective resolution (effective number of bits, or ENOB). For a given clock rate of the programmable divider (1620) and order for the predictive coder, a narrower subband will yield a higher ENOB, but a given total bandwidth will then require more subbands. Alternatively, a wider subband will cover a given bandwidth using fewer subbands, but will achieve a lower ENOB (for a given programmable divider clock rate and predictive coder order).

(134) The components of FIG. 16 are preferably implemented as portions of specially-designed and manufactured electrical hardware circuitry, for example an integrated system on a chip including all or the majority of the elements as physical components thereof. However, in some cases, one or more the components could also be partially or fully implemented using software, or may operate as provided by or at the direction of configurable firmware.

(135) In one embodiment, a single pair of predictive coders is used to perform the I-Q downconversion and quantization (equivalent to FIG. 4 where N=2). However, it is also possible in an alternate embodiment to group more than two paths in a multiphase configuration (per FIG. 4) to construct I-Q outputs using the first embodiment of this invention.

(136) In the preferred embodiment, an ensemble of subbands are downconverted to a prescribed intermediate frequency. This requires that the following equation be satisfied (assuming low-side injection):
f.sub.IF=f.sub.inf.sub.counter
f.sub.counter=f.sub.inf.sub.IF

(137) In one embodiment the switching waveforms may be generated by digital synthesis. For this embodiment, if we further define f.sub.in f.sub.0+k.Math.f where k is a programmed constant (defining the subband) and arrange it so that f.sub.0f.sub.IFRf where R is a fixed constant, then:
f.sub.counter=f.sub.inf.sub.IF=f.sub.0+k.Math.ff.sub.IF
=f.sub.0f.sub.IF+k.Math.f=(R+k)f

(138) Further arranging it so that the bandwidth is an integer submultiple of a high speed master clock frequency, such that

(139) $f\frac{f_{\mathrm{clk}}}{D}.$
The result is simple rational fraction digital synthesis solution:

(140) $f_{\mathrm{counter}}=\left(R+k\right)f=\left(R+k\right)\frac{f_{\mathrm{clk}}}{D}=\frac{R+k}{D}{f}_{\mathrm{clk}},$
which is easily synthesized using the phaselocked loop synthesizer shown in FIG. 17. FIG. 17 may be a block diagram of a PLL based synthesizer used to generate the input switching waveforms for the subband downconversion in the coordinated subband embodiments.

(141) The components of FIG. 17 are preferably implemented as portions of specially-designed and manufactured electrical hardware circuitry, for example an integrated system on a chip including all or the majority of the elements as physical components thereof. However, in some cases, one or more the components could also be partially or fully implemented using software, or may operate as provided by or at the direction of configurable firmware.

(142) The generation of I/Q waveforms through the use of a master-slave flip-flop was already discussed previously (see the discussion on the N stage ring counter on p. 4).

(143) In a variation of this embodiment, a pair of circuits as shown in FIG. 17 are preceded by a conventional quadrature downconversion stage. In this variation, the first local oscillator is arranged to have a frequency that is very close to the incoming RF such that the output IF is half the desired detection bandwidth.

(144) A block diagram of this embodiment is shown in FIG. 18. FIG. 18 may be a block diagram of a coordinated subband quantization architecture wherein a conventional I-Q downconversion is used at the front end. A downconversion stage (1810) shifts the signal of an incoming wireless transmission to a lower intermediate frequency (IF). Each of the I (1820) and Q (1830) outputs of the downconversion stage is then converted to a second intermediate frequency and subsequently to a digital form through a switching network, a collection of predictive coders, and a pair of digital filters (similar in form to that of FIG. 4)one for each subband.

(145) The components of FIG. 18 are preferably implemented as portions of specially-designed and manufactured electrical hardware circuitry, for example an integrated system on a chip including all or the majority of the elements as physical components thereof. However, in some cases, one or more the components could also be partially or fully implemented using software, or may operate as provided by or at the direction of configurable firmware.

(146) The fundamental operating principle behind both of these architectures is the image cancelling property of two I-Q mixing operations performed back-to-back. A simplified block diagram is shown in FIG. 19. FIG. 19 may be a block diagram of a two stage I-Q image cancelling mixing operation. The analysis below refers to the signal names in this diagram. For mathematical simplicity the analysis uses sine waves, but these conclusions are easily extended to switching waveforms as long as certain bandwidth constraints are met.

(147) The components of FIG. 19 are preferably implemented as portions of specially-designed and manufactured electrical hardware circuitry, for example an integrated system on a chip including all or the majority of the elements as physical components thereof. However, in some cases, one or more the components could also be partially or fully implemented using software, or may operate as provided by or at the direction of configurable firmware.

(148) Let us assume once again that the input waveform is a modulated carrier waveform represented as: RF(t)I(t)cos .sub.ct+Q(t)sin .sub.ct, Then the signals A(t) and B(t) are calculated as follows:
A(t)=RF(t).Math.cos .sub.Lt=[I(t)cos .sub.ct+Q(t)sin .sub.ct] cos .sub.Lt
=I(t)cos .sub.ct cos .sub.Lt+Q(t)sin .sub.ct cos .sub.Lt
B(t)=RF(t).Math.sin .sub.Lt=[I(t)cos .sub.ct+Q(t)sin .sub.ct] sin .sub.Lt
=I(t)cos .sub.ct sin .sub.Lt+Q(t)sin .sub.ct sin .sub.Lt

(149) A(t) and B(t) are further simplified to:

(150) $A\left(t\right)=\frac{I\left(t\right)}{2}\left[\cos \left({}_c-{}_L\right)t+\cos \left({}_c+{}_L\right)t\right]+\frac{Q\left(t\right)}{2}\left[\sin \left({}_c-{}_L\right)t+\sin \left({}_c+{}_L\right)t\right]$$B\left(t\right)=\frac{I\left(t\right)}{2}\left[-\sin \left({}_c-{}_L\right)t+\sin \left({}_c+{}_L\right)t\right]+\frac{Q\left(t\right)}{2}\left[\cos \left({}_c-{}_L\right)t-\cos \left({}_c+{}_L\right)t\right]$