TRANSFER OF WIDE AND ULTRAWIDE BANDGAP LAYERS TO ENGINEERED SUBSTRATE
20230230851 · 2023-07-20
Inventors
- ASIF KHAN (IRMO, SC, US)
- Mvs Chandrashekhar (Columbia, SC)
- MD DIDARUL ALAM (WEST COLUMBIA, SC, US)
- MIKHAIL E. GAEVSKI (MOUNT SINAI, NY, US)
Cpc classification
H01L29/7786
ELECTRICITY
H01L21/7813
ELECTRICITY
International classification
H01L21/48
ELECTRICITY
H01L21/02
ELECTRICITY
H01L21/78
ELECTRICITY
H01L23/373
ELECTRICITY
H01L29/20
ELECTRICITY
H01L29/205
ELECTRICITY
Abstract
The present disclosure relates to use of 193-nm excimer laser-based lift-off (LLO) of Al.sub.0.26Ga.sub.0.74N/GaN High-electron mobility transistors (HEMTs) with thick (t>10 μm) AlN heat spreading buffer layers grown over sapphire substrates. The use of the thick AlN heat spreading layer resulted in thermal resistance (R.sub.th) of 16 Kmm/W for as-fabricated devices on sapphire, which is lower than the value of ≈25-50 Kmm/W for standard HEMT structures on sapphire without the heat-spreaders. Soldering the LLO devices onto a copper heat sink led to a further reduction of R.sub.th to 8 Kmm/W, a value comparable to published measurements on bulk SiC substrates. The reduction in R.sub.th by LLO and bonding to copper led to significantly reduced self-heating and drain current droop. A drain current density as high as 0.9 A/mm was observed despite a marginal reduction of the carrier mobility (≈1800 to ≈1500 cm.sup.2/Vs). This is the highest drain current density and mobility reported to-date for LLO AlGaN/GaN HEMTs.
Claims
1. A method for transferring wide and ultrawide bandgap (WBG and UWBG) layers to an engineered substrate, comprising: performing laser-based lift-off (LLO) on high-electron mobility transistors (HEMTs) with AlN heat spreading buffer layers grown over sapphire substrate material, to remove the sapphire substrate material; and applying a carrier substrate to the heat spreading buffer layers using a bonding agent, to collectively form an engineered substrate.
2. The method according to claim 1, wherein: the HEMTs comprise AlGaN/GaN HEMTs; the laser-based lift-off (LLO) includes use of an excimer laser having a wavelength of less than 250 nm; and the AlN heat spreading buffer layers are at least 10 μm thick.
3. The method according to claim 2, wherein: the HEMTs comprise Al.sub.0.26Ga.sub.0.74N/GaN high-electron mobility transistors; the laser-based lift-off (LLO) includes use of a 193-nm excimer laser; and the AlN heat spreading buffer layers are about 16 μm thick.
4. The method according to claim 1, wherein the carrier substrate comprises a heat sink layer.
5. The method according to claim 4, where the heat sink layer comprises copper and the bonding agent comprises solder.
6. The method according to claim 1, wherein the laser-based lift-off (LLO) includes using an ultraviolet laser light passed through the sapphire substrate material to ablate an interface with the sapphire substrate material to release the sapphire substrate material.
7. An engineered substrate made according to the method of claim 1.
8. A double transfer method for fabricating WBG and UWBG semiconductor devices without requiring a final polishing step, comprising: forming AlGaN/GaN HEMTs on a layer of AlN heat spreaders having a thickness of at least 10 μm, grown over sapphire substrate materials; applying excimer laser lift-off to remove the sapphire substrate materials to expose the layer of AlN heat spreaders; and using a bonding agent to apply a heat sink layer to the exposed layer of AlN heat spreaders; whereby first transferring off the sapphire substrate materials and subsequently transferring on a heat sink layer results in engineered formation of WBG and UWBG power devices.
9. The method according to claim 8, further comprising: before applying excimer laser lift-off, bonding UV tape to a side of the HEMT opposite the sapphire substrate materials; and after applying a heat sink layer to the exposed layer of AlN heat spreaders, removing the UV bonding tape.
10. The method according to claim 8, further comprising, after applying excimer laser lift-off to remove the sapphire substrate materials, cleaning the exposed layer of AlN heat spreaders.
11. The method according to claim 10, wherein the cleaning comprises cleaning with 1:1 dilute HCl and Cl.sub.2/Ar ICP.
12. The method according to claim 10, wherein applying a heat sink layer to the exposed layer of AlN heat spreaders comprises bonding the exposed layer of AlN heat spreaders to a copper heat sink substrate using In—Pb solder by thermocompression bonding
13. A semiconductor device made according to the method of claim 8.
14. Methodology for forming a layered substrate, comprising: performing laser-based lift-off (LLO) on AlGaN high-electron mobility transistors (HEMTs) with ceramic heat spreading buffer layers having relatively high thermal conductivity, and grown over sapphire substrate material, to remove the sapphire substrate material; and applying a copper heat sink to the ceramic heat spreading buffer layers using a bonding agent, to collectively form an engineered layered substrate.
15. The methodology according to claim 14, wherein the ceramic heat spreading buffer layers comprise aluminum nitride (AlN).
16. The methodology according to claim 14, wherein the ceramic heat spreading buffer layers comprise III nitride material.
17. The methodology according to claim 14, wherein: the AlGaN high-electron mobility transistors (HEMTs) comprise ultrawide bandgap (UWBG) AlGaN HEMTs; and the ceramic heat spreading buffer layers comprise aluminum nitride (AlN) having a thickness of at least 10 μm.
18. The methodology according to claim 17, wherein the laser-based lift-off (LLO) is performed on Al.sub.0.26Ga.sub.0.74N/GaN HEMT by a 193-nm ArF excimer laser and transferred onto a copper heat sink bonded by In—Pb solder.
19. A layered substrate made according to the methodology of claim 14.
Description
BRIEF DESCRIPTION OF THE FIGURES
[0035] A full and enabling disclosure of the presently disclosed subject matter, including the best mode thereof, directed to one of ordinary skill in the art, is set forth in the specification, which makes reference to the appended Figures, in which:
[0036]
[0037]
[0038]
[0039]
[0040]
[0041]
[0042]
[0043]
[0044]
[0045]
[0046]
[0047]
[0048]
[0049]
[0050] Repeat use of reference characters in the present specification and figures is intended to represent the same or analogous features or elements or steps of the presently disclosed subject matter.
DETAILED DESCRIPTION OF THE PRESENTLY DISCLOSED SUBJECT MATTER
[0051] It is to be understood by one of ordinary skill in the art that the present disclosure is a description of exemplary embodiments only and is not intended as limiting the broader aspects of the disclosed subject matter. Each example is provided by way of explanation of the presently disclosed subject matter, not limitation of the presently disclosed subject matter. In fact, it will be apparent to those skilled in the art that various modifications and variations can be made in the presently disclosed subject matter without departing from the scope or spirit of the presently disclosed subject matter. For instance, features illustrated or described as part of one embodiment can be used with another embodiment to yield a still further embodiment. Thus, it is intended that the presently disclosed subject matter covers such modifications and variations as come within the scope of the appended claims and their equivalents.
[0052] The present disclosure is generally directed to laser-based lift-off (LLO) of High-electron mobility transistors (HEMTs). More particularly, the present disclosure is related to excimer laser lift-off of AlGaN/GaN HEMTs on thick AlN heat spreaders.
[0053] Further, the present disclosure in some instances relates to the use of 193-nm excimer laser-based lift-off (LLO) of Al.sub.0.26Ga.sub.0.74N/GaN high-electron mobility transistors (HEMTs) with thick (t>10 μm) AlN heat spreading buffer layers grown over sapphire substrates. The use of the thick AlN heat spreading layer resulted in thermal resistance (R.sub.th) of 16 Kmm/W for as-fabricated devices on sapphire, which is lower than the value of ≈25-50 Kmm/W for standard HEMT structures on sapphire without the heat-spreaders. Soldering the LLO devices onto a copper heat sink led to a further reduction of R.sub.th to 8 Kmm/W, a value comparable to published measurements on bulk SiC substrates. The reduction in R.sub.th by LLO and bonding to copper led to significantly reduced self-heating and drain current droop. A drain current density as high as 0.9 A/mm was observed despite a marginal reduction of the carrier mobility (≈1800 to ≈1500 cm.sup.2/Vs). This is the highest drain current density and mobility reported to-date for LLO AlGaN/GaN HEMTs.
[0054] AlGaN/GaN High-electron mobility transistors (HEMTs) have come a long way since their initial demonstration in 1993 and are desired for a multitude of applications in high-frequency and high-temperature power electronics..sup.[1-8] Recently, AlGaN/GaN HEMTs penetrated the consumer electronics with first-order applications..sup.[9,10] However, the performance of the devices is currently limited by severe self-heating effects that significantly reduce their efficacy in demanding applications that require high current density operation. One strategy to reduce the self-heating effects of GaN-based HEMTs is to use high thermal conductivity SiC or bulk AlN substrates. However, the cost of these substrates is ≈3-10 times that of sapphire substrates..sup.[11] Hence, strategies to improve the thermal management of the devices are highly desired for the full realization of III-nitride-based device's potential in power electronics.
[0055] One promising approach for better thermal management of HEMTs on sapphire substrates is the LLO and bonding to a substrate with higher thermal conductivity. This approach has been used for visible InGaN and ultraviolet (UV) AlGaN LEDs.sup.[12-19] and HEMTs (Table 1)..sup.[20-26] The laser lifted-off devices are typically mounted on an Si, AlN, or a metallic heat sink, such as copper, commonly used in power electronics..sup.[27,28] This leads to further challenges in assuring bonding with low thermal impedance and preserving the structural integrity of the III-nitride epi-layers. If the thickness of the III-nitride layer is small compared to the solder thickness of 10-50 μm, it may wrinkle, crack, and be damaged during the solder reflow. However, too thick an epilayer can also introduce more thermal resistance. Ultraviolet LEDs with typical epilayer thicknesses of 2-3 μm when flip-chipped by LLO.sup.[15] are also susceptible to cracking. Due to this damage, LLO HEMTs typically are not soldered directly to highly thermally conductive metallic heat sinks..sup.[21-25]
TABLE-US-00001 Ref. laser Bonding agent Carrier substrate λ (nm) buffer (thermal (thermal conductivity, layer with conductivity, W/mK) Mobility (cm.sup.2/V s) Sheet resistance (Ω/sq) thickness (μm) W/mK) (thickness, mm) AF LL AF LLO This work 193 In—Pb solder Copper (~386 ) ~1800 (V.sub.T = −8.5 V) ~1500 ~310 (TLM) ~375 (TLM) AlN (16) (~41)
(~2) (V.sub.T = −9.5 V) Wang et al..sup.20 None Glass (~0.8
) ~1520 (Hall) ~55 ~44 ~484 (Hall) ~1.6 × 10.sup.4 193 GaN (2) (~1 est.) (V.sub.T = −3.4 V) (V.sub.T = −3.2 V) ~1.1 × 10.sup.4 Das et al..sup.21 glue AlN (~180.sup.21) ~102 (V.sub.T = −5 V) ~86 ~5.1 × 10.sup.3 .sup. ~5.7 × 10.sup.13 355 GaN (4.3) (~0.4 est.) (V.sub.T = −5.2 V) Chan et al.
Silver paint (~9.1
) Si (~150
) ~1000 (Hall) ~1000 est. (Hall) ~670 est. Not reported 248 GaN (2.5) (~0.5 est.)
et al.
355 Au/In/Au Si (~150) ~145 (V.sub.T = −3.5 V
~96 (V.sub.T = −4 V) ~5.7 × 10.sup.3 ~7.3 × 10.sup.3 GaN (2.6) direct bond (~0.5 est.) Ref. laser Bonding agent Carrier substrate λ (nm) buffer (thermal (thermal conductivity, Sheet carrier concentration layer with conductivity, W/mK) (cm.sup.−2) thickness (μm) W/mK) (thickness, mm) AF LLO This work 193 In—Pb solder Copper (~386
) .sup. ~1 × 10.sup.13 .sup. ~1 × 10.sup.13 AlN (16) (~41)
(~2) Wang et al..sup.20 None Glass (~0.8
) ~8.5 × 10.sup.12 ~8.8 × 10.sup.12 193 GaN (2) (~1 est.) (Hall) Das et al..sup.21 glue AlN (~180.sup.21) ~1.2 × 10.sup.12 ~1.2 × 10.sup.12 355 GaN (4.3) (~0.4 est.) Chan et al.
Silver paint (~9.1
) Si (~150
) ~9.3 × 10.sup.12 Not reported 248 GaN (2.5) (~0.5 est.) (Hall)
et al.
355 Au/In/Au Si (~150) .sup. ~8 × 10.sup.12 .sup. ~9 × 10.sup.12 GaN (2.6) direct bond (~0.5 est.)
No field effect mobility was able to be extracted due to unavailability of device dimensions.
indicates data missing or illegible when filed
[0056] Further, for example, we developed a novel laser lift-off (LLO) technique for AlN lift-off from sapphire substrates, which is highly desired for UWBG AlGaN HEMTs which are always grown with AlN buffer layers. The general approach is shown in present
[0057] Appropriately sized trenches are required to remove the generated N.sub.2 gas during laser exposure. In our studies, ˜1 mm.sup.2 dimensions were suitable to be large enough for practical applications and for scaling (laser spot size ˜1 mm.sup.2) while being small enough to provide sufficient area for removal of N.sub.2 gas generated during the excimer laser decomposition of UWBG III-N. The HEMT epilayers were then grown on these SAG AlN template, which consists of a 3 μm undoped GaN channel layer and a 30 nm delta-doped Al.sub.0.26Ga.sub.0.74N layer with a 1 nm AlN spacer in between. Ohmic contact metal stack Ti/Al/Ti/Au (150/700/300/500 Å) was e-beam evaporated and annealed for 30 seconds at 950° C. under N.sub.2 followed by gate-stack Ni/Au (1000/2000 Å) metallization. The metal contact side of the sample was bonded to a UV tape, and the sapphire was removed by LLO. The lifted-off AlN surface was then cleaned with 1:1 dilute HCl and Cl.sub.2/Ar ICP. The lifted-off surface was bonded to a copper heat sink substrate using In—Pb solder by thermocompression bonding, and the UV tape was removed. The In—Pb solder temperature (˜175° C.) is low enough to be compatible with flexible electronics. The incorporation of thick AlN heat spreading buffer layer led to a thermal resistance (R.sub.th) of ˜16 K-mm/W for as-fabricated devices on sapphire, which decreased further down to ˜8 K-mm/W, comparable to published measurements on SiC substrates, after transferring the devices onto a copper heat sink due to the high intrinsic thermal conductivity of AlN and removal of large series R.sub.th of the sapphire substrate. Self-heating induced current droop in as-fabricated HEMTs on sapphire is significantly reduced after transfer onto copper heat sink. Moreover, the intermediary AlN layer provided physical integrity during the transfer preventing damage.
[0058] The mechanical transfer of WBG and UWBG active layers involves using 2D materials such as boron, nitride, graphene, MoS.sub.2 as a sacrificial release layer. This technique allows the realization of devices on large, flexible, and affordable foreign substrates on which direct growth of nitride semiconductors of sufficient quality is problematic. This technique has been used with limited success for LEDs .sup.[59,60,61,62] and could be useful for power electronics as well. Depending on the application, engineered substrates are required, e.g., Gorilla® glass for smartphones, polyethylene terephthalate (PET) for flexible electronics.
[0059] This technique is used to transfer very fine layers of crystalline materials from a donor substrate onto a mechanical support using the Smart-Cut™ technology (Soitec® patented) and has been used for Johnson's FOM improvements in silicon .sup.[63,64,65]. This approach has not been applied to III-nitrides but could be applicable to AlN substrates leading to a transformative reduction in cost in UWBG AlGaN devices, as multiple engineered High-quality AlN templates can be produced from a single wafer. Our double transfer approach eliminates the need for a final polishing step which is essential for smart-cut technology .sup.[Alam et. al (accepted)].
[0060] For effective soldering to copper heat sink, Ill-nitride epilayers >10 μm thick are required. We recently demonstrated the growth of such thick ultra-wide bandgap (UWBG) AlN layers on sapphire substrates with a room temperature thermal conductivity 320 W/m-K..sup.[29,30] This is much higher than the measured thermal conductivity values for GaN..sup.[31-33] These thick AlN/sapphire templates, therefore, not only are a suitable high-thermal conductivity platform for AlGaN/GaN HEMTs but can also provide protection during the soldering of lifted-off devices to copper heat sink. However, it is more difficult to release AlN than GaN from the sapphire substrate because of its hardness and higher melting temperature..sup.[15] It also requires a high-fluence short wavelength deep ultraviolet (DUV) λ=193 nm excimer laser. The hardness and the high-laser fluence lift-off invariably lead to excessive layer cracking. Developing LLO techniques for AlN lift-off from sapphire substrates is also highly desired for UWBG Al.sub.xGa.sub.1-xN (x>0.6) HEMTs, which are always grown with AlN buffer layers. Thus, many previously demonstrated LLO approaches (Table 1) for AlGaN/GaN HEMTs are not applicable to emerging UWBG IIIN devices..sup.[34-36]
[0061] In this disclosure, we demonstrate the LLO of AlGaN/GaN HEMTs that were fabricated with >10 μm-thick high-quality AlN buffer layers on sapphire substrates. The lifted-off layers were then soldered to copper heat sink to improve their capability to operate at high-drain currents without a thermal droop attributed to self-heating..sup.[37] We show that the thermal performance is improved substantially and is like that of devices on bulk SiC substrates, the current gold-standard in heat sinks.
[0062] The AlGaN/GaN heterostructures used in this study were grown on c-plane sapphire by metalorganic chemical vapor deposition (MOCVD). A 2-μm AlN seed layer was first grown followed by the selective area growth (SAG) of 14 μm-thick AlN in 1×1 mm.sup.2 window openings in a SiO.sub.2 masking layer. The SiO.sub.2 mask was then etched off using HF, and the first 2 μm-thick AlN seed layer was also etched down by inductively coupled plasma (ICP), leaving a template with fully disconnected 16 μm-thick 1×1 mm.sup.2 blocks of AlN on the sapphire substrate. HEMT epilayers were then grown on these SAG AlN templates by MOCVD, with a 3 μm undoped GaN channel layer and a 30 nm delta doped Al.sub.0.26Ga.sub.0.74N layer with a 1 nm AlN spacer in between. Delta doping was done by sandwiching a 10 nm Si-doped Al.sub.0.26Ga.sub.0.74N layer between two undoped 10 nm Al.sub.0.26Ga.sub.0.74N layers. Delta doping separates the dopants from the AlGaN/GaN 2 DEG interface enabling higher sheet carrier concentration (n.sub.s), while minimizing carrier-impurity scattering that provides enhanced carrier mobility at high n.sub.s..sup.[38] These effects lead to an overall lowering of the sheet resistance. The device source/drain ohmic contact metal stack Ti/Al/Ti/Au (150/700/300/500 Å) was e-beam evaporated and annealed for 30 s at 950° C. under N.sub.2. This was followed by the gate-stack Ni/Au (1000/2000 Å) metallization. Source-to-drain spacing was 6 μm, with a gate length of ≈2 μm.
[0063] For the LLO process, the epitaxial side of the processed sample was bonded to UV tape, and a 193-nm excimer laser fluence of ≈1 J/cm.sup.2 was used. This yielded HEMT devices with 16 μm-thick AlN heat spreading layers. The lifted-off surface was etched with 1:1 dilute HCl and Cl.sub.2/Ar ICP to remove the damaged AlN layer. The sample was then transferred to copper using thermocompression bonding. The In—Pb solder temperature (≈175° C.) .sup.[39] is low enough to be compatible with flexible electronics. This procedure is schematically represented in
[0064]
[0065] This strain relaxation is supported by HRXRD (
where q is the electron charge, V.sub.T is the threshold voltage, C.sub.G1 is the gate capacitance per unit area; and V.sub.GS is the gate-source voltage.
[0066]
[0067] R.sub.th was measured using thermochromic paint that changes its color for a certain temperature under steady state electrical power. From
ΔT=R.sub.thP, (2)
where ΔT is the channel temperature rise and P is the applied power.
[0068] The as-fabricated devices on sapphire show R.sub.th of ≈16K mm/W, which is lower than the typical 25-50K mm/W .sup.[44-47] seen in GaN, HEMTs grown directly on sapphire. This lower R.sub.th is attributed to the better heat spreading in the ˜16 μm-thick AlN due to its high intrinsic thermal conductivity..sup.[29,30] AlN layers <6 μm-thick showed ≈½ the thermal conductivity compared to the thicker films, leading to less effective heat removal attributed to poorer AlN quality at the sapphire/AlN interface..sup.[29] After LLO and soldering to the copper heat sink, R.sub.th is ≈8K mm/W, which is comparable to or less than the 10K mm/W for SiC substrates.sup.[45,46,48] using steady state techniques. The remaining R.sub.th after sapphire removal and transfer onto copper heat sink is likely dominated by the poor thermal conductivity of In—Pb die-attach solder [≈41 W/mK .sup.[49] compared to the excellent thermal conductivities of AlN (≈320 W/mK) .sup.[29-30] and copper (≈386 W/mK). .sup.[50]
[0069] The carrier mobility (μ.sub.n) is extracted from the I.sub.DS-V.sub.GS transfer curves (
where g.sub.m is the transconductance, L is the gate-length, and W is the width.
[0070]
[0071]
[0072] LLO of Al.sub.0.26Ga.sub.0.74N/GaN HEMT with >10 μm-thick AlN templates from sapphire substrate was performed by a 193-nm ArF excimer laser and transferred onto a copper heat sink bonded by In—Pb solder. Incorporating a thick AlN heat spreading buffer layer instead of GaN led to a R.sub.th of ≈16K mm/W for as-fabricated devices on sapphire, which decreased further down to ≈8 Kmm/W, comparable to published measurements on SiC substrates, after transferring the devices onto a copper heat sink. This is due to improved heat spreading in the thick AlN buffer with high intrinsic thermal conductivity and removal of large series R.sub.th of the sapphire substrate. After LLO, the mobility decreased from ≈1800 to ≈1500 cm.sup.2/Vs due to the introduction of traps during transfer. Drain current droop attributed to self-heating in as-fabricated HEMTs on sapphire is significantly reduced after transfer onto copper heat sink.
[0073] The following discussion refers to material for the Raman mapping images of both GaN E.sub.2 (High) and AlN E.sub.2 (High) mode in the access regions of both as-fabricated and LLO HEMT structures; lattice constants a and c of different epitaxial films, as well as this sample before and after LLO determined by HRXRD measurements; room temperature Raman shifts vs corresponding residual stress change indicated by both E.sub.2 (High) and A.sub.1 (Lo) modes; and TLM measurement results and transfer characteristics before and after LLO.
[0074]
[0075]
[0076]
[0077]
[0078] This written description uses examples to disclose the presently disclosed subject matter, including the best mode, and also to enable any person skilled in the art to practice the presently disclosed subject matter, including making and using any devices or systems and performing any incorporated methods. The patentable scope of the presently disclosed subject matter is defined by the claims and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they include structural and/or step elements that do not differ from the literal language of the claims, or if they include equivalent structural and/or elements with insubstantial differences from the literal languages of the claims.
REFERENCES
[0079] [1] M. Asif Khan, X. Hu, A. Tarakji, G. Simin, J. Yang, R. Gaska, and M. S. Shur, Appl. Phys. Lett. 77, 1339 (2000). [0080] [2] G. Simin, A. Tarakji, X. Hu, A. Koudymov, J. Yang, M. A. Khan, M. S. Shur, and R. Gaska, Phys. Status Solidi Appl. Res. 188, 219 (2001). [0081] [3] V. Kumar, W. Lu, R. Schwindt, A. Kuliev, G. Simin, J. Yang, M. A. Khan, and I. Adesida, IEEE Electron Device Lett. 23, 455 (2002). [0082] [4] U. K. Mishra, P. Parikh, and Y. F. Wu, Proc. IEEE 90, 1022 (2002). [0083] [5] X. Hu, J. Deng, N. Pala, R. Gaska, M. S. Shur, C. Q. Chen, J. Yang, G. Simin, M. A. Khan, J. C. Rojo, and L. J. Schowalter, Appl. Phys. Lett. 82, 1299 (2003). [0084] [6] G. Simin, X. Hu, N. llinskaya, A. Kumar, A. Koudymov, J. Zhang, M. Asif Khan, R. Gaska, and M. S. Shur, Electron. Lett. 36, 2043 (2000). [0085] [7] C. Lee, H. Wang, J. Yang, L. Witkowski, M. Muir, M. A. Khan, and P. Saunier, Electron. Lett. 38, 924 (2002). [0086] [8] V. Kumar, W. Lu, F. A. Khan, R. Schwindt, A. Kuliev, G. Simin, J. Yang, M. Asif Khan, and I. Adesida, Electron. Lett. 38, 252 (2002). [0087] [9] See https://www.infineon.com/cms/en/product/power/gan-hemt-galliunitride-transistor/ for more information on applications of AlGaN/GaN HEMTs in consumer electronics (accessed 7 Jul. 2021). [0088] [10] See https://www.qorvo.com/products/discrete-transistors/gan-hemts for more information on applications of AlGaN/GaN HEMTs in consumer electronics (accessed 7 Jul. 2021). [0089] [11] M. A. Fraga, M. Bosi, and M. Negri, Advanced Silicon Carbide Devices Process (InTech, 2015), Chap. 1. [0090] [12] Y. Sun, S. Trieu, T. Yu, Z. Chen, S. Qi, P. Tian, J. Deng, X. Jin, and G. Zhang, Semicond. Sci. Technol. 26, 085008 (2011). [0091] [13] S. Hwang, D. Morgan, A. Kesler, M. Lachab, B. Zhang, A. Heidari, H. Nazir, I. Ahmad, J. Dion, Q. Fareed, V. Adivarahan, M. Islam, and A. Khan, Appl. Phys. Express 4, 032102 (2011). [0092] [14] H. Aoshima, K. Takeda, K. Takehara, S. Ito, M. Mori, M. lwaya, T. Takeuchi, S. Kamiyama, I. Akasaki, and H. Amano, Phys. Status Solidi 9, 753 (2012). [0093] [15] M. Lachab, F. Asif, B. Zhang, I. Ahmad, A. Heidari, Q. Fareed, V. Adivarahan, and A. Khan, Solid State Electron. 89, 156 (2013). [0094] [16] F. Asif, H. C. Chen, A. Coleman, M. Lachab, I. Ahmad, B. Zhang, Q. Fareed, V. Adivarahan, and A. Khan, Jpn. J. Appl. Phys., Part 1 52, 08JG14 (2013). [0095] [17] H. K. Cho, O. Kr€uger, A. K€ulberg, J. Rass, U. Zeimer, T. Kolbe, A. Knauer, S. Einfeldt, M. Weyers, and M. Kneissl, Semicond. Sci. Technol. 32, 12LT01 (2017). [0096] [18] S. Bornemann, N. Yulianto, H. Spende, Y. Herbani, J. D. Prades, H. S. Wasisto, and A. Waag, Adv. Eng. Mater. 22, 1901192 (2020). [0097] [19] K. Kawasaki, C. Koike, Y. Aoyagi, and M. Takeuchi, Appl. Phys. Lett. 89, 261114 (2006). [0098] [20] X. Wang, C.-F. Lo, L. Liu, C. V. Cuervo, R. Fan, S. J. Pearton, B. Gila, M. R. Johnson, L. Zhou, D. J. Smith, J. Kim, O. Laboutin, Y. Cao, and J. W. Johnson, J. Vac. Sci. Technol. B 30, 051209 (2012). [0099] [21] J. Das, W. Ruythooren, R. Vandersmissen, J. Derluyn, M. Germain, and G. Borghs, Phys. Status Solidi 2, 2655 (2005). [0100] [22] K. K. Leung, C. P. Chan, W. K. Fong, M. Pilkuhn, H. Schweizer, and C. Surya, J. Cryst. Growth 298, 840 (2007). [0101] [23] C. P. Chan, K. K. Leung, M. Pilkuhn, C. Surya, T. M. Yue, G. Pang, and H. Schweizer, Phys. Status Solidi 204, 914 (2007). [0102] [24] H. Ji, J. Das, M. Germain, and M. Kuball, Solid State Electron. 53, 526 (2009). [0103] [25] T. S. Kang, X. T. Wang, C. F. Lo, F. Ren, S. J. Pearton, O. Laboutin, Y. Cao, J. W. Johnson, and J. Kim, J. Vac. Sci. Technol. B 30, 011203 (2012). [0104] [26] F. Guo, Q. Wang, H. Xiao, L. Jiang, W. Li, C. Feng, X. Wang, and Z. Wang, Semicond. Sci. Technol. 35, 095024 (2020). [0105] [27] J. Schulz-Harder, Microelectron. Reliab. 43, 359-365 (2003). [0106] [28] S. Yin, K. J. Tseng, and J. Zhao, Appl. Therm. Eng. 52, 120 (2013). [0107] [29] Z. Cheng, Y. R. Koh, A. Mamun, J. Shi, T. Bai, K. Huynh, L. Yates, Z. Liu, R. Li, E. Lee, M. E. Liao, Y. Wang, H. M. Yu, M. Kushimoto, T. Luo, M. S. Goorsky, P. E. Hopkins, H. Amano, A. Khan, and S. Graham, Phys. Rev. Mater. 4, 044602 (2020). [0108] [30] Y. R. Koh, Z. Cheng, A. Mamun, M. S. Bin Hogue, Z. Liu, T. Bai, K. Hussain, M. E. Liao, R. Li, J. T. Gaskins, A. Girl, J. Tomko, J. L. Braun, M. Gaevski, E. Lee, L. Yates, M. S. Goorsky, T. Luo, A. Khan, S. Graham, and P. E. Hopkins, ACS Appl. Mater. Interfaces 12, 29443 (2020). [0109] [31] Q. Zheng, C. Li, A. Rai, J. H. Leach, D. A. Broido, and D. G. Cahill, Phys. Rev. Mater. 3, 014601 (2019). [0110] [32] H. Shibata, Y. Waseda, H. Ohta, K. Kiyomi, K. Shimoyama, K. Fujito, H. Nagaoka, Y. Kagamitani, R. Simura, and T. Fukuda, Mater. Trans. 48, 2782 (2007). [0111] 33 A. Jezowski, B. A. Danilchenko, M. Boc′kowski, I. Grzegory, S. Krukowski, T. Suski, and T. Paszkiewicz, Solid State Commun. 128, 69 (2003). [0112] [34] S. Mollah, K. Hussain, A. Mamun, M. Gaevski, G. Simin, M. V. S. Chandrashekhar, and A. Khan, Appl. Phys. Express 14, 014003 (2021). [0113] [35] M. Gaevski, S. Mollah, K. Hussain, J. Letton, A. Mamun, M. U. Jewel, M. Chandrashekhar, G. Simin, and A. Khan, Appl. Phys. Express 13, 094002 (2020). [0114] [36] H. Xue, K. Hussain, V. Talesara, T. Razzak, M. Gaevski, S. Mollah, S. Rajan, A. Khan, and W. Lu, Phys. Status Solidi 15, 2000576 (2021). [0115] [37] S. A. Vitusevich, A. M. Kurakin, N. Klein, M. V. Petrychuk, A. V. Naumov, and A. E. Belyaev, IEEE Trans. Device Mater. Reliab. 8, 543 (2008). [0116] [38] Z. Y. Fan, J. Li, J. Y. Lin, and H. X. Jiang, Appl. Phys. Lett. 81, 4649 (2002). [0117] [39] See https://www.indium.com/bLog/indium-lead-inpb-solder-alLoys-for-reliablegold-interconnects-in-semiconductor-assembly.php for more information on melting temperature of In—Pb solder; accessed 7 Jul. 2021. [0118] [40] M. Kuball, Surf. Interface Anal. 31, 987 (2001). [0119] [41] Y. Huang, X. D. Chen, S. Fung, C. D. Beling, and C. C. Ling, J. Phys. D: Appl. Phys. 37, 2814 (2004). [0120] [42] S. Choi, E. Heller, D. Dorsey, R. Vetury, and S. Graham, J. Appl. Phys. 113, 093510 (2013). [0121] [43] S. Chae, K. A. Mengle, R. Lu, A. Olvera, N. Sanders, J. Lee, P. F. P. Poudeu, J. T. Heron, and E. Kioupakis, Appl. Phys. Lett. 117, 102106 (2020). [0122] [44] R. Gaska, A. Osinsky, J. W. Yang, and M. S. Shur, IEEE Electron Device Lett. 19, 89 (1998). [0123] [45] M. Kuball, J. W. Pomeroy, R. Simms, G. J. Riedel, H. Ji, A. Sarua, M. J. Uren, and T. Martin, in IEEE Compound Semiconductor Integrated Circuit Symposium, Technical Digest (IEEE, 2007), Vol. 116. [0124] [46] M. Kuball, J. M. Hayes, M. J. Uren, T. Martin, J. C. H. Birbeck, R. S. Balmer, and B. T. Hughes, IEEE Electron Device Lett. 23, 7 (2002). [0125] [47] J. Sun, H. Fatima, A. Koudymov, A. Chitnis, X. Hu, H. M. Wang, J. Zhang, G. Simin, J. Yang, and M. A. Khan, IEEE Electron Device Lett. 24, 375 (2003). [0126] [48] J. G. Felbinger, M. V. S. Chandra, Y. Sun, L. F. Eastman, J. Wasserbauer, F. Faili, D. Babic, D. Francis, and F. Ejeckam, IEEE Electron Device Lett. 28, 948 (2007). [0127] [49] See https://www.indium.com/applications/thermal-management/#thermal-kvalues-list for more information on thermal conductivity of In—Pb solder; accessed 7 Jul. 2021. [0128] [50] See http://hyperphysics.phy-ast.gsu.edu/hbase/Tables/thrcn.html for more information on thermal conductivity of copper; accessed 7 Jul. 2021. [0129] [51] F. Roccaforte, G. Greco, P. Fiorenza, and F. Iucolano, Materials 12, 1599 (2019). [0130] [52] M. Chu, A. D. Koehler, A. Gupta, S. Parthasarathy, M. O. Baykan, S. E. Thompson, and T. Nishida, Materials and Reliability Handbook for Semiconductor Optical and Electron Devices (Springer, 2013), Vol. 381. [0131] [53] B. Shankar, A. Soni, S. Raghavan, and M. Shrivastava, IEEE Trans. Device Mater. Reliab. 20, 767 (2020). [0132] [54] T. Beechem, A. Christensen, D. S. Green, and S. Graham, J. Appl. Phys. 106, 114509 (2009). [0133] [55] J. A. del Alamo and J. Joh, Microelectron. Reliab. 49, 1200 (2009). [0134] [56] See https://www.tepella.com/technote_html/16047-TN-V1-06232009.pdf for more information on thermal conductivity of silver paint; accessed 7 Jul. 2021. [0135] [57] S. Choi, E. Heller, D. Dorsey, R. Vetury, and S. Graham, J. Appl. Phys. 113, 093510 (2013). [0136] [58] M. Kuball et al., “Thermal properties and reliability of GaN microelectronics: Sub-micron spatial and nanosecond time resolution thermography,” Tech. Dig.—IEEE Compd. [0137] [59] S. Karrakchou et al., “Effectiveness of selective area growth using van der Waals h-BN layer for crack- free transfer of large-size III-N devices onto arbitrary substrates,” Sci. Reports 2020 101, vol. 10, no. 1, pp. 1-9, December 2020. [0138] [60] T. Ayari et al., “Novel Scalable Transfer Approach for Discrete III-Nitride Devices Using Wafer-Scale Patterned h-BN/Sapphire Substrate for Pick-and-Place Applications,” Adv. Mater. Technol., vol. 4, no. 10, p. 1900164, October 2019. [0139] [61] S. Sundaram et al., “MOVPE of GaN-based mixed dimensional heterostructures on wafer-scale layered 2D hexagonal boron nitride—A key enabler of III-nitride flexible optoelectronics,” APL Mater., vol. 9, no. 6, p. 061101, June 2021. [0140] [62] Y. Kobayashi, K. Kumakura, T. Akasaka, and T. Makimoto, “Layered boron nitride as a release layer for mechanical transfer of GaN-based devices,” Nat. 2012 4847393, vol. 484, no. 7393, pp. 223-227, April 2012. [0141] [63] L. F. Wang et al., “Novel Design of SOI SiGe HBTs with High Johnson's Figure-of-Merit,” 2018 IEEE 3rd Int. Conf. Integr. Circuits Microsystems, ICICM 2018, pp. 56-59, December 2018. [0142] [64] I. S. M. Sun et al., “Novel ultra-Low power RF lateral BJT on SOI-CMOS compatible substrate,” 2005 IEEE Conf. Electron Devices Solid-State Circuits, EDSSC, pp. 317-320, 2005. [0143] [65] S. Lee et al., “Record RF performance of 45-nm SOI CMOS technoLogy,” Tech. Dig.—Int. Electron Devices Meet. IEDM, pp. 255-258, 2007.