SiC SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SiC MOSFET
20240071764 ยท 2024-02-29
Assignee
Inventors
Cpc classification
H01L21/02216
ELECTRICITY
H01L21/02271
ELECTRICITY
H01L21/049
ELECTRICITY
H01L21/02211
ELECTRICITY
International classification
H01L21/04
ELECTRICITY
H01L21/02
ELECTRICITY
H01L29/16
ELECTRICITY
Abstract
A SiC semiconductor device manufacturing method includes a step of etching a surface of a SiC substrate 1 with H.sub.2 gas under Si-excess atmosphere within a temperature range of 1000 C. to 1350 C., a step of depositing, by a CVD method, a SiO.sub.2 film 2 on the SiC substrate 1 at such a temperature that the SiC substrate 1 is not oxidized, and a step of thermally treating the SiC substrate 1, on which the SiO.sub.2 film 2 is deposited, in NO gas atmosphere within a temperature range of 1150 C. to 1350 C.
Claims
1. A SiC semiconductor device manufacturing method, comprising: a step (A) of etching a surface of a SiC substrate with H.sub.2 gas under Si-excess atmosphere within a temperature range of 1000 C. to 1350 C.; a step (B) of depositing, by a CVD method, a SiO.sub.2 film on the SiC substrate at such a temperature that the SiC substrate is not oxidized; and a step (C) of thermally treating the SiC substrate, on which the SiO.sub.2 film is deposited, in NO gas atmosphere within a temperature range of 1150 C. to 1350 C.
2. The SiC semiconductor device manufacturing method according to claim 1, wherein in the step (A), a one-to-three monolayer thick Si layer is formed on the surface of the SiC substrate.
3. The SiC semiconductor device manufacturing method according to claim 1, wherein the step (A) is performed under atmosphere where SiH.sub.4 gas or gas containing a Si atom is added to H.sub.2 gas.
4. The SiC semiconductor device manufacturing method according to claim 1, further comprising: before the step (A), a step of etching away an oxide film formed on the surface of the SiC substrate after sacrificial oxidation of the SiC substrate.
5. The SiC semiconductor device manufacturing method according to claim 1, wherein the SiC substrate includes a SiC substrate having a SiC epitaxial layer on a surface.
6. The SiC semiconductor device manufacturing method according to claim 1, wherein an absolute value of an effective fixed charge density at an interface between the SiO.sub.2 film and the SiC substrate is 410.sup.11 cm.sup.2 or less.
7. A SiC semiconductor device manufacturing method, comprising: a step (A) of etching a surface of a SiC substrate with H.sub.2 gas within a temperature range of 1200 C. to 1350 C.; a step (B) of forming a SiO.sub.2 film in such a manner that a Si thin film is deposited on the SiC substrate by a CVD method and the Si thin film is subsequently thermally oxidized at such a temperature that the SiC substrate is not oxidized; and a step (C) of thermally treating the SiC substrate formed with the SiO.sub.2 film in NO gas atmosphere within a temperature range of 1150 C. to 1350 C.
8. A SiC MOSFET comprising: a gate insulating film formed of a SiO.sub.2 film on a SiC substrate, wherein the SiO.sub.2 film is formed on the SiC substrate by the method according to claim 1, and has a normally-off characteristic.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
[0014]
[0015]
[0016]
[0017]
[0018]
[0019]
[0020]
[0021]
[0022]
[0023]
DESCRIPTION OF EMBODIMENTS
[0024] Hereinafter, an embodiment of the present invention will be described in detail based on the drawings. Note that the present invention is not limited to the following embodiment. Moreover, changes can be made as necessary without departing from a scope in which advantageous effects of the present invention are obtained.
[0025]
[0026] As shown in
[0027] As the SiC substrate 1, one configured such that a SiC epitaxial layer (not shown) is formed on the SiC substrate 1 may be used. Note that preferably when a MOSFET is formed on the SiC epitaxial layer, a surface of the SiC epitaxial layer is oxidized, and thereafter, the oxide film is removed.
[0028] Next, as shown in
[0029] Note that the SiO.sub.2 film 2 may be deposited using a thermal CVD method. In this case, the SiO.sub.2 film 2 may be deposited under conditions of a SiH.sub.4 flow rate: 5 seem, a N.sub.2O flow rate: 300 seem, a N.sub.2 flow rate: 3000 seem, a temperature: 720 C., a pressure: 15 Pa, and a time: 4 minutes.
[0030] Next, as shown in
[0031] (Analysis of Interface Defect Density)
[0032] A MOS capacitor was formed on the SiO.sub.2 film 2 deposited on the SiC substrate 1 by the method shown in
[0033] Note that for comparison, a sample obtained in such a manner that by a method disclosed in Non-Patent Document 2, a SiO.sub.2 film 2 is formed on a SiC substrate 1 having a surface subjected to high-temperature H.sub.2 etching and the SiC substrate 1 is subsequently thermally treated in high-temperature N.sub.2 gas atmosphere and a sample obtained in such a manner that a SiO.sub.2 film 2 is formed on a surface of a SiC substrate 1 by thermal oxidation and the SiC substrate 1 is subsequently thermally treated in high-temperature NO gas atmosphere were also formed.
[0034]
[0035]
[0036] According to these results, many defects remain on the surface of the SiC substrate 1 from which the oxide film has been removed after sacrificial oxidation of the surface, and in order to efficiently eliminate these defects, the surface of the SiC substrate 1 is etched with high-temperature H.sub.2 gas in Si-excess atmosphere so that the interface state density can be significantly reduced.
[0037] (Characterization of Fabricated SiC MOSFET)
[0038] An n-channel MOSFET was fabricated with the SiO.sub.2 film 2 deposited on the SiC substrate 1 by the method shown in
[0039]
[0040] Note that an acceptor concentration in the p.sup.-type SiC epitaxial growth layer 10A was 110.sup.15 cm.sup.3 and a donor concentration in the source region 11 and the drain region 12 was 810.sup.19 cm.sup.3. Moreover, the thickness of the gate insulating film 20 was 30 nm.
[0041] (A) Drain Current-Gate Voltage Characteristics
[0042]
[0043]
[0044] (B) Channel Mobility
[0045]
[0046]
[0047] According to these results, the SiC substrate 1 is etched with high-temperature H.sub.2 gas in Si-excess atmosphere before deposition of the SiO.sub.2 film 2 on the SiC substrate 1 and the SiC substrate 1 is thermally treated in high-temperature NO gas atmosphere after deposition of the SiO.sub.2 film 2, so that a MOSFET having a high drain current and a high channel mobility and having normally-off characteristics can be obtained.
[0048] (Nitrogen Atom Density in SiO.sub.2 film and at SiO.sub.2 film/SiC interface)
[0049]
[0050] A graph indicated by A shows results for the sample obtained in such a manner that the SiO.sub.2 film 2 is deposited on the SiC substrate 1 by the method shown in
[0051]
[0052] On the other hand, it shows that the nitrogen atom density in the SiO.sub.2 film 2 is extremely low in the sample (graph A) whose the SiC substrate 1 was thermally treated in high-temperature NO gas atmosphere while a high density of nitrogen atoms is present in the SiO.sub.2 film 2 in the sample (graph B) whose SiC substrate 1 was thermally treated in high-temperature N.sub.2 gas atmosphere.
[0053] (Correlation between Nitrogen Atom Density in SiO.sub.2 film and Effective Fixed Charge Density at Interface)
[0054]
[0055]
[0056] According to these results, it is assumed as follows. If the nitrogen atom density in the SiO.sub.2 film 2 is extremely high, the nitrogen atoms and impurity atoms are bound to each other, and a positive fixed charge is generated in the SiO.sub.2 film 2. Accordingly, the MOSFET shows normally-on characteristics. Conversely, if the nitrogen atom density in the SiO.sub.2 film 2 is low, a positive fixed charge is less likely to be generated in the SiO.sub.2 film 2, and accordingly, the MOSFET shows normally-off characteristics. Note that the impurity atoms to be bound to the nitrogen atoms are assumed to be, e.g., hydrogen introduced in a thermal treatment step (hydrogen sintering step) performed in atmosphere containing hydrogen at a final stage of fabricating the MOSFET.
[0057] As shown in
[0058] The effective fixed charge density at the interface between the SiO.sub.2 film 2 and the SiC substrate 1 is represented as the sum of a positive charge due to an impurity or a defect in the SiO.sub.2 film 2 (location close to the interface with the SiC substrate 1) and a negative charge due to electrons trapped at interface states. In a case where the NO treatment temperature is low, the positive charge is low because of a low nitrogen atom density in the SiO.sub.2 film 2, but the negative charge is relatively high because of a relatively-high interface state density. As a result, the effective fixed charge density represented by a difference therebetween is negative.
[0059] On the other hand, in a case where the NO treatment temperature is high, the positive charge is high because of a high nitrogen atom density in the SiO.sub.2 film 2, but the negative charge is relatively low because of a low interface state density. As a result, the effective fixed charge density is positive.
[0060] The effective fixed charge density is a great negative value when the interface state density is extremely high, and this is not preferable because the drain current of a SiC MOSFET is lowered. On the other hand, the effective fixed charge density is a great positive value when the nitrogen density in the SiO.sub.2 film 2 is extremely high, and this is not preferable because normally-on (negative threshold voltage) characteristics are easily brought due to influence of this high positive charge density.
[0061] As shown in
[0062] (Dependency of Channel Mobility on NO Thermal Treatment Temperature)
[0063]
[0064]
[0065] That is, an effect of reducing the interface defect density at the interface between the SiO.sub.2 film 2 and the SiC substrate 1 can be expected in such a manner that the SiC substrate 1 is etched with high-temperature H.sub.2 gas before formation of the SiO.sub.2 film 2 on the SiC substrate 1. However, in a case where the SiO.sub.2 film 2 is deposited on the SiC substrate 1 by the CVD method, reaction gas contains 02 gas or N.sub.2O gas, and for this reason, the surface of the SiC substrate 1 might be slightly oxidized initially during deposition. However, about one-to-three monolayer thick extremely-thin Si layer is formed on the surface of the SiC substrate 1 in such a manner that etching with high-temperature H.sub.2 gas is performed under Si-excess atmosphere, and therefore, even in this case, only these extremely-thin Si layers are oxidized and oxidation of the surface of the SiC substrate 1 can be prevented. Thus, the interface defect density at the interface between the SiO.sub.2 film 2 and the SiC substrate 1 is significantly reduced, and a high channel mobility is obtained.
[0066] On the other hand, in a case where etching with high-temperature H.sub.2 gas is not performed under Si-excess atmosphere, no extremely-thin Si films are formed on the surface of the SiC substrate 1, and for this reason, even if the SiO.sub.2 film is deposited under optimal conditions and the high-temperature NO thermal treatment is performed, the surface of the SiC substrate 1 is oxidized at an initial stage of depositing the SiO.sub.2 film. As a result, the interface defect density at the interface between the SiO.sub.2 film 2 and the SiC substrate 1 is not sufficiently reduced, and a low channel mobility is obtained.
[0067]
[0068] (Dependency of Channel Mobility on Hydrogen Etching Temperature)
[0069]
[0070] As described above, the SiC semiconductor device manufacturing method in the present embodiment includes a step of etching the surface of the SiC substrate 1 with H.sub.2 gas under Si-excess atmosphere within a temperature range of 1000 C. to 1350 C., a step of depositing, by the CVD method, the SiO.sub.2 film 2 at such a temperature that the SiC substrate 1 is not oxidized, and a step of thermally treating the SiC substrate 1 formed with the SiO.sub.2 film 2 in NO gas atmosphere within a temperature range of 1150 C. to 1350 C. With this configuration, the defect density at the interface between the SiO.sub.2 film 2 and the SiC substrate 1 can be significantly reduced, and a SiC MOSFET having a high channel mobility and normally-off characteristics can be achieved in a case where the SiC MOSFET having the SiO.sub.2 film as the gate insulating film 20 is formed.
[0071] In the above-described embodiment, the example where the MOSFET is formed on the 4HSiC(0001) plane has been described. Generally, it has been known that in a case where a SiC MOSFET is formed on a non-basal plane such as a (11-20) plane or a (1-100) plane, characteristics better than those in the case of a (0001) plane are obtained.
[0072] Actually, in a case where the MOSFET is formed in such a manner that the gate insulating film 20 is formed by the method shown in
[0073] It has been known that among SiC power MOSFETs, a trench MOSFET having a MOS channel formed on a trench side wall is advantages in extremely reducing on-resistance. In this case, a SiC substrate surface is a (0001) plane, and therefore, the MOS channel needs to be formed on a (11-20) plane (A-plane) or a (1-100) plane (M-plane) which is a side wall surface. In an actual SiC power MOSFET, an acceptor density in a p-type epitaxial growth layer is a relatively-high value of about 10.sup.7 to 108 cm.sup.3.
[0074] Thus, in order to verify whether or not the present invention is also effective for the trench SiC power MOSFET, MOSFETs having the structure shown in
[0075]
[0076] As shown in a graph A1, the MOSFET formed on the (11-20) plane exhibited a high channel mobility of about 130 cm.sup.2/Vs within an acceptor density of 10.sup.17 to 10.sup.18 cm.sup.3. As shown in a graph A2, the MOSFET formed on the (1-100) plane also exhibited a high channel mobility of 80 to 110 cm.sup.2/Vs within an acceptor density of 10.sup.17 to 10.sup.18 cm.sup.3. In any of these MOSFETs, a channel mobility drop is rather small when the acceptor density in the p-type epitaxial growth layer increases, as compared to the MOSFETs indicated by B1 and B2 and formed by the typical method. At an acceptor density of 110.sup.18 cm.sup.3, an extremely-high channel mobility 6 to 80 times as high as that in the typical method was obtained.
[0077] According to the present invention, excellent MOS interface characteristics are obtained, and therefore, the present invention is also effective for formation of other SiC devices using MOS interfaces, such as an insulated-gate bipolar transistor (IGBT).
[0078] The present invention has been described above with reference to the preferable embodiment, but such description is not a limited matter and various modifications can be made, needless to say. For example, in the above-described embodiment, the SiC epitaxial layer is formed on the surface of the SiC substrate, and the SiO.sub.2 film is formed on the SiC epitaxial layer. However, the SiO.sub.2 film may be directly formed on the SiC substrate.
[0079] In the above-described embodiment, the SiC substrate from which the oxide film is removed after sacrificial oxidation of the surface is used. However, the manufacturing method of the present invention is also applicable to a SiC substrate not subjected to sacrificial oxidation.
[0080] In the above-described embodiment, the SiO.sub.2 film 2 is deposited on the SiC substrate 1 by the CVD method. However, the SiO.sub.2 film may be formed in such a manner that a Si thin film is deposited by the CVD method and is subsequently thermally oxidized at such a temperature that the SiC substrate 1 is not oxidized. In this case, the Si thin film is formed on the surface of the SiC substrate 1 before formation of the SiO.sub.2 film 2, and therefore, etching of the SiC substrate 1 with high-temperature H.sub.2 as pretreatment is not necessarily performed under Si-excess atmosphere. Etching of the SiC substrate 1 with high-temperature H.sub.2 is preferably performed within a temperature range of 1200 C. to 1350 C.
DESCRIPTION OF REFERENCE CHARACTERS
[0081] 1 SiC Substrate [0082] 2 SiO.sub.2 Film [0083] 10 p-type SiC Substrate [0084] 10A p.sup.-type SiC Epitaxial Growth Layer [0085] 11 Source Region [0086] 12 Drain Region [0087] 20 Gate Insulating Film [0088] 30 Source Electrode [0089] 31 Drain Electrode [0090] 32 Gate Electrode