METHOD FOR PERFORMING A DATA TRANSMISSION

Abstract

A method for performing a data transmission between a control device and an electronics unit. A microcontroller and an Ethernet transceiver are provided in the control unit, and a microcontroller and an Ethernet transceiver are also provided in the electronics unit. For data transmission, the two Ethernet transceivers are first synchronized, taking into account a common clock cycle, and, for data transmission, an Ethernet connection is used as a physical route, and the data transmission is carried out with a serial protocol.

Claims

1. A method for performing a data transmission between a control device and an electronics unit, the method comprising the following steps: providing a microcontroller and an Ethernet transceiver in the control device, and also providing a microcontroller and an Ethernet transceiver in the electronics unit; for data transmission, synchronizing the Ethernet transceiver in the control device and the Ethernet transceiver in the electronics unit, taking into account a common clock cycle; and for data transmission, after the synchronizing, using an Ethernet connection as a physical route and performing the data transmission with a serial protocol.

2. The method according to claim 1, wherein the data transmission is used for programming the control device.

3. The method according to claim 2, wherein a switching between a communications unit and an interface module is effected by software or a switch.

4. The method according to claim 1, wherein, for data transmission, pins TXEN and TXD0 are combined, and identical data content is transmitted so that, during the data transmission, useful information is executed only on pin TXD1, wherein, during the data transmission, a pin TXEN (TX enable) is set to 1.

5. The method according to claim 1, wherein pins TXEN and TXD0 are set to 0 at an end of the data transmission.

6. The method according to claim 1, wherein the data transmission is carried out using a DMA-based data access.

7. The method according to claim 1, wherein, in the data transmission, a data sequence is transmitted which is divided into three successive sections including a preamble, a SFD (start frame detection), and a data section.

8. A control device configured to perform a data transmission with an electronics unit, the control device comprising: a microcontroller; and an Ethernet transceiver; wherein the control device is configured to: for data transmission, synchronize the Ethernet transceiver in the control device and the Ethernet transceiver in the electronics unit, taking into account a common clock cycle; and for data transmission, after the synchronizing, use an Ethernet connection as a physical route and perform the data transmission with a serial protocol.

9. The control device according to claim 8, further comprising: an interface module and a communications unit are provided, between which a switch-over can be made.

10. The control device according to claim 9, wherein software is stored which is configured for switching between the interface module and the communications unit.

11. The control device according to claim 9, further comprising: a switch configured to switch between the interface module and the communications unit.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0025] FIG. 1 shows a block diagram of a control device with an electronics unit for carrying out an example embodiment of the described method of the present invention.

[0026] FIG. 2 shows the entire transmission path from a microcontroller, via an Ethernet transceiver, to the partner, which also has an Ethernet transceiver and a microcontroller.

[0027] FIG. 3 shows an Ethernet transceiver and a microcontroller, between which a data transmission takes place.

[0028] FIG. 4 shows a data sequence which is transmitted between a control device and an electronics unit, according to an example embodiment of the present invention.

[0029] FIG. 5 shows a DMA buffer.

DETAILED DESCRIPTION OF EXAMPLE EMBODIMENTS

[0030] The present invention is represented schematically in the drawings on the basis of embodiments and is described below with reference to the figures.

[0031] FIG. 1 shows a control device 100 and a programming device 101. The control device 100 has a communications interface 110 to the outside, to which a communications link 104 with the lines RXD[0 . . . 1] TXD[0 . . . 1] is connected internally. A driver element, in particular an Ethernet driver 102, which makes possible a bidirectional connection with the desired levels to the communications interface 110, is connected into this communications link 104, i.e., the two lines TXD and RXD. The external lines, i.e., the communications link to the outside 104A, are referred to as MDI_TRX_Minus and MDI_TRX_Plus. The programming device 101 can be connected to the control device 100 via this external communications link 104A.

[0032] A control unit 103, e.g., a microprocessor or a microcomputer, is contained in the control device 100. This comprises a communications unit 107, which in this example corresponds to an Ethernet controller. Also included in the microprocessor 103 is a serial interface module 108, e.g., an asynchronous serial communications interface ASC, via which data for programming the memory 109, which is in particular also integrated into the microprocessor, can be received or transmitted. In addition, communication can be ensured via the interface module 108. The memory can also be located outside the control unit 103 and is preferably designed as a flash memory.

[0033] The illustration further shows a switching means (i.e., a switch) 105 in which, in particular, a program-controlled interface changeover switch or a multiplexer is provided, which enables a switching of the communications link from the communications unit 107 to the interface module 108.

[0034] For all control devices or SoCs, which make it possible to switch from Ethernet to ASC SoC-internally on the pins TXD/RXD, the switching means 105 can be omitted. The switching in the control device 100 then takes place with softwarein the case shown for ASC@Ethernet. If the installed SoC does not make it possible to switch over ASC and Eth, such a switching means 105 will be required.

[0035] In the context of normal communication, in particular in the control device network in the vehicle, the connection to the Ethernet driver 102 and to the Ethernet interface 110 from the communications unit or from the Ethernet controller 107 is present via communications link sections 104B, switching means or interface changeover switch 105, and communications link 104, and a conventional data transmission takes place in the context of Ethernet communication, i.e., in this case, a first bus protocol, in particular the Ethernet bus protocol, is used.

[0036] If the control device 100 is to be programmed or communicated in the test mode, for this purpose, the control device 100 will be connected via 104A to the programming device 101. The interface changeover switch 105 then makes the connection to the interface module 108 via the connection section 106. As a result, the communications interface 110, the Ethernet driver 102, and the communications link 104 to the microprocessor can also be used for the programming or test mode communication. However, a second bus protocol is used here for programming, in particular a standard protocol of a serial interface, such as, for example, RS-232.

[0037] FIG. 2 shows the transmission path 200 from a microcontroller (MAC) 202, to an Ethernet transceiver 204, per RMII 201, via UTP 206, which represents a physical route between Ethernet transceivers, to a slave Ethernet transceiver 208, to a receiver microcontroller 210. The transmission takes place via connectors 212 and protective devices 214, a low-pass filter 216, and EMC filters 218.

[0038] FIG. 3 shows an Ethernet transceiver 300 and a microcontroller 302, between which a data transmission takes place. The illustration clarifies in particular the PIN assignment which is corresponding for both units 300 and 302. The illustration shows: [0039] XO 310, [0040] XI 312, [0041] CRSDV 314, [0042] RXD[1:0] 316, [0043] RXER 318, [0044] TXEN 320, [0045] TXD[1:0] 322, [0046] REF_CLK 324.

[0047] Furthermore, a clock cycle in a range from 9.5 to 50 MHz is provided on REF_CLK 324. The pins RXER 318, CRSDV 314 are not used here.

[0048] FIG. 4 shows data sequences in the context of the transmission, namely REF_CLK 400, TX_EN 402, TXD[1] 404, and TXD[0] 406. The data sequences are divided into three sections, namely preamble 410, SFD 412 (start frame detection), and data 414.

[0049] FIG. 5 shows a DMA buffer (DMA: direct memory access) 500. The illustration shows an MCU 510 and a GPIO port 512. A first arrow 520 shows the effective flow during the reception or reading of data, and a second arrow 522 shows the effective flow during the transmission or writing of data.

[0050] Furthermore, a brace 530 indicates register [0] through register [70]. A column 540 contains the data of TXD1==TXEN, another column 542 the data of the clock signal, and yet another column 544 the data of TXD0. Reference numerals 550 through 570 denote the individual registers.

[0051] The method is explained in more detail with reference to the figures:

[0052] On the tester and ECU side, after the Ethernet bus transceivers, the controller/SoC is not configured onto the corresponding bus system, but TX and RX pins are configured as ASC, and the clock cycle rate is changed in the direction of the Ethernet bus transceiver; see in this regard FIG. 3.

[0053] To simplify the transmission, the data lines TXEN, TXD0 are combined, identical data content being transmitted here. This is possible, since TXEN is always 1 during the transmission, and, on TDX0, the preamble, SFD, and the data section are also specified as 1. In the data transmission, useful information is thus carried out only on TXD1. During the transmission of data, the pin TXEN is set to 1. If data transmission has ended, TXEN and TXD0 will be set to 0, and transmission is thus terminated; see FIG. 4.

[0054] The aim is to establish a stable communication of boundary conditions specified for an Ethernet transceiver, namely via a physical route from microcontroller 1 on the receiving side to microcontroller 2 on the opposite side (MAC); see FIG. 2.

[0055] For this purpose, RMII mode with an external clock source is used. By means of the microcontroller, the clock cycle signal from 9.5 to 50 MHz, which is transmitted from the source to be transmittedthe microcontrollerto the receiving sidethe Ethernet transceiveris generated using a PWM pin. RMII is a more compact version of the media-independent interface (MII) that requires fewer hardware pins than MII and is used for communication between transceivers and MAC.

[0056] Before the transmission, the data for the transmission are stored in the memory. The pins TXEN, TXD0, TXD1 and a clock cycle are required for the communication. The data transmission takes place with the aid of a DMA-based data access which puts the data from the memory onto the three hardware pins TXEN, TXD0, and TXD1 in parallel with and synchronously with the clock cycle. The data to be transmitted are stored in the data section of the transmission sequence. In this regard, reference is made to FIG. 5.

[0057] The transmission sequence of the data starts by applying a clock pulse of 9.5 to 50 MHz between the microcontroller and the Ethernet transceiver on the transmitting side. If the Ethernet transceiverthe masterhas successfully synchronized with the second Ethernet transceiver on the receiving sidethe slave Ethernet transceivera so-called link-up will take place, this information being retrievable in a status register of the master Ethernet transceiver.

[0058] The transmission sequence starts with the application of a TXEN+TXD1 signal of 1. After the start of the transmission, the preamble is transmitted. This is expressed as 6 bits of 0 on TXD1, then, in SFD, 4 bits of 1, then the data follow. For TXD0, this is expressed as 6 bits of 1, then, in SFD, one bit of 1, then the data follow, which are simply identical to the value of TXEN 1; see FIG. 4.

[0059] On the receiving side, i.e., the slave Ethernet transceiver, the microcontroller must be connected to the same clock frequency of 9.5 to 50 MHz. By means of a DMA access from the hardware pins RXD0 and RXD1 to the memory, the data is secured with a subsequent evaluation. With the same approach as described above, a response is sent back.

[0060] A sequence is started on the SoC, SiP, or microcontroller, on the receiving side and on the transmitting side, which sequence manages the reception and processing of the data and ensures the consistency thereof. Here, DMA technology, among other things, is also used, which provides the SoC/SiP/microcontroller; see FIG. 5.

[0061] This type of communication can be used on all control devices in which a data exchange takes place over the route of an Ethernet bus system.