Display apparatus and method of manufacturing the same
10453875 ยท 2019-10-22
Assignee
Inventors
Cpc classification
H01L25/50
ELECTRICITY
H01L33/62
ELECTRICITY
H01L25/167
ELECTRICITY
H01L2933/0066
ELECTRICITY
International classification
H01L27/12
ELECTRICITY
H01L25/16
ELECTRICITY
H01L25/00
ELECTRICITY
H01L33/62
ELECTRICITY
Abstract
A method of manufacturing a display apparatus includes separating a light-emitting diode (LED) chip from a base substrate; disposing the separated light-emitting diode chip in a solution; disposing a substrate including a first electrode thereon, in the solution; with the separated light-emitting diode chip and the substrate including the first electrode thereon in the solution, applying a negative voltage to the substrate to attract the separated light-emitting diode chip to the first electrode on the substrate; mounting the light-emitting diode chip attracted to the first electrode, on the first electrode; and removing the substrate with the light-emitting diode chip mounted on the first electrode from the solution and drying the removed substrate, to form the display apparatus.
Claims
1. A display apparatus comprising: a substrate comprising a first recess and a second recess; and a first light-emitting diode chip which emits a first color and is mounted on the first recess; and a second light-emitting diode chip which emits a second color and is mounted on the second recess, the second color being different from the first color, wherein each of the first and second recesses includes a first electrode and a second electrode spaced apart from each other along a thickness direction of the substrate, a shape of each of the first and second light-emitting diode chips corresponds to the arrangement of the first and second electrodes spaced apart from each other of the first and second recesses on which the first and second light-emitting diode chips are mounted, respectively, each of the first and second light-emitting diode chips includes a first electrode pad and a second electrode pad, the first electrode pad and the second electrode pad being arranged along the thickness direction of the substrate, and the first electrode pad is disposed closer to a bottom surface of the substrate than the second electrode pad.
2. The apparatus of claim 1, wherein the first recess and the second recess have a same shape.
3. The apparatus of claim 1, wherein the first recess and the second recess have different shapes from each other.
4. The apparatus of claim 1, wherein the first electrode contacts the first electrode pad, and the second electrode contacts the second electrode pad.
5. The apparatus of claim 4, further comprising a thin film transistor between the substrate, and each of the first and second recesses, respectively, wherein one of the first electrode and the second electrode is electrically connected to the thin film transistor.
6. The apparatus of claim 5, further comprising a bank between the second electrode and the thin film transistor in the direction toward the substrate, the bank covering an edge of the first electrode.
7. The apparatus of claim 1, further comprising an encapsulation member which encapsulates the first light-emitting diode chip and the second light-emitting diode chip, wherein the encapsulation member individually encapsulates each of the first light-emitting diode chip and the second light-emitting diode chip.
8. The apparatus of claim 1, further comprising an encapsulation member which encapsulates the first light-emitting diode chip and the second light-emitting diode chip, wherein the encapsulation member commonly encapsulates both of the first light-emitting diode chip and the second light-emitting diode chip.
9. A display apparatus comprising: a substrate comprising a first recess, a second recess and a third recess; a first light-emitting diode chip which is mounted on the first recess and emits a first color; a second light-emitting diode chip which is mounted on the second recess and emits a second color different from the first color; and a third light-emitting diode chip which is mounted on the third recess and emits a third color different from the first color and the second color, wherein each of a light-emitting diode chip among the first, second and third light-emitting diode chips includes a first electrode pad and a second electrode pad arranged spaced apart from each other along a thickness direction of the substrate, a shape of a respective recess among the first, second and third recesses corresponds to the arrangement of the first and second electrodes spaced apart from each other of the light-emitting diode chip mounted thereon, the display apparatus emits a white color as a mixture of the first, second and third colors, each of the first and second light-emitting diode chips includes a first electrode pad and a second electrode pad, the first electrode pad and the second electrode pad being arranged along the thickness direction of the substrate, and the first electrode pad is disposed closer to a bottom surface of the substrate than the second electrode pad.
10. A display apparatus comprising: a substrate comprising a plurality of recesses each including a first electrode and a second electrode arranged spaced apart from each other; and a plurality of light-emitting diode chips respectively mounted in the plurality of recesses, wherein each one light-emitting diode chip among the plurality of light-emitting diode chips, which is mounted in a recess among the plurality of recesses, comprises a first electrode pad and a second electrode pad which is disposed closer to a bottom surface of the substrate than the first electrode pad, and along the thickness direction of the substrate, a shape of the each one light-emitting diode chip corresponds to positions of the first electrode and the second electrode spaced apart from each other.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
(1) These and/or other features will become apparent and more readily appreciated from the following description of the exemplary embodiments, taken in conjunction with the accompanying drawings in which:
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DETAILED DESCRIPTION
(10) Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings, where like reference numerals refer to like elements throughout. In this regard, the present exemplary embodiments may have different forms and should not be construed as being limited to the descriptions set forth herein. Accordingly, the exemplary embodiments are merely described below, by referring to the figures, to explain features of the present description.
(11) It will be understood that when an element is referred to as being on another element, it can be directly on the other element or intervening elements may be present therebetween. In contrast, when an element is referred to as being directly on another element, there are no intervening elements present.
(12) It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.
(13) The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms a, an, and the are intended to include the plural forms, including at least one, unless the content clearly indicates otherwise. Or means and/or. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items. Expressions such as at least one of, when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. It will be further understood that the terms comprises and/or comprising, or includes and/or including when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
(14) Furthermore, relative terms, such as lower or bottom and upper or top, may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. For example, if the device in one of the figures is turned over, elements described as being on the lower side of other elements would then be oriented on upper sides of the other elements. The exemplary term lower, can therefore, encompasses both an orientation of lower and upper, depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as below or beneath other elements would then be oriented above the other elements. The exemplary terms below or beneath can, therefore, encompass both an orientation of above and below.
(15) Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
(16) Exemplary embodiments are described herein with reference to cross section illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as flat may, typically, have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the present claims.
(17)
(18) Referring to
(19) The exemplary embodiment of the method of manufacturing a display apparatus, according to the invention, will be described in more detail below with reference to
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(21) The base substrate 101 may be a conductive substrate or an insulating substrate. In an exemplary embodiment, for example, the base substrate 101 may include at least one of sapphire (Al.sub.2O.sub.3), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga.sub.2O.sub.3.
(22) The LED chip 100 may include a first semiconductor layer 102, a second semiconductor layer 104, an active layer 103 disposed between the first semiconductor layer 102 and the second semiconductor layer 104, a first electrode pad 106 at a distal end of the LED chip 100 and a second electrode pad 107.
(23) In an exemplary embodiment of manufacturing the display apparatus, the first semiconductor layer 102, the active layer 103 and the second semiconductor layer 104 of the LED chip 100 may be formed by using a metal organic chemical vapor deposition (MOCVD) method, a chemical vapor deposition (CVD) method, a plasma-enhanced CVD (PECVD) method, a molecular beam epitaxy (MBE) method, and a hydride vapor phase epitaxy (HVPE) method.
(24) The first semiconductor layer 102 may include, for example, a p-type semiconductor layer. The p-type semiconductor layer may include a semiconductor material having a composition formula of In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, and 0x+y1), for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, or AlInN, and may be doped with a p-type dopant such as Mg, Zn, Ca, Sr, and Ba.
(25) The second semiconductor layer 104 may include, for example, an n-type semiconductor layer. The n-type semiconductor layer may include a semiconductor material having a composition formula of In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, and 0x+y1), for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, or AlInN, and may be doped with an n-type dopant such as Si, Ge, and Sn.
(26) However, one or more exemplary embodiments are not limited to the above examples, and the first semiconductor layer 102 may include an n-type semiconductor layer and the second semiconductor layer 104 may include a p-type semiconductor layer.
(27) The active layer 103 is an area where electrons and holes recombine with each other, and transition to a lower energy level when the electrons and the holes recombine, and accordingly, light having a wavelength corresponding to the transitioned energy level is emitted. The active layer 103 may include a semiconductor material having a composition formula, for example, In.sub.xAl.sub.yGa.sub.1-x-yN (0x1, 0y1, and 0x+y1), and may have a single quantum well structure or a multiple quantum well (MQW) structure. Also, the active layer 103 may have a quantum wire structure or a quantum dot structure.
(28) The first electrode pad 106 is disposed or formed on the first semiconductor layer 102 at the distal end of the LED chip 100, and the second electrode pad 107 may be disposed or formed on the second semiconductor layer 104. The LED chip 100 according to the present exemplary embodiment is a parallel type or a flip type, in which the first electrode pad 106 and the second electrode pad 107 are arranged in the same direction as each other. The first electrode pad 106 and the second electrode pad 107 of the LED chip 100 are both disposed exposed or facing a same direction relative to the LED chip 100.
(29) The plurality of LED chips 100 disposed or formed on the base substrate 101 are isolated from each other such as by cutting the base substrate 101 along cutting lines CL1 and CL2. The cutting may include using a laser beam. The plurality of LED chips 100 may be respectively disposed in a separable state relative to the base substrate 101 from the cutting of the base substrate 101. Subsequently, the separable state LED chips 100 may be separated from the base substrate 101 such as through a laser lift-off process.
(30)
(31) Referring to
(32) The substrate 201 may include various materials, for example, a glass material or a plastic material. The substrate 201 may be flexible such that the array substrate 200 may be flexible.
(33) A buffer layer 202 may be disposed or formed on the substrate 201. The buffer layer 202 provides a flat surface on the substrate 201, and reduces or effectively prevents infiltration of impurities or humidity into the substrate 201.
(34) The thin film transistor TFT may include an active layer 207, a gate electrode 208, a source electrode 209a and a drain electrode 209b. Hereinafter, the thin film transistor TFT of a top gate type, in which the active layer 207, the gate electrode 208, the source electrode 209a and the drain electrode 209b are sequentially stacked, will be described. However, one or more exemplary embodiments are not limited thereto, and a thin film transistor TFT of various types, for example, a bottom gate type, may be also applied to one or more exemplary embodiments.
(35) The active layer 207 may include a semiconductor material, for example, amorphous silicon or polycrystalline silicon. The active layer 207 may include an organic semiconductor material, an oxide semiconductor material, etc.
(36) A gate insulating layer 203 is disposed or formed on the active layer 207. The gate electrode 208 is disposed or formed on the gate insulating layer 203. The gate electrode 208 may be connected to a gate line (not shown) which applies turning on/turning off signals to the thin film transistor TFT.
(37) An inter-insulating layer 204 is disposed or formed on the gate electrode 208, and the source electrode 209a and the drain electrode 209b are disposed or formed on the inter-insulating layer 204.
(38) The first electrode 211 connected to the thin film transistor TFT is formed on the planarization layer 205, and a second electrode 213 may be disposed or formed on the bank layer 206. The first electrode 211 and the second electrode 213 are spaced apart from each other and may be disconnected from each other within the array substrate 200 excluding the LED chip 100. For purpose of this description, positions of the first electrode 211 and the second electrode 213 may be referred to as defining a shape of the first and second electrodes 211 and 213.
(39) In a state where the array substrate 200 is disposed in the solution 301, a first voltage V1 is applied to the first electrode 211 and a second voltage V2 is applied to the second electrode 213. The first and second voltages V1 and V2 are respectively negative direct current (DC) voltages.
(40) Since negative DC voltages are applied to the first electrode 211 and the second electrode 213, free electrons of the LED chip 100 that is dropped into the solution 301 move away from the first electrode 211 and the second electrode 213. In addition, due to an electrostatic induction effect, a positive potential is induced to a portion of the LED chip 100, which is close to the first and second electrodes 211 and 213 to which the negative voltages are applied. That is, the positive potential is induced to the first and second electrode pads 106 and 107 of the LED chip 100.
(41) An attraction caused by an electrostatic force may be applied between the first electrode 211 and the second electrode 213 in the array substrate 200 and the first electrode pad 106 and the second electrode pad 107 of the LED chip 100, and the LED chip 100 may move toward the array substrate 200 by the electrostatic force.
(42) Here, since the first electrode pad 106 and the second electrode pad 107 of the LED chip 100 and the first electrode 211 and the second electrode 213 of the array substrate 200 have matching or complementing shapes, the first electrode pad 106 of the LED chip 100 is arranged to be adjacent and connected to the first electrode 211 of the array substrate 200 and the second electrode pad 107 of the LED chip 100 is arranged to be adjacent and connected to the second electrode 213 of the array substrate 200.
(43)
(44) Referring to
(45) Although not shown in
(46) Referring to
(47) Although not shown in
(48) Negative voltages are respectively applied to the first electrode (not shown) and the second electrode (not shown), and the green LED chip 100G separated from the base substrate 101 is dropped into a container, in which the solution is contained, in the same manner as illustrated in
(49) Referring to
(50) Referring to
(51) Although not shown in
(52) Negative voltages are applied respectively to the first electrode (not shown) and the second electrode (not shown), and the blue LED chip 100B is dropped into a container, in which the solution is contained, in the same manner as illustrated in
(53) Referring to
(54) Referring to
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(56) Thus, the full-color display apparatus including LEDs may be manufactured to include the LED chips 100R, 100G and 100B encapsulated on the array substrate 200.
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(58) Referring to
(59) Different from the previous exemplary embodiment, one etching/transferring/bonding process may be performed to realize full-color for a display apparatus without performing the etching/transferring/bonding processes a plurality of times.
(60) Referring to
(61) Referring to
(62) Referring to
(63) Although not shown in detail in the drawings, with reference again to
(64)
(65) In the array substrate 600 recess 602 corresponding to the green LED chip 700G, a first electrode 604 and a second electrode 605 are disposed or formed to have shapes or positions complementing the shape of the first and second electrode pads 701 and 702 of the green LED chip 700G. An overall shape of the green LED chip 700G may correspond to the overall shape of the recess 602 at which the first and second electrodes 604 and 605 are disposed. For purpose of this description, positions of the first electrode 604 and the second electrode 605 within the array substrate 600 may be referred to as defining a shape of the first and second electrodes 604 and 605.
(66) Negative DC voltages are applied to the first and second electrodes 604 and 605 and positive potentials are induced to the first and second electrode pads 604 and 605 of the green LED chip 700G. An attraction caused by the electrostatic force is applied between the first and second electrodes 604 and 605 of the array substrate 600 and the first and second electrode pads 701 and 702 of the green LED chip 700G. Accordingly, the green LED chip 700G may be moved toward the array substrate 600.
(67) Referring to
(68) Referring to
(69) In
(70) Thus, the full-color display apparatus including the LEDs may be manufactured by performing the electrostatic induction process once, to include the LED chips 100R, 100G and 1006 encapsulated on the array substrate 600.
(71) According to the one or more exemplary embodiments, the LEDs may be transferred to and aligned with positions of an array substrate in a simple manner by using electrostatic force.
(72) In addition, a shape of the LED chip varies depending on a color of light emitted therefrom. The substrate includes regions at which the LED chips of different shapes are to be mounted, to have shapes matching with those of the LED chips. Accordingly, the different-shaped LED chips emitting different color light may be mounted on the substrate by performing an alignment process once.
(73) It should be understood that exemplary embodiments described herein should be considered in a descriptive sense only and not for purposes of limitation. Descriptions of features within each exemplary embodiment should typically be considered as available for other similar features in other exemplary embodiments.
(74) While one or more exemplary embodiments have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope as defined by the following claims.