DIFFERENTIAL TUNED INDUCTOR DEVICES AND METHODS THEREOF
20220415789 · 2022-12-29
Inventors
Cpc classification
H03F2203/45392
ELECTRICITY
H03F2203/45481
ELECTRICITY
H03F2203/45662
ELECTRICITY
H01L23/5227
ELECTRICITY
International classification
Abstract
A differential tuned inductor and a multilayer tunable transformer for an integrated circuit device for microwave and RF applications are disclosed. The tunable inductor can be used in differential artificial delay lines to achieve delay tuning while preserving impedance matching. The tunable transformer can also be used for mixer drives to achieve wider operational performance.
Claims
1. A tunable series differential inductor section device comprising: a first series two port spiral coil wound with a number of turns; a second series two port spiral coil coupled to the first series two port spiral coil, wherein the second series two port spiral coil is wound with respect to the first series two port spiral coil with an outer turn of the second series two port spiral coil positioned proximal to an inner turn of the first series two port spiral coil such that the inner turn of second series two port spiral coil ends closer to the outer turn of the first series two port spiral coil; and a tertiary pair of coils wound vertically below the first and second series two port spiral coils such that the tertiary pair of coils are coupled evenly to the first and second series two port spiral coils, wherein the tertiary pair of coils are connected to a switch having a first switch position to electrically open the tertiary pair of coils and a second switch position to electrically close the tertiary pair of coils to reduce differential inductance of the coupled first and second series two port spiral coils; and a tap provided in the tertiary pair of coils to bias the switch.
2. The device of claim 1, wherein the number of turns comprises an odd number of turns with inner and outer turns pointing in opposite directions.
3. The device of claim 1, wherien the switch is a PIN diode, a varactor, or a field effect transistor switch.
4. The device of claim 1, wherein the first series two port spiral coil and the second series two port spiral coil are symmetrical.
5. The device of claim 4, wherein the the first series two port spiral coil and the second series two port spiral coil are varied by a single control to change inductance of the the first series two port spiral coil and the second series two port spiral coil by equal amounts to maintain symmetry.
6. The device of claim 1, wherein the first series two port spiral coil and the second series two port spiral coil are configured to be cascaded with another differential tuned inductor section.
7. The device of claim 1, wherein the first series two port spiral coil and the second series two port spiral coil are configured to be cascaded with another differential element
8. The device of claim 1, wherein the differential inductance can be tuned continuously using a varactor in place of the switch.
9. The device of claim 1, wherein the device is configured to be employed in one of an electronically tunable filter, an impedance matching circuit, or a resonator.
10. The device of claim 1 further comprising: variable capacitors across both input and output terminals of the device to form variable differential delay and variable impedance sections.
11. A method of making tunable series differential inductor section device comprising: providing a first series two port spiral coil wound with a number of turns; coupling a second series two port spiral coil coupled to the first series two port spiral coil, wherein the second series two port spiral coil is wound with respect to the first series two port spiral coil with an outer turn of the second series two port spiral coil positioned proximal to an inner turn of the first series two port spiral coil such that the inner turn of second series two port spiral coil ends closer to the outer turn of the first series two port spiral coil; and providing a tertiary pair of coils wound vertically below the first and second series two port spiral coils such that the tertiary pair of coils are coupled evenly to the first and second series two port spiral coils, wherein the tertiary pair of coils are connected to a switch having a first switch position to electrically open the tertiary pair of coils and a second switch position to electrically close the tertiary pair of coils to reduce differential inductance of the coupled first and second series two port spiral coils; and providing a tap in the tertiary pair of coils to bias the switch.
12. An electronically tunable transformer circuit device comprising: a first layer comprising two pairs of magnetically coupled inductors each comprising a primary inductor and a secondary inductor, wherein terminals of the primary inductors and the secondary conductors are connected together to provide a five-port configuration; a tap located at a mid-point of a connection between the two primary inductors; and a second layer located beneath the first layer, the second layer comprising a pair of tertiary coils having switches configured to open and close the pair of tertiary coils to effect tuning of the transformer.
13. The device of claim 12, wherein the switch is a PIN diode, a varactor, or a field effect transistor.
14. The device of claim 12, wherein the pair of tertiary spiral coils further comprises a tap configured to bias the switch.
15. The device of claim 12, wherein the two pairs of inductors are varied by a single control to change inductance of the two pairs of inductors by equal amounts to maintain symmetry.
16. The device of claim 12, wherein input terminals and output terminals of the two pairs of inductors are configured to be cascaded with other differential elements.
17. The device of claim 12, wherein the pair of primary terminals is coupled to a driver amplifier differential output and the pair of secondary terminals is coupled to a mixer local oscillator differential port, wherein a supply voltage is connected to the primary tap, and wherein the tuning of the device moves a peak linearity response of the mixer in a frequency axis and moving an optimum conversion loss response of the mixer in the frequency axis.
18. The device of claim 12, wherien the device is configured to be used as a balanced to unbalanced circuit or unbalanced to balanced circuit, wherein the pair of primary terminals with the tap form the balanced side and the secondary terminals are configured with one terminal as the unbalanced input and another grounded, wherein the tuning of the balun results in moving the insertion loss characteristics along the frequency axis.
19. The device of claim 18, wherein the device is configured to be used at the mixer radio frequency input to tune the conversion loss bands.
20. The device of claim 12, whereing the pair of terminals is connected to a signal source, load or differential circuit element and the other pair terminals to a signal source, load or differntial circuit element to implement impedance transformation or electronic tuning of the frequency reponse.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
[0018] An exemplary differential tuned inductor 10 that, in one example, may be employed in a tunable delay line for an integrated circuit device is illustrated in
[0019] As discussed above, in one example, the differential tuned inductor 10 of the present technology may be employed in an artificial delay line section that may be utilized for various applications that require microwave and millimeter wave artificial delay lines. In one example, the differential tuned inductor 10 may be cascaded with additional differential tuned inductors. The present technology advantageously provides a differential tuned inductor 10 that may be used, in one example, to form a compact, tunable, differential delay line. In this example, the differential tuned inductor 10 advantageously improves inductance per unit length of the delay line in which the artificial delay line section including the differential tuned inductor 10 is employed. The present technology further allows for a fully tunable delay line including the differential tuned inductor 10 that also is more compact with decreased loss. The differential tuned inductor 10 of the present technology with right modifications, may also be employed, for example, in mixer linearity (IP3) and conversion loss (CL) tuning as a tunable transformer.
[0020] Referring again to
[0021] Referring again to
[0022] In this example, the pair of coupled inductors 14(1) and 14(2) provide plus and minus side inductors that are equal in value to maintain symmetry and are varied by a common-control that changes both the plus and minus inductors 14(1) and 14(2) simultaneously by equal amounts. In one example, the plus and minus side inductors 14(1) and 14(2) are coupled spiral inductors, although other configurations may be employed. In this example, the pair of coupled inductors 14(1) and 14(2) are located on a first side of a metal structure. In one example, the plus and minus inductors are arranged in a planar fashion on the top metal of metal structure with a bottom metal underpass. The spiral inductors that form the pair of coupled inductors 14(1) and 14(2) can be formed as a wire trace on a chip, for example. Each of the segmented inductors of the pair of coupled inductors 14(1) and 14(2) in this configuration (i.e., the plus and minus side inductors) benefits from the coupling, as one gets a boost in inductance from the other as a result of the coupling. Effectively, the inductance in each of the inductors 14(1) and 14(2) is increased by the factor of its coupling with the adjacent line. This property of the differential inductance allows higher inductance per unit length, and also reduces the length needed and saves area when employed in an artificial delay line, for example.
[0023] Output terminals 16 are coupled to the pair of coupled inductors 14(1) and 14(2) to output the signal depending on the application. In one example, the differential tuned inductor 10 is used as an artificial delay line and the output signal received at the output terminal 16 may have a variable delay value that is switchable between about 3.5 ps and about 6.6 ps, although other delays may be employed. In one example, the differential tuned inductor 10 may be cascaded with other artificial delay line sections to form an artificial delay line as shown in
[0024] Referring again to
[0025] The differential tuned inductor 10 further includes a third conductor 20. In one example, the third condutor 20 is a tertiary pair of conductor coils. In one example, the third conductor 20 or tertiary pair of coils is a spiral pair that is wound below the top metal of metal structure 22 and evenly coupled to the top metal of metal structure (not shown). The third conductor 20 or tertiary pair of coils includes a switch 24 configured to place the pair of variable capacitors 18(1) and 18(2) in one of a high capacitance or a low capacitance state to provide adjustable tuning for the differential tuned inductor 10 (with impedance matching). The switch 24 can be a p-i-n diode, a FET switch, or a varactor, by way of example only. In one example, the adjustable tuning is employed to provide a variable delay value for the differential tuned inductor 10, although in other examples the differential tuned inductor 10 may be employed as a tunable transformer based driver amplifier, as described in further detail below. By way of example, the differential tuned inductor 10 can also be used for analog tuning by replacing the switch 24 with a variable capacitor, such as a varactor. In one example, the third conductor 20 or tertiary pair of coils further comprises a tap 26 configured to bias the switch 24. In this example, the third conductor 20 or tertiary pair of coils is not in communication with the input terminal 12 or the output terminal 16, i.e., the third conductor 20 or tertiary pair of coils is not in the signal path.
[0026]
[0027] Referring now to
[0028] An exemplary operation of the differential tuned inductor 10 illustrated in
[0029] Referring now to
[0030] Radio receivers working in microwave and millimeter wave bands need to process weak signals in the presence of stronger interferers. This requirement demands low-noise and distortion performance from associated mixers. Low distortion and noise are achieved in passive FET (Field Effect Transistors) mixers with drive voltages that are close to peak allowed peak gate voltages. Push-pull amplifiers with open collectors (drains) are used to drive voltage swings that maximize linear performance and reduce conversion loss (noise). In one example, the differential tunable inductor section 102 of the present technology can be used on the collector outputs to extend the bandwidth of efficient drivers at microwave frequencies.
[0031] The ability to drive the mixer core 140 to present the correct dynamic conductance and optimum linearity requires maximizing the signal voltage swing at the gates of the FET quad core 140. Signal voltage swings of 2.5 to 5 V translate to LO power levels of approximately 18 to 24 dBm, when referenced to a 50Ω characteristic impedance. The magnitude of this LO voltage swing can be controlled in an integrated circuit (IC) implementation of the mixer quad-core 140 by using a resonated amplifier technique, as shown in
[0032] In this technique, the gate (Vgate) of the mixer quad core 140 is seen as a load that can be resonated by the tank connected to the open-collector of a cascode 142 or CE/CS differential BJT (or MOS) pair 144, 146, 148, 150, as shown in
[0033] The peak drive into the gates has a frequency response shaped by the resonance of the differential drive balun with the gate capacitance of the FETs. This limits the peak drive frequency band to a fractional bandwidth of 30% of the center local oscillator band. This would directly translate to peak compression and intercept point (linearity) performance over a narrow bandwidth. Nominally, a 4-8 GHz mixer would suffer in compression performance at the 8-12 G band. Nominally, this would require two separate silicon chips to cover both 4-8 GHz and 8-12 GHz bands. Using this tuning technique with the coupled tunable inductor section 102 achieves a wider band linear mixer covering both 4-8 GHz and 8-12 GHz with one silicon chip. Using the switchable coupled transformer made of DTIs 110(1) and 110(2) allows for efficient and wideband performance simultaneously.
[0034] An expanded view of the differential tuned inductor section 102 shown in
[0035] Referring again to
[0036] Illustrative performance characteristics using the coupled inductance tuning is shown in
[0037] Referring now to
[0038] In many double balanced mixers used in transceivers, the input thermal noise amplified by the front-end low-noise amplifier is filtered by single-ended filters before feeding the received signal to the mixer. One terminal of the transformer input (primary) is grounded and both the secondary terminals are fed to the balanced terminals of the mixer. The transformer disclosed here can be used as a balun in those applications.
[0039] A passive FET or diode mixer can be modelled as a conductance in parallel with a capacitance under drive. Many compact baluns are designed with spiral coils in integrated mixer products. Low-loss baluns are achieved by a resonance method that works well in a particular band. The loss is minimum when the mixer RF port is in resonance with the balun. However, the resonance is not very sharp; it is spread wider due to the conversion conductance of the mixer. The balun is loaded on the secondary side by a virtual conductance (1/RMIX) and capacitance CMIX of the mixer device. These baluns, many times, for practical purposes, need additional metal-insulator-metal capacitance in parallel for tuning the primary side. When the switch S1 is turned on, the effective primary and secondary inductance are reduced; L1 reduces to L1(1−k.sub.13.sup.2) and L2 becomes L2(1−k.sub.23.sup.2). The band is switched to the higher side. A primary capacitance Cp is switched off to extend the high side band.
[0040] Tuning of mixer conversion loss is accomplished by the example connected as shown in
[0041] Having thus described the basic concept of the invention, it will be rather apparent to those skilled in the art that the foregoing detailed disclosure is intended to be presented by way of example only, and is not limiting. Various alterations, improvements, and modifications will occur and are intended to those skilled in the art, though not expressly stated herein. These alterations, improvements, and modifications are intended to be suggested hereby, and are within the spirit and scope of the invention. Additionally, the recited order of processing elements or sequences, or the use of numbers, letters, or other designations therefore, is not intended to limit the claimed processes to any order except as may be specified in the claims. Accordingly, the invention is limited only by the following claims and equivalents thereto.