SYNCHRONIZATION OF FRAMES IN MULTIPLE STREAMS IN A WIRELESS COMMUNICATIONS SYSTEM (WCS)
20220394645 · 2022-12-08
Inventors
Cpc classification
H04W56/008
ELECTRICITY
International classification
Abstract
In an exemplary aspect, a digital routing unit (DRU) may have two signal streams that require synchronization therebetween. To provide such synchronization, the DRU may insert a frame counter into signals being sent to remote units. If both signals are sent to the same remote unit, the remote unit may synchronize by matching frames having the same frame counter. The remote unit may also determine a time of arrival difference between frames having the same frame counter and buffer frames accordingly to assist in synchronizing the frames. If the two signals are sent to different remote units, the remote units may send the counter back to the DRU, which can calculate a round trip time difference and insert a phase offset in future transmissions to assist in synchronization. In this fashion, the frames may be synchronized to assist in meeting the relevant fourth generation (4G) or fifth generation (5G) requirements.
Claims
1. A remote unit comprising: an input configured to receive a first frame in a first stream, the first frame having a first frame counter number; the input further configured to receive a second frame in a second stream, the second frame having a second frame counter number equal to the first frame counter number; a buffer; and a control circuit configured to buffer the first frame in the buffer until the second frame arrives.
2. The remote unit of claim 1, wherein the input is coupled to a common public radio interface (CPRI) control plane and the first frame comprises a CPRI frame.
3. The remote unit of claim 1, further comprising an antenna array, wherein the control circuit is configured to transmit signals in the first frame and the second frame synchronously through the antenna array.
4. The remote unit of claim 3, wherein the antenna array is configured to transmit according to a fifth generation-new radio (5G-NR) protocol.
5. The remote unit of claim 1, wherein the input comprises a first connection to a first link and a second connection to a second link.
6. A central unit device, comprising: a counter configured to place a frame counter number in a frame; a transmitter configured to send: a first frame with a first frame counter number to a first remote unit; and a second frame with the first frame counter number to a second remote unit; a receiver configured to receive: a third frame with the first frame counter number and a first timestamp from the first remote unit; and a fourth frame with the first frame counter number a second timestamp from the second remote unit; and a control circuit comprising a comparator; the control circuit configured to compare with the comparator the first and second timestamps in the third and fourth frames and calculate a delay for a stream of frames corresponding to the first frame.
7. The central unit device of claim 6, wherein the first frame is associated with a common radio public interface (CPRI) stream of frames.
8. The central unit device of claim 6, further comprising a counter configured to generate frame counter numbers for use in frames.
9. The central unit device of claim 6, further comprising an optical output coupled to the transmitter and configured to connect to an optical medium for transmission of the first frame.
10. A remote unit comprising: an input configured to receive a first frame in a first stream, the first frame having a first frame counter number; and a stamp and loopback circuit configured to: generate a timestamp on arrival of the first frame; insert the timestamp in a second frame; and cause the second frame to be sent back to an origin of the first frame.
11. The remote unit of claim 10, wherein the stamp and loopback circuit is further configured to determine a phase offset and insert the phase offset into the second frame.
12. The remote unit of claim 10, wherein the input comprises a fiber optic input.
13. The remote unit of claim 10, wherein the first frame further comprises data to be transmitted.
14. The remote unit of claim 13, further comprising an antenna array through which the data to be transmitted is transmitted.
15. The remote unit of claim 14, wherein the antenna array is configured to transmit using a fifth generation-new radio (5G-NR) protocol.
16. A wireless communications system (WCS), comprising: a digital routing unit (DRU) coupled to a centralized services node via a baseband unit (BBU), the DRU comprising a frame counter; and a plurality of remote units each coupled to the DRU via a plurality of optical fiber-based communications media, respectively; wherein: the DRU is configured to: receive a downlink communications signal from the centralized services node; convert the downlink communications signal into a plurality of downlink communications signals; distribute the plurality of downlink communications signals to the plurality of remote units using frames having frame counter numbers from the frame counter; receive a plurality of uplink communications signals from the plurality of remote units, respectively; convert the plurality of uplink communications signals into an uplink communications signal; and provide the uplink communications signal to the centralized services node.
17. The WCS of claim 16, wherein: the DRU comprises: an electrical-to-optical (E/O) converter configured to convert the plurality of downlink communications signals into a plurality of downlink optical communications signals, respectively; and an optical-to-electrical (O/E) converter configured to convert a plurality of uplink optical communications signals into the plurality of uplink communications signals, respectively; and the plurality of remote units each comprise: a respective O/E converter configured to convert a respective one of the plurality of downlink optical communications signals into a respective one of the plurality of downlink communications signals; and a respective E/O converter configured to convert a respective one of the plurality of uplink communications signals into a respective one of the plurality of uplink optical communications signals.
18. The WCS of claim 16, wherein a remote unit comprises a buffer and a control circuit, the control circuit configured to compare frame numbers in two different frames to determine that the frame numbers are the same and buffer a first-to-arrive frame until the second frame arrives.
19. The WCS of claim 16, wherein a remote unit comprises a stamp and loopback circuit configured to insert a time of arrival timestamp into a frame and send the frame back to the DRU.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
[0027] Embodiments disclosed herein include systems and methods for synchronization of frames in multiple streams in a wireless communications system (WCS). In an exemplary aspect, digital routing unit (DRU) may have two signal streams that require synchronization therebetween. To provide such synchronization, the DRU may insert a frame counter into signals being sent to remote units. If both signals are sent to the same remote unit, the remote unit may synchronize by matching frames having the same frame counter. The remote unit may also determine a time of arrival difference between frames having the same frame counter and buffer frames accordingly to assist in synchronizing the frames. If the two signals are sent to different remote units, the remote units may send the counter back to the DRU, which can calculate a round trip time difference and insert a phase offset in future transmissions to assist in synchronization. In this fashion, the frames may be synchronized to assist in meeting the relevant fourth generation (4G) or fifth generation (5G) requirements.
[0028] An overview of a WCS is provided with reference to
[0029] In this regard,
[0030] The centralized services node 102 can also be interfaced through an x2 interface 116 to a digital baseband unit (BBU) 118 that can provide a digital signal source to the centralized services node 102. The digital BBU 118 is configured to provide a signal source to the centralized services node 102 to provide downlink communications signals 120D to the O-RAN remote unit 112 as well as to a digital routing unit (DRU) 122 as part of a digital distributed antenna system (DAS). The DRU 122 is configured to split and distribute the downlink communications signals 120D to different types of remote units, including a low-power remote unit (LPR) 124, a radio antenna unit (dRAU) 126, a mid-power remote unit (dMRU) 128, and a high-power remote unit (dHRU) 130. The DRU 122 is also configured to combine uplink communications signals 120U received from the LPR 124, the dRAU 126, the dMRU 128, and the dHRU 130 and provide the combined uplink communications signals 120U to the digital BBU 118. The digital BBU 118 is also configured to interface with a third-party central unit 132 and/or an analog source 134 through a radio frequency (RF)/digital converter 136.
[0031] The DRU 122 may be coupled to the LPR 124, the dRAU 126, the dMRU 128, and the dHRU 130 via an optical fiber-based communications medium 138. In this regard, the DRU 122 can include a respective electrical-to-optical (E/O) converter 140 and a respective optical-to-electrical (O/E) converter 142. Likewise, each of the LPR 124, the dRAU 126, the dMRU 128, and the dHRU 130 can include a respective E/O converter 144 and a respective O/E converter 146.
[0032] The E/O converter 140 at the DRU 122 is configured to convert the downlink communications signals 120D into downlink optical communications signals 148D for distribution to the LPR 124, the dRAU 126, the dMRU 128, and the dHRU 130 via the optical fiber-based communications medium 138. The O/E converter 146 at each of the LPR 124, the dRAU 126, the dMRU 128, and the dHRU 130 is configured to convert the downlink optical communications signals 148D back to the downlink communications signals 120D. The E/O converter 144 at each of the LPR 124, the dRAU 126, the dMRU 128, and the dHRU 130 is configured to convert the uplink communications signals 120U into uplink optical communications signals 148U. The O/E converter 142 at the DRU 122 is configured to convert the uplink optical communications signals 148U back to the uplink communications signals 120U.
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[0034] It should be appreciated that the CPRI standard is a full duplex transport standard with basic frames originating at either endpoint, and these basic frames may be phase independent as illustrated by signal flow 300 in
[0035] In and of itself, CPRI is well suited for many purposes. Things get complicated when CPRI is layered into a 4G or 5G network. This complication comes from the Third Generation Partnership Project (3GPP), which defines requirements for signal synchronization between antenna ports. When signals for different antenna ports are sent on the same CPRI line, they are automatically synchronized as they are sent inside the same basic frames. While it is possible to send all the signals on the same CPRI line, this arrangement may cause suboptimal utilization of CPRI resources. Conversely, having multiple CPRI lines may result in optimal utilization of CPRI resources, but suffer because the frames in the different CPRI lines are not synchronized. Such misalignment may result in a delay of 260 ns (e.g., approximately the length of a basic frame).
[0036] An example system 400 with two CPRI lines 402(1)-402(2) connecting a DRU 404 to a RU 406 is provided in
[0037] Exemplary aspects of the present disclosure provide a mechanism to correct for misalignment between different CPRI streams on different CPRI lines. In an exemplary aspect, better illustrated in
[0038] Thus, as better seen in
[0039] The RU 616 may do the comparison for the frame counters when the RU 616 receives both (or more than two) streams. However, there may be situations where streams to be synchronized are sent to different RUs as better illustrated in
[0040] A solution to this situation is provided by including a stamp and loopback circuit within the RUs as better illustrated in
[0041] The DRU 902 receives both return frames from the two RUs 906 and 910 and compares with a comparator 928 the time of receipt of the frames having the same frame counters. Based on the difference in time stamp and phase offsets, the DRU 902 may calculate a difference in time of receipt at the respective RU 906 and 910. The DRU 902 may then delay sending frames to one or the other RU 906 or 910 so that subsequent frames are properly synchronized for transmission by the RU 906 and 910.
[0042] The WCS 100 of
[0043] The WCS 100 of
[0044] The environment 1100 includes exemplary macrocell RANs 1102(1)-1102(M) (“macrocells 1102(1)-1102(M)”) and an exemplary small cell RAN 1104 located within an enterprise environment 1106 and configured to service mobile communications between a user mobile communications device 1108(1)-1108(N) to a mobile network operator (MNO) 1110. A serving RAN for the user mobile communications devices 1108(1)-1108(N) is a RAN or cell in the RAN in which the user mobile communications devices 1108(1)-1108(N) have an established communications session with the exchange of mobile communications signals for mobile communications. Thus, a serving RAN may also be referred to herein as a serving cell. For example, the user mobile communications devices 1108(3)-1108(N) in
[0045] In
[0046] In
[0047] The environment 1100 also generally includes a node (e.g., eNodeB or gNodeB) base station, or “macrocell” 1102. The radio coverage area of the macrocell 1102 is typically much larger than that of a small cell where the extent of coverage often depends on the base station configuration and surrounding geography. Thus, a given user mobile communications device 1108(3)-1108(N) may achieve connectivity to the network 1120 (e.g., EPC network in a 4G network, or 5G Core in a 5G network) through either a macrocell 1102 or small cell radio node 1112(1)-1112(C) in the small cell RAN 1104 in the environment 1100.
[0048] Any of the circuits in the WCS 100 of
[0049] The processing circuit 1202 represents one or more general-purpose processing circuits such as a microprocessor, central processing unit, or the like. More particularly, the processing circuit 1202 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or processors implementing a combination of instruction sets. The processing circuit 1202 is configured to execute processing logic in instructions 1216 for performing the operations and steps discussed herein.
[0050] The computer system 1200 may further include a network interface device 1210. The computer system 1200 also may or may not include an input 1212 to receive input and selections to be communicated to the computer system 1200 when executing instructions. The computer system 1200 also may or may not include an output 1214, including, but not limited to, a display, a video display unit (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device (e.g., a keyboard), and/or a cursor control device (e.g., a mouse).
[0051] The computer system 1200 may or may not include a data storage device that includes instructions 1216 stored in a computer-readable medium 1218. The instructions 1216 may also reside, completely or at least partially, within the main memory 1204 and/or within the processing circuit 1202 during execution thereof by the computer system 1200, the main memory 1204 and the processing circuit 1202 also constituting the computer-readable medium 1218. The instructions 1216 may further be transmitted or received over a network 1220 via a network interface device 1210.
[0052] While the computer-readable medium 1218 is shown in an exemplary embodiment to be a single medium, the term “computer-readable medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of instructions. The term “computer-readable medium” shall also be taken to include any medium that is capable of storing, encoding or carrying a set of instructions for execution by the processing circuit and that cause the processing circuit to perform any one or more of the methodologies of the embodiments disclosed herein. The term “computer-readable medium” shall accordingly be taken to include, but not be limited to, solid-state memories, optical and magnetic medium, and carrier wave signals.
[0053] Note that as an example, any “ports,” “combiners,” “splitters,” and other “circuits” mentioned in this description may be implemented using Field Programmable Logic Array(s) (FPGA(s)) and/or a digital signal processor(s) (DSP(s)), and therefore, may be embedded within the FPGA or be performed by computational processes.
[0054] The embodiments disclosed herein include various steps. The steps of the embodiments disclosed herein may be performed by hardware components or may be embodied in machine-executable instructions, which may be used to cause a general-purpose or special-purpose processor programmed with the instructions to perform the steps. Alternatively, the steps may be performed by a combination of hardware and software.
[0055] The embodiments disclosed herein may be provided as a computer program product, or software, that may include a machine-readable medium (or computer-readable medium) having stored thereon instructions, which may be used to program a computer system (or other electronic devices) to perform a process according to the embodiments disclosed herein. A machine-readable medium includes any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable medium includes a machine-readable storage medium (e.g., read only memory (“ROM”), random access memory (“RAM”), magnetic disk storage medium, optical storage medium, flash memory devices, etc.).
[0056] The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A controller may be a processor. A processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
[0057] The embodiments disclosed herein may be embodied in hardware and in instructions that are stored in hardware, and may reside, for example, in Random Access Memory (RAM), flash memory, Read Only Memory (ROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, a hard disk, a removable disk, a CD-ROM, or any other form of computer-readable medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a remote station. In the alternative, the processor and the storage medium may reside as discrete components in a remote station, base station, or server.
[0058] Unless otherwise expressly stated, it is in no way intended that any method set forth herein be construed as requiring that its steps be performed in a specific order. Accordingly, where a method claim does not actually recite an order to be followed by its steps or it is not otherwise specifically stated in the claims or descriptions that the steps are to be limited to a specific order, it is no way intended that any particular order be inferred.
[0059] It will be apparent to those skilled in the art that various modifications and variations can be made without departing from the spirit or scope of the invention. Since modifications combinations, sub-combinations and variations of the disclosed embodiments incorporating the spirit and substance of the invention may occur to persons skilled in the art, the invention should be construed to include everything within the scope of the appended claims and their equivalents.