POWER ELECTRONICS MODULE WITH A SUPPORT WITH A PALLADIUM/OXYGEN DIFFUSION BARRIER LAYER AND A SEMICONDUCTOR ELEMENT CONNECTED THERETO BY MEANS OF SINTERING, AND METHOD FOR PRODUCING SAME

Abstract

A power electronics module includes a semiconductor element and a support with a functional surface for indirectly connecting to the semiconductor element. A palladium barrier layer is formed directly or indirectly on the functional surface, and the semiconductor element is directly or indirectly connected to the barrier layer face facing away from the functional surface by a layer of sintering silver paste. A silver layer is can be formed on the barrier layer, and a nickel layer can be formed between the functional surface and the barrier layer.

Claims

1. A power electronics module comprising: a semiconductor element; s support comprising a functional surface for indirect connection to the semiconductor element; a barrier layer comprising palladium; and a second layer comprising a silver sintering paste; wherein the barrier layer being formed on the functional surface directly or indirectly at least in sections of the functional surface; wherein the semiconductor element is connected by the second layer directly or indirectly to a first side of the harder layer, the first side facing away from the functional surface.

2. The power electronics module as claimed in claim 1, wherein the barrier layer comprises a layer thickness of 0.1 m-1.0 m, 0.3 m-0.7 m, or 0.4 m-0.6 m.

3. The power electronics module as claimed in claim 1, further comprising a third layer consisting of silver, wherein the third layer is electrolytically applied at least in sections between the barrier layer and the second layer.

4. The power electronics module as claimed in claim 3, wherein the third layer comprises a layer thickness of 0.1 m-5.0 m or 0.5 m-2.0 m.

5. The power electronics module as claimed in claim 1, further comprising a nickel layer is formed at least in sections between the functional surface and the barrier layer.

6. The power electronics module as claimed in claim 5, the nickel layer comprises a layer thickness of 0.025 m-3.0 m or 0.1 m-2.0 m.

7. The power electronics module as claimed in claim 1, wherein the support is formed from copper, a copper alloy, or nickel.

8. The power electronics module as claimed in claim 1, further comprising a palladium-silver diffusion layer, wherein the palladium-silver diffusion layer is formed by application of pressure or application of heat during when connecting the semiconductor element to the support.

9. The power electronics module as claimed in claim 8, wherein the palladium-silver diffusion layer comprises a layer thickness of 5 nm-300 nm or 10 nm-200 nm.

10. A method for producing a power electronics module, the power electronics module comprising: a semiconductor element; a support comprising a functional surface for indirect connection to the semiconductor element; a barrier layer comprising palladium; and a second layer comprising a silver sintering paste; wherein the barrier layer being, formed on the functional surface directly or indirectly at least in sections of the functional surface; wherein the semiconductor element is connected by the second layer directly or indirectly to a first side of the barrier layer; the first side facing away from the functional surface; the method comprising the steps of (a) at least in sections directly or indirectly electrolytically coating the functional surface of the support with the barrier layer, (b) applying a layer composed of the silver sintering paste to a side of the semiconductor element or directly to the barrier layer of the support or indirectly to the barrier layer; and (c) connecting the semiconductor element to the support by means of the layer composed of silver sintering paste by application of heat.

11. The method as claimed in claim 10, wherein the barrier layer is coated with a silver layer at least in sections when connecting to the semiconductor element.

12. The method as claimed in claim 10, wherein before step (a) the functional surface of the support is coated with a nickel layer at least in sections.

13. The method as claimed in claim 10, wherein step (c) is performed by application

14. The method as claimed in claim 10, wherein a palladium-silver diffusion layer is diffused by application of pressure or application of heat during when connecting of the semiconductor element.

Description

BRIEF DESCRIPTION OF THE INVENTION

[0030] The invention is explained more specifically below with further details on the basis of exemplary embodiments with reference to the accompanying schematic drawings.

[0031] In said drawings:

[0032] FIG. 1 shows a power electronics module according to the invention in accordance with a first embodiment; and

[0033] FIG. 2 shows a power electronics module according to the invention with a palladium-silver diffusion layer having been formed.

[0034] The same reference numerals are used hereinafter for identical and identically acting parts.

[0035] FIG. 1 illustrates the structure of a power electronics module 10 according to the invention.

[0036] The module comprises a semiconductor element 11. Said semiconductor element 11 may be in particular a power semiconductor element. Furthermore, the power electronics module 10 comprises a support 12. The support 12 is for example a leadframe formed from a copper material. The support 12 has a functional surface 13, which serves for indirect connection to the semiconductor element 11.

[0037] A nickel layer 14 is applied on the functional surface of the support 12. The layer thickness d1 of the nickel layer 14 may be 0.05 m-3.0 m, for example.

[0038] A barrier layer 15 composed of palladium is formed at least in sections on the nickel layer 14. In other words, the barrier layer 15 composed of palladium is formed indirectly on the functional surface 13 of the support 12. The barrier layer 15 composed of palladium may have a layer thickness d2 of 0.1 m-0.5 m. A silver layer 17, in particular applied electrolytically, is formed at least in sections on the barrier layer 15, namely on the side 16 of the barrier layer 15 facing away from the functional surface 13 of the support 12. The silver layer 17 may have a layer thickness d3 of 0.5 m-2.0 m.

[0039] A layer 19 composed of a silver sintering paste is formed at least in sections on the side 18 of the silver layer 17 facing away from the functional surface 13 of the support 12 or from the barrier layer 15. The layer 19 composed of a silver sintering paste serves for connecting the semiconductor element 11 to the support 12.

[0040] FIG. 1 illustrates the state in which the semiconductor element 11 has already been joined together with the support 12. The layer 19 composed of a silver sintering paste may either be applied on the side 18 of the silver layer 17 before the joining together process, such that the semiconductor element 11 is attached to the layer 19 composed of silver sintering paste by the side 20 facing the support 12.

[0041] Alternatively, it may be provided that the layer 19 composed of a silver sintering paste is firstly applied on the side 20 of the semiconductor element 11. This is followed by the semiconductor element 11 provided with a silver sintering paste being joined together indirectly with the support 12.

[0042] As can be gathered from FIG. 1, the layer 19 composed of a silver sintering paste is indirectly connected to the side 16 of the barrier layer 15 facing away from the functional surface 13 of the support 12.

[0043] A sintering process is carried out in order to connect the semiconductor element 11 to the support 12 by means of the layer 19 composed of silver sintering paste. This is accompanied by application of pressure and/or application of heat. That is to say that while at least slight pressure is applied to the semiconductor element 11 and to the support 12 or to the layers 14, 15, 17 and 19 situated between the support material 12 and the semiconductor element 11, said pressure serving for adhering the semiconductor element 11 on the underlying layers, application of heat is carried out at the same time.

[0044] As is illustrated in FIG. 2, the palladium of the barrier layer 15 diffuses into the silver of the silver layer 17, such that a palladium-silver diffusion layer 21 is formed. Said palladium-silver diffusion layer 21 forms a barrier for the oxygen permeation or oxygen diffusion through the silver sintering paste layer 19 and silver layer 17 to the metal of the support 12. Oxidation of the support metallization is thus prevented. The silver layer 17 or the layer 19 composed of a silver sintering paste consequently does not detach from the support 12 or the nickel layer 14 even at relatively high temperatures to which the power electronics module 10 is exposed.

[0045] The layer thickness d4 of the palladium-silver diffusion layer 21 may be 5 nm-300 nm, in particular 10 nm-200 nm.

[0046] Tests have shown, for example, that the silver layer 17 or the layer composed of silver sintering paste 19 is not detached from the barrier layer 15 even after being subjected to a temperature of 245 C. over 690 hours.

[0047] It should be pointed out at this juncture that all elements and components described above in association with the embodiments in accordance with FIGS. 1 and 2, as considered by themselves or in any combination, in particular the details illustrated in the drawings, are claimed as essential to the invention.

LIST OF REFERENCE SIGNS

[0048] 10 Power electronics module [0049] 11 Semiconductor element [0050] 12 Support [0051] 13 Functional surface [0052] 14 Nickel layer [0053] 15 Barrier layer [0054] 16 Side of barrier layer [0055] 17 Silver layer [0056] 18 Side of silver layer [0057] 19 Layer composed of a silver sintering paste [0058] 20 Side of semiconductor element [0059] 21 Palladium-silver diffusion layer [0060] d1 Layer thickness of nickel layer [0061] d2 Layer thickness of barrier layer [0062] d3 Layer thickness of silver [0063] d4 Layer thickness of palladium-silver diffusion layer