PSEUDO-SUBSTRATE WITH IMPROVED EFFICIENCY OF USAGE OF SINGLE CRYSTAL MATERIAL

Abstract

A method for fabricating a structure comprises preparing a first pseudo-substrate, and in-depth weakening the first pseudo-substrate by ion implantation at a certain depth in the first pseudo-substrate. The first pseudo-substrate is prepared by providing a single crystal substrate comprising a piezoelectric material; forming an oxide layer on a surface of the single crystal substrate; and transferring a piezoelectric layer of the single crystal substrate adjacent the oxide layer to a handle substrate to form the first pseudo-substrate. The method further comprises bonding the first pseudo-substrate to a substrate to provide an assembly, and separating the assembly at the ion-implanted depth of the first pseudo-substrate to form the structure and a second pseudo-substrate. The structure comprises at least a portion of the piezoelectric layer of the single crystal substrate on the substrate.

Claims

1. A method for fabricating a pseudo-substrate, comprising: providing a single crystal substrate comprising a piezoelectric material; providing an oxide layer on a surface of the single crystal substrate; bonding a handle substrate to the oxide layer on a side opposite the single crystal substrate; and separating a layer of the piezoelectric material of the single crystal substrate adjacent the oxide layer from a remainder of the single crystal substrate to provide the pseudo-substrate comprising the layer of the piezoelectric material, the handle substrate, and the oxide layer therebetween.

2. The method of claim 1, wherein the layer of the piezoelectric material has a thickness of 100 m or less.

3. The method of claim 1, wherein the handle substate comprises silicon substrate.

4. The method of claim 1, wherein the piezoelectric material comprises LiNbO.sub.3 or LiTaO.sub.3.

5. The method of claim 1, wherein the oxide layer comprises silicon oxide layer.

6. The method of claim 1, wherein providing the oxide layer on the surface of the single crystal substrate is performed without polishing the surface of the single crystal substrate.

7. The method of claim 1, wherein providing an oxide layer on a surface of the single crystal substrate comprises depositing at least one oxide layer on the surface of the single crystal substrate by chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD).

8. A method for fabricating a structure, comprising: preparing a first pseudo-substrate, including: providing a single crystal substrate comprising a piezoelectric material; forming an oxide layer on a surface of the single crystal substrate; and transferring a piezoelectric layer of the single crystal substrate adjacent the oxide layer to a handle substrate to form the first pseudo-substrate comprising the piezoelectric layer of the single crystal substrate having a first surface and a second surface opposite the first surface, the oxide layer adjacent the first surface of the piezoelectric layer of the single crystal substrate, and the handle substrate adjacent the oxide layer; in-depth weakening the first pseudo-substrate by ion implantation at a certain depth in the first pseudo-substrate; bonding the first pseudo-substrate to a substrate to provide an assembly comprising the piezoelectric layer of the single crystal substrate, the oxide layer adjacent the first surface of the piezoelectric layer of the single crystal substrate, the handle substrate adjacent the oxide layer, and the substrate adjacent the second surface of the piezoelectric layer of the single crystal substrate; and separating the assembly at the ion-implanted depth of the first pseudo-substrate to form: the structure comprising at least a portion of the piezoelectric layer of the single crystal substrate on the substrate, and a second pseudo-substrate comprising a remainder portion of the piezoelectric layer of the single crystal substrate, the oxide layer adjacent the surface of the remainder portion of the piezoelectric layer, and the handle substrate adjacent the oxide layer.

9. The method of claim 8, wherein the piezoelectric layer of the single crystal substrate has a thickness of 300 m or less.

10. The method of claim 8, further comprising reducing the thickness of the piezoelectric layer of the pseudo-substrate, prior to bonding the pseudo-substrate to the substrate.

11. The method of claim 8, wherein transferring the piezoelectric layer of the single crystal substrate adjacent the bonding layer to the handle substrate comprises: bonding the oxide layer to the handle substrate, and subsequently separating the piezoelectric layer of the single crystal substrate from a remainder of the single crystal substrate.

12. The method of claim 8, wherein transferring the thin piezoelectric layer of the single crystal substrate adjacent the bonding layer to the handle substrate comprises: separating the piezoelectric layer of the single crystal substrate from a remainder of the single crystal substrate, and subsequently bonding the oxide layer to the handle substrate.

13. The method of claim 8, wherein: the method further comprises providing an adhesive layer on the second surface of the piezoelectric layer of the single crystal substrate; and bonding the first pseudo-substrate to the substrate comprises bonding the adhesive layer on the second surface of the piezoelectric layer of the first pseudo-substrate to the substrate.

14. The method of claim 8, wherein in-depth weakening the first pseudo-substrate by ion implantation is performed before bonding the first pseudo-substrate to the substrate.

15. The method of claim 8, further comprising: in-depth weakening the second pseudo-substrate by ion implantation at another certain depth in the second pseudo-substrate; bonding a free surface of the remainder portion of the piezoelectric layer of the second pseudo-substrate to another substrate to provide another assembly; and separating the another assembly at the another ion-implanted depth of the second pseudo-substrate to form another structure comprising at least another portion of the piezoelectric layer of the single crystal substrate on the another substrate.

16. The method of claim 15, wherein bonding a free surface of the remainder portion of the piezoelectric layer of the second pseudo-substrate to another substrate comprises providing an adhesive layer on the free surface of the remainder portion of piezoelectric layer of the second pseudo-substrate, prior to bonding the free surface of the remainder portion of the piezoelectric layer of the second pseudo-substrate to the another substrate.

17. A method for fabricating a pseudo-substrate, comprising: providing a single crystal substrate comprising a piezoelectric material; providing an oxide layer on a surface of the single crystal substrate; separating a thin piezoelectric layer of the single crystal substrate adjacent the oxide layer from a remainder of the single crystal substrate, the thin piezoelectric layer having a thickness of 300 m or less; and molecularly bonding the oxide layer adjacent the thin piezoelectric layer of the single crystal substrate to a handle substrate to provide the pseudo-substrate comprising the handle substrate, the thin piezoelectric layer of the single crystal substrate, and the oxide layer therebetween.

18. The method of claim 17, wherein the oxide layer has a thickness about 100 m.

19. The method of claim 17, wherein the oxide layer has the same properties as a native oxide of a material of the single crystal substrate.

20. The method of claim 17, wherein separating the thin piezoelectric layer of the single crystal substrate adjacent the oxide layer from the remainder of the single crystal substrate comprises: forming a mechanically stable self-standing structure comprising the thin piezoelectric layer of the single crystal substrate and the oxide layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The invention will be described in more detail hereafter using exemplary embodiments described in relation with the following figures, wherein:

[0034] FIG. 1, including portions 1a through 1d, illustrates a first exemplary embodiment of the invention wherein a thin cut slice of an ingot is attached to a handle substrate;

[0035] FIG. 2, including portions 2a through 2c, illustrates a second embodiment of the invention in which the thin cut slice is further thinned down;

[0036] FIG. 3, including portions 3a through 3c, illustrates a third embodiment, describing the fabrication of an electronic device;

[0037] FIG. 4, including portions 4a through 4d, illustrates a fourth embodiment of the invention;

[0038] FIG. 5, including portions 5a through 5e, illustrates a fifth embodiment of the invention in which a thin slice is cut below the critical thickness;

[0039] FIG. 6, including portions 6a through 6d, illustrates a sixth embodiment of the invention; and

[0040] FIG. 7, including portions 7a through 7d, illustrates a seventh embodiment of the invention describing a direct bonding of a thin cut slice onto a final substrate.

DETAILED DESCRIPTION

[0041] FIG. 1, including portions 1a through 1d, illustrates a first example of an embodiment of the invention.

[0042] As shown in portions 1a and 1b of FIG. 1, a single crystal ingot 101 of GaN and a handle substrate 102, in this example, a Si wafer, are provided. The handle substrate 102 comprises two surfaces 103, 104. Crystal ingots of other materials, like SiC, YAG, ZnO, AlN, sapphire, Si, Ge, III-V semiconductors, II-VI semiconductors, piezoelectric materials, LiNbO.sub.3, LiTaO.sub.3, or the like, or other handle substrates 102 of the same or similar materials, provided that the difference in coefficient of thermal expansion (CTE) is low, could also be used.

[0043] Next, as illustrated in FIG. 1, portion 1c, a slice 105 of GaN is cut, in particular, sawn, from the single crystal ingot 101. According to the invention, the slice 105 is cut at a thickness substantially equal to a critical thickness below which the slice 105, if taken alone, is no longer mechanically stable. In the first embodiment, the slice 105 has a thickness of approximately 300 m for a diameter of approximately 2 inches. The remainder 101 of the initial GaN ingot 101 can be reused to obtain further slices for additional semiconductor assemblies. The single crystal slice 105 of GaN comprises two free surfaces 106, 107, both having a level of surface roughness, e.g., due to the sawing process. In the case of reusing the remainder 101 of the initial ingot 101, according to the invention, it is not necessary to polish the surface of the ingot 101 from which the slice 105 was cut.

[0044] According to the invention, and as illustrated in FIG. 1, portion 1d, the slice 105 is then attached by one of its free surfaces 107 to one of the free surfaces 103 of the handle substrate 102, thereby forming a pseudo-substrate 109.

[0045] In this embodiment of the invention, the attachment is performed using a layer of an adhesive 108, in particular, a ceramic-based adhesive. The adhesive 108 and the handle substrate 102 are preferably both chosen with matching coefficients of thermal expansion with respect to the single crystal slice 105. The use of the adhesive 108 has the particular advantage that the cut single crystal slice 105 can be attached to the handle substrate 102 without having to go through any polishing step of its surfaces 106, 107, as the adhesive layer 108 compensates for the surface roughness of the slice 105.

[0046] According to further variants of the invention, the pseudo-substrate 109 can be chamfered and/or a flat and/or a notch can be provided.

[0047] Portions 2a to 2c of FIG. 2 illustrate the use of the inventive pseudo-substrate 109 according to a second embodiment. As illustrated in portion 2a of FIG. 2, the thin slice 105 can be thinned starting from the free surface 106, thus, the one opposite to where the attachment to the substrate 102 occurred. Thus, the free surface 106 displaying surface roughness can be thinned, in particular, polished, to form a thinned surface 106. The slice 105 can be thinned to a thickness of approximately 100 m or less, for instance, even approximately 50 m, thereby forming a thinned layer 105 and, thus, the thinned pseudo-substrate 109.

[0048] Next, as illustrated in portion 2b of FIG. 2, an epitaxial growth can be initiated on the free thinned surface 106 of the thinned layer 105 to obtain a high-quality GaN single crystal layer 110 and a pseudo-substrate 111 according to the second embodiment.

[0049] In a variant of the second embodiment, as illustrated in portion 2c of FIG. 2, the back side surface 104 of the handle substrate 102, thus, the side opposite to where the attachment occurred, can also be thinned to obtain a thinned substrate surface 104 and, thus, a thinned handle substrate 102 in order to correct any flatness defect, or in order to adjust the total thickness of the even more thinned pseudo-substrate 112 according to this variant of the second embodiment. Typically, the material removal is of the order of 50 m to 500 m.

[0050] The semiconductor assemblies 109, 109, 111 or 112 can then serve as the basis for the fabrication of semiconductor devices as illustrated in FIG. 3, portions 3a to 3c. For example, in the third embodiment, the thinned pseudo-substrate 109 (or 109, or 111 or 112) is used, in particular, for fabricating an LED structure, e.g., based on a GaN/InGaN junction. For instance, the pseudo-substrate 109 (or 109 or 111 or 112) is loaded in a metal organic chemical vapor deposition (MOCVD) epitaxy reactor with a 600 C. to 1100 C. temperature range in order to obtain the InGaN layer 201 of the LED structure.

[0051] In portion 3a of FIG. 3, the LED structure may comprise additional layers. In addition, the relative thickness of the layers of the LED structure may vary, compared to the illustration of portion 3a. Further method steps may lead to the deposition of contact layers 202, which are also only representative on the pseudo-substrate 203 illustrated in portion 3a of FIG. 3. Further layers may be deposited. In addition, patterning steps may be provided to interconnect and/or isolate the various layers to form the desired devices.

[0052] As illustrated in FIG. 3, portion 3b, a final substrate 204, which can be partially or fully processed and which can be made of or comprise, for example, one of silicon, germanium, a metal such as copper, molybdenum, tungsten, or the like, or a metallic alloy such as WCu, or the like, can be attached to the uppermost layer of the pseudo-substrate 203. These materials are not restrictive and are only exemplary. In particular, any other material suited for LED applications or any power device built using a vertical structure can be used.

[0053] As illustrated in FIG. 3, portion 3c, the handle substrate 102 and the adhesive layer 108 are then removed entirely, e.g., by mechanical polishing, such that a final structure 205 is obtained, wherein the original back side surface 107 of the GaN slice 105 has become a free surface 107. This free surface 107 can, in turn, also be polished, thinned and/or patterned for fabricating an even more complex final device.

[0054] Instead of fabricating an LED device, the inventive semiconductor assemblies may be used for any other power device with a vertical structure.

[0055] FIG. 4, portions 4a through 4d, illustrates a fourth exemplary embodiment.

[0056] FIG. 4, portion 4a, illustrates a single crystal ingot 401 of SiC and a handle substrate 402 of Si. Alternatively, materials such as, for instance, SiC, W, AlN, graphite, or the like, can also be used for the handle substrate 402. Similarly to the first embodiments, as illustrated in portion 4b of FIG. 4, a slice 405 of SiC is cut or sawn from the ingot 401 with a thickness substantially equal to a critical thickness below which the slice 405 is no longer mechanically stable. Here, the slice 405 has two free surfaces 406, 407, both displaying a level or surface roughness due to the cutting process, and has a thickness of approximately 300 m for a diameter of approximately 2 inches. Like in the first embodiments, the handle substrate 402 also comprises two free surfaces 403, 404, and the remainder 401 of the initial SiC ingot 201 can then be reused, in particular, without undergoing any polishing step, for cutting other single crystal slices.

[0057] According to a variant of the invention, and as illustrated in portion 4c of FIG. 4, the slice 405 is then attached via a thermo-mechanically stable adhesive layer 408, for instance, a graphite-based adhesive, to one of the free surfaces 403 of the substrate 402 without going through any polishing step. In particular, the back side of the slice 405, which is the free surface 407 at which the attachment will occur, is not polished before the attachment. The thereby formed pseudo-substrate 409 is then annealed at a temperature in the range of 1000 C. to 1500 C. in order to strengthen the adhesive layer 408.

[0058] According to further variants of the inventive method, the pseudo-substrate 409 is then treated similarly to a wafer and undergoes several preparation and finishing steps, such as chamfering, cutting a flat or a notch, and/or polishing the free single crystal surface 406, in order to improve the quality of the surface 406 for a subsequent epitaxial growth.

[0059] The pseudo-substrate 409 can also be polished on one of its free surfaces 406, 404, or double-side polished, for example, in order to adjust the thickness of the single crystal slice 405, or the total thickness of the pseudo-substrate 409. Similarly to the first embodiment, the slice 405 of SiC of the second embodiment can be thinned to a thickness in the range of approximately 50 m to 100 m to form a thinned slice 405 within thinned surface 406.

[0060] The thinning step can be followed by a step of chemical vapor deposition (CVD) in order to obtain the active part of an electronic component. This is schematically illustrated by a layer 410 in portion 4d of FIG. 4, which is only representative of the resulting structure of final assembly 411, but not of the relative thickness or of the number of layers that can be deposited during this step. In the fourth embodiment, an epitaxial structure with controlled doping, such as a drift layer, of at least approximately 10 m is deposited in this step, at a temperature higher than 1500 C. The thickness of such a drift layer 410 can define the breakdown voltage of the junction, e.g., in the case of SiC, 100 V for a thickness of 1 m at 106 dopants per cm.sup.3.

[0061] According to further variants of the fourth embodiment of the invention, and similarly to the previous three embodiments as illustrated in FIGS. 1 to 3, in the fourth embodiment, other subsequent technological steps can be performed, such as ion implantations, annealing steps, or depositing contact layers. Furthermore, the handle substrate 402 can also be removed using grinding or polishing techniques of the back side or remaining free surface 404 of the substrate 402 on the final assembly 411. Such a step advantageously allows removing the adhesive layer 408 from the back side of free surface 407 of the single crystal slice 405 or thinned slice 405, which can subsequently be treated, for example, in order to build an electrical contact and finally split in order to form final electrical components.

[0062] FIG. 5, portions 5a through 5e, illustrates a fifth exemplary embodiment.

[0063] Portion 5a of FIG. 5 illustrates a single crystal ingot 501 of GaN and a handle substrate 502, in this example, an Si wafer. Alternatively, materials such as, for instance, SiC, YAG, ZnO, AlN, sapphire, Si, Ge, III-V semiconductors, piezoelectric materials, LiNbO.sub.3, LiTaO.sub.3, or the like, can also be used for the single crystal ingot 501. Materials other than Si can also be used for the handle substrate 502, provided that the difference in CTE is low. Like in the previous embodiments, the handle substrate 502 comprises two free surfaces 503, 504.

[0064] In the fifth embodiment, as illustrated in portion 5b of FIG. 5, a layer of a stiffener 509 is attached to a free surface 506 of the single crystal ingot 501. In the fifth embodiment, the stiffener 509 is a substrate, such as a polymer, e.g., a strong polyester adhesive tape such as commercial Mylar tape or the like, but could also be a refractory metal such as W, Mo, or the like, chemically and physically stable, at least under 900 C. In the variant of a layer of stiffener 509 of a refractory metal, the layer of stiffener 509 can have a thickness about 100 m and can be deposited, e.g., by chemical vapor deposition (CVD).

[0065] According to a variant of the invention, the stiffening layer 509 now provides enough mechanical stability to cut a thin slice 505 of the single crystal ingot 501, whose thickness can be even below the critical thickness, as illustrated in portion 5c of FIG. 5. In this example, a slice 505 of about 100 m is sawn from the ingot 501, which is less than the critical thickness of GaN. The thin slice 505 and the stiffener 509 now form a mechanically stable self-standing structure 510 with a free surface 507 of single crystal material, which can display a level or surface roughness due to the cutting, e.g., sawing, process. Like in the first embodiments, the remainder 501 of the initial single crystal ingot 501 can then be reused, in particular, without undergoing any polishing step, for cutting other single crystal slices 505. This is possible for subsequent cutting steps, as the stiffener 509 will compensate the surface roughness of the ingot remainder 501 and allow sufficient mechanical stability for cutting new thin layers or slices 505 with a thickness substantially equal or inferior to the critical thickness of the single crystal material of the ingot remainder 501.

[0066] Following a variant of the inventive method, and as illustrated in portion 5d of FIG. 5, the free surface 507 of the slice 505 comprised in the self-standing structure 510, is attached to a surface 503 of the handle substrate 502 by an adhesive layer 508, which compensates for the surface roughness of the free surface 507 of the thin layer 505, which was not submitted to any polishing step prior to the attachment and, thus, still exhibits the surface roughness due to the cutting step. Like in the previous embodiments, the adhesive 508 can be a ceramic-based or a graphite-based adhesive. The thereby formed intermediate pseudo-substrate 511 is then annealed at a temperature in the range of 80 C. to 400 C. in order to strengthen the adhesive layer 508.

[0067] According to variants of the inventive method, the pseudo-substrate 511 can then be treated similarly to a wafer and undergo several preparation and finishing steps, such as chamfering, cutting a flat or a notch, and/or also removing the stiffener 509, which, in this case, is then only used as a temporary substrate for obtaining a slice 505 thinner than the critical thickness of the single crystal material. As illustrated in portion 5e of FIG. 5, a final pseudo-substrate 512 can thus be obtained, with an even thinner single crystal layer 505 and a thinned and/or polished single crystal free surface 506.

[0068] FIG. 6, portions 6a through 6d, illustrates a sixth exemplary embodiment.

[0069] Portion 6a of FIG. 6 illustrates a single crystal ingot 601 of SiC and a handle substrate 602 of Si. The same alternative materials as in the previous embodiments can be used in variants of this embodiment. Like in the previous embodiments, the handle substrate 602 also comprises two free surfaces 603, 604.

[0070] According to a variant of the inventive method, in the sixth embodiment, as illustrated in portion 6b of FIG. 6, a layer 608 of a stiffener is deposited, in particular, by chemical vapor deposition (CVD) or by plasma-enhanced chemical vapor deposition (PECVD), on a free surface 607 of the ingot 601. In this embodiment, the deposited layer 608 is a layer of an oxide chosen so that it has the same properties as a native oxide of the material of the ingot 601. Thus, a variety of oxides could be used in alternative embodiments and will depend mainly on the material of the ingot 601. The oxide layer 608 compensates the surface roughness of the surface 607 of the ingot 501 on which it is deposited.

[0071] In a variant of this embodiment, the stiffener could be a refractory metal such as W, Mo, or the like, chemically and physically stable at least under 900 C. In the variant of a layer 608 of a refractory metal, the layer 608 can have a thickness about 100 m and can be deposited, e.g., by chemical vapor deposition (CVD).

[0072] According to a variant of the invention, the deposited layer 608 is a stiffener that now provides enough mechanical stability to cut a thin slice 605 of the single crystal ingot 601, whose thickness can be even below the critical thickness, as illustrated in portion 6c of FIG. 6. In this example, the thickness of the slice 605 is about 100 m, which is less than the critical thickness of the material of the ingot 601, for instance, SiC. The thin slice 605 and the oxide layer 608 now form a mechanically stable self-standing structure 609 with a free surface 606 of single crystal material, which can display a level or surface roughness due to the cutting, e.g., sawing, process. Like in the first embodiments, and as further illustrated in portion 6c of FIG. 6, the remainder 601 of the initial single crystal ingot 601 can then be reused, in particular, without undergoing any polishing step, for cutting other single crystal slices 605. Similarly to the fifth embodiment, this is possible since the deposited oxide layer 608 will compensate the surface roughness of the ingot 601 and allow sufficient mechanical stability for cutting new thin layers or slices 605 with a thickness substantially equal or inferior to the critical thickness of the single crystal material of the ingot 601.

[0073] Following a variant of the inventive method, the thin slice 605 forming the self-standing structure 609 with the oxide layer 608 could now be attached to the handle substrate 602 by its free single crystal surface 606 using an adhesive such as a ceramic or a graphite-based adhesive, resulting in a pseudo-substrate similar to the intermediate pseudo-substrate 511 of the fifth embodiment illustrated in portion 5d of FIG. 5.

[0074] However, in the sixth embodiment, and as illustrated in portion 6d of FIG. 6, advantage is taken of the oxide layer 608 forming the stiffening and mechanically stabilizing part of the self-standing structure 609. In the sixth embodiment, the self-standing structure 609 is attached to a free surface 603 of the handle substrate 602 by molecular bonding using the oxide layer 608 as a bonding layer. This is possible, in particular, because the oxide layer 608 compensates the surface roughness of the single crystal surface 607 on which it was deposited. Thus, a pseudo-substrate 610 is obtained, wherein a thin slice 605 of a single crystal with a thickness inferior to its critical thickness is attached to a handle substrate 602, in particular, by molecular bonding using the oxide layer 608 as the bonding layer. The pseudo-substrate 610 comprises a free surface 606 of the single crystal material thin slice 605. At this point, the free surface 606 did not require any particular polishing step.

[0075] According to variants of the inventive method, the pseudo-substrate 610 can now be treated similarly to a wafer and undergo several preparation and finishing steps such as chamfering, cutting a flat or a notch, and/or also thinning and/or polishing the free surface 606 of the single crystal material or the back side 604 of the handle substrate 602.

[0076] According to variants of the invention, and similarly to the four embodiments illustrated in FIGS. 1 through 4, in the fifth and sixth embodiments, other subsequent technological steps can be performed, such as ion implantations, annealing steps, or depositing contact layers. Furthermore, the handle substrates 502, 602 can also be removed partially or totally using grinding or polishing techniques of the respective back side or remaining free surfaces 504, 604 of the substrate 502, 602 on the intermediate or final assemblies 511, 512, 610. Like in variants of the previous embodiments, such a step advantageously allows removing the adhesive layer 508 or the deposited oxide layer 608 from the back side 507, 607 of the single crystal slice 505, 505 or 605, which can subsequently be treated, for example, in order to build an electrical contact and finally split in order to form final electrical components.

[0077] FIG. 7, portions 7a through 7d, illustrates the use of the inventive thinned pseudo-substrate 109 of the second embodiment illustrated in portion 2a of FIG. 2, according to a seventh exemplary embodiment.

[0078] In the seventh embodiment, like in the second embodiment, the thinned layer 105 is a layer of GaN. In particular, the back side surface 107 corresponds to the Ga face of the GaN thinned layer 105, and the polished thinned surface 106 corresponds to the N face of the GaN thinned layer 105. In the seventh embodiment, the substrate 102 can be sapphire instead of an Si wafer like in the first and second embodiments, with a matching coefficient of thermal expansion (CTE) relatively to the GaN material of the thinned layer 105. Furthermore, in the seventh embodiment, the free thinned surface 106 is polished such that it surface roughness is compatible with a direct bonding.

[0079] As illustrated in portion 7a of FIG. 7, a final substrate 701 is attached by one of its free surfaces 702, 703, here surface 702, to the polished free surface 106 of the thinned layer 105 by direct bonding. The final substrate 701 is chosen among any of the materials cited for the previous embodiments, provided that its coefficient of thermal expansion (CTE) matches the CTEs of the thinned layer 105, in this example GaN, and of the handle substrate 102, in this example sapphire.

[0080] Next, as illustrated in portion 7b of FIG. 7, the handle substrate 102 and the adhesive layer 108 are then removed entirely, e.g., by mechanical polishing like in the third embodiment and the illustration of portion 3c of FIG. 3, such that a final structure 704 is obtained wherein the original back side surface 107 of the GaN slice 105 has become a free surface 107. This free surface 107 can, in turn, also be polished, thinned and/or patterned for fabricating an even more complex final device.

[0081] In an alternative, illustrated by portions 7c and 7d of FIG. 7, a layer 705 of an oxide can be used to improve the direct bonding between the free surface 702 of the final substrate 701 and the polished surface 106 of the thinned pseudo-substrate 109. It is also possible that more than one oxide layer is used instead of oxide layer 705. When the handle substrate 102 and the adhesive layer 108 are removed, a final structure 706 is obtained, similar to the final structure 704 illustrated in portion 7b of FIG. 7, but comprising at least one oxide layer 705.

[0082] In yet another alternative to the seventh embodiment, the thinned layer 105 could be a slice of SiC instead of GaN. In this case, the free surface 107 corresponds to the Si face of the SiC thinned layer 105, and the polished surface 106 corresponds to the C face of the SiC thinned layer 105. Other materials can be chosen like in the previous embodiments, provided that the CTEs match one another, as explained above.

[0083] In the embodiments described previously, and their variants, the final assemblies 109, 109, 111, 112, 203, 205, 409, 411, 511, 512, 610, 704 and 706 have all the advantage that the efficiency of usage of an initial ingot of an expensive material has been improved with respect to prior art wafering methods, in particular, with respect to the method disclosed in EP 1 324 385 A2. One reason is that instead of manufacturing a wafer from a single crystal ingot, which requires extensive polishing and thinning steps, according to the inventive method, a slice of the ingot can already be cut at a thickness of approximately the critical thickness below which the slice is no longer mechanically stable if taken alone, or at a thickness even below the critical thickness, such that it is possible to work directly on a thinner single crystal slice compared to prior art methods without needing to polish the slice beforehand. Thus, starting from a single crystal ingot, up to about 30% to about 50% more semiconductor assemblies can be provided compared to the prior art.