Front-Side Imager Having a Reduced Dark Current on a SOI Substrate

Abstract

A front-side image sensor may include a substrate in a semiconductor material and an active layer in the semiconductor material. The front side image sensor may also include an array of photodiodes formed in the active layer and an insulating layer between the substrate and the active layer.

Claims

1. A front-side image sensor comprising: a substrate comprising a semiconductor material; an active layer disposed over the substrate; an array of photodiodes in the active layer; and an insulating layer between the substrate and the active layer, the substrate being configured to be biased at a voltage lower than a voltage of the active layer during operation so that an interface between the active layer and the insulating layer responds to the voltage by an accumulation of a positive charge at the interface.

2. The front-side image sensor of claim 1, wherein the insulating layer comprises a silicon oxide layer having a thickness in a range to reflect photons in a visible range.

3. The front-side image sensor of claim 1, further comprising an intermediate layer between the insulating layer and the active layer, the intermediate layer having a same conductivity type as the active layer and having a higher doping level than the active layer.

4. The front-side image sensor of claim 1, wherein the substrate is configured to be biased at a voltage lower than a voltage of the active layer during operation.

5. The front-side image sensor of claim 1, wherein the substrate and the insulating layer define a silicon-on-insulator (SOI) substrate.

6. The front-side image sensor of claim 1, further comprising: a passivation layer disposed over the active layer; an array of colored filters disposed over the passivation layer; and an array of collimating lenses disposed over the array of colored filters.

7. A method of producing a front-side image sensor comprising: forming an active layer over a silicon-on-insulator (SOI) substrate; forming an array of photodiodes in the active layer; forming an array of color filters and collimating lenses over the active layer; and forming a trench isolator extending through the active layer to an insulating layer of the SOI substrate.

8. The method of claim 7, further comprising forming an intermediate layer over the insulating layer, the intermediate layer having a same conductivity type as the active layer and having a doping level higher than the active layer.

9. The method of claim 7, wherein forming the array of photodiodes comprises: forming a buried layer having an opposite doping type than the active layer in the active layer.

10. The method of claim 9, further comprising forming a transfer gate over the active layer, the transfer gate being coupled to the buried layer.

11. The method of claim 7, wherein the SOI substrate comprises a silicon oxide layer having a thickness in a range to reflect photons in a visible range.

12. The method of claim 7, further comprising: forming a passivation layer disposed between the active layer and the array of color filters.

13. The method of claim 12, further comprising: forming metal tracks embedded in the passivation layer.

14. The method of claim 7, further comprising lining the trench isolator with a higher doping level than the active layer.

15. The method of claim 14, wherein the lining has the same doping type as the substrate.

16. A method of operating a front-side image sensor, the method comprising: accumulating positive charge at an interface between an active layer and an insulating layer by applying a potential difference across the insulating layer disposed over a substrate comprising a semiconductor material, wherein the active layer is disposed over the insulating layer, wherein an array of photodiodes is disposed in the active layer, wherein the insulating layer is disposed between the substrate and the active layer.

17. The method of claim 16, further comprising providing an intermediate layer over the insulating layer, the intermediate layer having a same conductivity type as the active layer and having a doping level higher than the active layer.

18. The method of claim 16, wherein the array of photodiodes comprises: a buried layer having an opposite doping type than the active layer in the active layer.

19. The method of claim 18, further comprising providing a transfer gate over the active layer, the transfer gate being coupled to the buried layer.

20. The method of claim 18, further comprising: providing an array of color filters and collimating lenses over the active layer; providing a passivation layer disposed between the active layer and the array of color filters; and providing metal tracks embedded in the passivation layer.

21. The method of claim 18, providing a trench isolator extending to the insulating layer.

22. The method of claim 21, wherein the trench isolator is lined with a higher doping level than the active layer.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0016] FIG. 1 is a schematic cross-section of a pixel of a front-side CMOS image sensor in accordance with the prior art.

[0017] FIG. 2 is a schematic cross-section of an embodiment of a reduced dark current pixel according to the present invention.

[0018] FIG. 3 is a schematic cross-section of another embodiment of a low dark current pixel according to an embodiment of the present invention.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

[0019] The inventor has explored the assumption that an electron source contributing to the dark current in a front-side image sensor could also be the substrate. Indeed, although the substrate is P-doped, i.e. the majority carriers are positive, electrons generally always remain according to the relationship NpNn=ni2, where Np and Nn are the numbers of positive and negative carriers, respectively, and ni is the intrinsic concentration of the semiconductor material at a given temperature. The inventor theorizes, without intending to be bound thereto, that these negative carriers or electrons could under certain conditions migrate from the substrate to the active layer, even if the P-doping level of the active layer is lower than that of the substrate.

[0020] According to this assumption, the contribution of the substrate to the dark current could be reduced or eliminated by electrically isolating the active layer from the substrate. The insulation between the substrate and the active region may be implemented by forming the image sensor on a Silicon On Insulator (SOI) substrate.

[0021] FIG. 2 illustrates a resulting pixel of an image sensor. This pixel may be identical in all respects to that of FIG. 1, except that the substrate is an SOI substrate comprising a bulk region 22-1 in P-type silicon, covered by a silicon oxide layer 22-2.

[0022] The oxide layer 22-2 may have a thickness between 10 and 200 nm. By restricting the thickness range to 100-200 nm, this layer then acts as a mirror for photons having a wavelength around the visible spectrum. Incident photons thus reflected to the active layer contribute to charging the photodiode. This results in an increase of the pixel sensitivity.

[0023] FIG. 3 illustrates an alternative embodiment of the pixel of FIG. 2. The layer 22-2 is used as a dielectric of a capacitor. The substrate 22-1 is biased at a voltage V1 lower than the voltage of the active region 10, which is generally grounded. Then the voltage V1 applied is negative. In this case, the interface between the active region 10 and the oxide responds to voltage V1 by the accumulation at the interface of the majority carriers from the active region 10. The voltage induced by the positive charge accumulation at the interface between the active region 10 and the oxide will be designated V2 hereinafter and the voltage differential across the capacitor is thus V2V1.

[0024] The voltage V1 to apply may depend on the thickness of the layer 22-2, so in fact on the value of the capacitor. Typically, the differential V2V1 may range between 0.2 and 0.4 volt for a thickness of 20 nm, and range between 1.5 and 3 volts for a thickness of 150 nm.

[0025] The layer 24 of FIG. 2 and the capacitor configuration of FIG. 3 may be optional. These elements may be used to improve the results obtained through the insulating layer 22-2 alone, without applying the bias voltage V1. The inventor has observed that the insulating layer 22-2 used without these options already significantly reduces the effect of the substrate on the dark current.

[0026] These and other changes can be made to the embodiments in light of the above-detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.