Color filter array substrate, display device and manufacturing method of color filter array substrate

Abstract

The invention discloses a color filter array substrate, a display device, and a manufacturing method of the color filter array substrate. The color filter array substrate comprises a substrate, a thin film transistor array formed on the substrate, and a color filter formed on the thin film transistor array, wherein the color filter array substrate further comprises a black matrix formed on the color filter, and a planarization layer formed on the black matrix. In the invention, position of the black matrix in the color filter array substrate is changed, and the planarization layer is formed on the black matrix, so that the black matrix is isolated from the first and second electrode layers, thus the black matrix is effectively prevented from affecting the electric field between the first and second electrode layers.

Claims

1. A color filter array substrate, comprising a substrate, a thin film transistor array formed on the substrate, and a color filter formed on the thin film transistor array, wherein the color filter array substrate further comprises a black matrix formed on the color filter, and a planarization layer formed on the black matrix, wherein the color filter array substrate further comprises a first electrode layer, a passivation layer and a second electrode layer formed above the planarization layer, and the passivation layer is formed between the first electrode layer and the second electrode layer, wherein the first electrode layer, the passivation layer and the second electrode layer are sequentially formed on the planarization layer, and first electrodes in the first electrode layer are connected to drains of corresponding thin film transistors in the thin film transistor array through via holes which directly pass through both the planarization layer and the color filter, wherein the black matrix is formed on an area of the color filter where the via holes do not pass; wherein a dielectric constant of the planarization layer is between 3.0 and 5.0; and wherein a resistivity of the planarization layer is between 10.sup.12.Math.cm and 10.sup.14.Math.cm.

2. The color filter array substrate according to claim 1, wherein a thickness of the planarization layer is between 2.5 m-3.0 m.

3. The color filter array substrate according to claim 1, wherein a material of the planarization layer is any one or a combination of two or more of polymethyl methacrylate, fluorine-containing polymer, Imide-ring containing polymer, organosilane crosslinked polyethylene and tetramethylsilane polymer.

4. A display device, comprising the color filter array substrate of claim 1.

5. The display device according to claim 4, wherein a thickness of the planarization layer is between 2.5 m-3.0 m.

6. The display device according to claim 4, wherein a material of the planarization layer is any one or a combination of two or more of polymethyl methacrylate, fluorine-containing polymer, Imide-ring containing polymer, organosilane crosslinked polyethylene and tetramethylsilane polymer.

7. A manufacturing method of a color filter array substrate, comprising steps of: providing a substrate and forming a thin film transistor array on the substrate; forming a color filter on the thin film transistor array; forming a black matrix on the color filter; and forming a planarization layer on the black matrix, wherein a dielectric constant of the planarization layer is between 3.0 and 5.0 and a resistivity of the planarization layer is between 10.sup.12.Math.cm and 10.sup.14.Math.cm, wherein the manufacturing method of a color filter array substrate further includes a step of: sequentially forming a first electrode layer, a passivation layer and a second electrode layer on the planarization layer, and wherein after the step of forming a planarization layer on the black matrix, and before the step of sequentially forming a first electrode layer, a passivation layer and a second electrode layer on the planarization layer, the manufacturing method of a color filter array substrate further includes a step of: forming via holes, which directly pass through both the color filter and the planarization layer, through dry etching, so that first electrodes in the first electrode layer to be formed subsequently on the planarization layer are connected to drains of corresponding thin film transistors in the thin film transistor array through the via holes, wherein the black matrix is formed on an area of the color filter where the via holes do not pass.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

(1) The accompanying drawings provide further understanding of the present invention, form part of the description, and are used for explaining the present invention together with the following specific embodiments, rather than limiting the present invention.

(2) FIG. 1 is as schematic diagram of a structure of an existing color filter array substrate;

(3) FIG. 2 is a schematic diagram illustrating a manufacturing process of an existing color filter array substrate;

(4) FIG. 3 is a schematic diagram of actual display effect of an existing color filter array substrate;

(5) FIG. 4 is a schematic diagram of a structure of a color filter array substrate provided by an embodiment of the present invention;

(6) FIG. 5 is a schematic diagram of actual display effect of a color filter array substrate provided by an embodiment of the present invention;

(7) FIG. 6 is a flowchart of a manufacturing method of a color filter array substrate provided by an embodiment of the present invention; and

(8) FIG. 7 is a schematic diagram illustrating a manufacturing process of a color filter array substrate provided by an embodiment of the present invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

(9) Specific embodiments of the present invention are described below in detail in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used for illustrating and explaining the present invention, instead of limiting the present invention.

(10) The present invention first provides a color filter array substrate, the structure of which is as shown in FIG. 4. It should be noted that orientation terms up and down used in the present invention indicate the up and down directions shown in FIG. 4. The color filter array substrate comprises a substrate 1, a TFT array 16 formed on the substrate 1, and a color filter 11 formed on the TFT array 16, wherein the color filter array substrate further comprises a black matrix 15 formed on the color filter 11, and a planarization layer 17 formed on the black matrix 15.

(11) The color filter area substrate further comprises a first electrode layer 12, a passivation layer 13 and a second electrode layer 14 formed above the planarization layer 17, and the passivation layer 13 is formed between the first electrode layer 12 and the second electrode layer 14.

(12) It should be noted that positions of the first electrode layer 12 and the second electrode layer 14 are interchangeable. In FIG. 4, the first electrode layer 12, the passivation layer 13 and the second electrode layer 14 are sequentially formed from bottom to top on the planarization layer 17, and first electrodes in the first electrode layer 12 are connected to drains of corresponding thin film transistors in the TFT array 16 through via holes passing through the planarization layer 17 and the color filter 11. As shown in FIG. 4, the black matrix 15 is formed on an area of the color filter 11 where the via holes do not pass.

(13) The configuration of the color filter array substrate of the present invention is not limited to that shown in FIG. 4. For example, the black matrix may be arranged at a position where a via hole is located, and in this case the first electrodes in the first electrode layer 12 are connected to drains of corresponding thin film transistors in the TFT array 16 through via holes passing through the planarization layer 17, the black matrix 15 and the color filter 11.

(14) The first electrode layer 12 may be a pixel electrode layer including a plurality of pixel electrodes. The second electrode layer 14 may be a common electrode layer including a plurality of common electrodes. The pixel electrodes may be ITO electrodes, and the common electrodes may also be ITO electrodes.

(15) The planarization layer 17 used in the present invention isolates the black matrix 15 from the first electrode layer 12, the passivation layer 13 and the second electrode layer 14, to effectively prevent conductive carbon particles in the black matrix 15 from affecting the electric field between the first electrode layer 12 and the second electrode layer 14.

(16) At present, a display product generally has low-voltage property, and thus can avoid the risk of generating a breakdown current on the planarization layer 17, and reduce induction of the conductive particles in the black matrix 15 by the electric field between the first electrode layer 12 and the second electrode layer 14, thus achieving the purpose of improving display effect.

(17) In addition, an induced electric field can also be formed between a black matrix and gate lines in a fan out area in the prior art, and such an induced electric field will result in obvious white lines on a display screen at start-up, and by forming the planarization layer on the black matrix, the induced electric field can be weakened to a certain extent in the present invention.

(18) FIG. 5 is a schematic diagram of actual display effect of a color filter array substrate provided by an embodiment of the present invention. Compared to FIG. 3, it can be seen that, as the planarization layer 17 isolates the first electrode layer 12 and the second electrode layer 14 from the black matrix 15, the electric field between the first electrode layer 12 and the second electrode layer 14 may not be disturbed by conductive carbon particles in the black matrix 15, which may obviously improve display effect.

(19) In an ADS-type liquid crystal display product, an input voltage between a first electrode layer and a SD (data lines) layer is between 5V and 5V, a coupled electric field between the first electrode layer and the SD layer may result in bad display effect due to cross talk, and the distance between the first electrode layer and the SD layer is generally 5.75 m. Experiments show that for a coupled electric field generated between a distance of about 5 m, adopting a polymer layer with a thickness of about 2.5 m-3.0 m can achieve the effect of reducing the coupled electric field.

(20) As to the present invention, in the structure of the color filter array substrate, in combination with requirements on display, process and other aspects, the distance between the SD layer and the two ITO electrode layers is about 5 m-10 m, and therefore, the thickness of the planarization layer is preferably between 2.5 m-3.0 m, to reduce the coupled electric field between the black matrix and the two ITO electrode layers.

(21) In the present invention, the dielectric constant of the planarization layer is preferably between 3.0-5.0, to achieve a shielding effect and further reduce the coupled electric field.

(22) In the present invention, the resistivity of the planarization layer is preferably between 10.sup.12 .Math.cm-10.sup.14 .Math.cm, so as to achieve a good effect of isolating and then reduce the coupled electric field.

(23) For example, the material of the planarization layer can be any one or as combination of two or more of polymethyl methacrylate, fluorine-containing polymer, Imide-ring containing polymer, organosilane crosslinked polyethylene and tetramethylsilane polymer, and may also be any other material satisfying the requirements on resistivity and dielectric constant. Further, the material of the planarization layer may be planarization material SSP-721 manufactured by Samyang Company.

(24) The present invention also provides a display device, which comprises any of the above color filter array substrates provided by the present invention, an opposite substrate 2 arranged in alignment with the color filter array substrate, and a liquid crystal layer filled therebetween.

(25) The present invention also provides a manufacturing method of a color filter array substrate, and as shown in FIG. 6, the method includes steps of:

(26) S101, providing a substrate and forming a thin film transistor array on the substrate;

(27) S102, forming a color filter on the thin film transistor array;

(28) S103, forming a black matrix on the color filter; and

(29) S104, forming a planarization layer on the black matrix.

(30) Further, the method further includes a step of:

(31) S105, sequentially forming a first electrode layer, a passivation layer and a second electrode layer on the planarization layer. In this case, positions of the first electrode layer and the second electrode layer are interchangeable, and the passivation layer is located between the first electrode layer and the second electrode layer. In general, the first electrode layer is a pixel electrode layer, and the second electrode layer is a common electrode layer.

(32) FIG. 7 is a schematic diagram illustrating a manufacturing process of a color filter array substrate provided by an embodiment of the present invention. First, a TFT array 16 is formed on a substrate 1; a color filter 11 is formed on the TFT array 16; a black matrix 15 is formed on the color filter 11; a planarization layer 17 is formed on the black matrix 15; and then, a first electrode layer 12, a passivation layer 13 and a second electrode layer 14 are sequentially formed on the planarization layer 17.

(33) In the manufacturing method of the color filter array substrate of the present invention, the forming sequence of the black matrix 15 is changed, specifically, the black matrix 15 is formed on the color filter 11, and then the planarization layer 17 is formed on the black matrix 15 to isolate the black matrix 15 from the first electrode layer 12, the passivation layer 13 and the second electrode layer 14. Through isolating the black matrix 15 from the first electrode layer 12, the passivation layer 13 and the second electrode layer 14, cross talk between the black matrix 15 and the planar electric field between the first electrode layer 12 and the second electrode layer 14 (generally two ITO electrode layers) is prevented, and display effect is improved. Obviously, in the method of the present invention, only sequence of the process steps is adjusted, and no new process step is added.

(34) Preferably, the thickness of the planarization layer 17 is between 2.5 m-3.0 m; and the material of the planarization layer 17 has properties of high resistivity and low dielectric constant, its dielectric constant being preferably between 3.0-5.0, and its resistivity being preferably between 10.sup.12 .Math.cm-10.sup.14 .Math.cm.

(35) Further, the method of the present invention further includes a step of:

(36) forming via, holes passing through the color filter 11 and the planarization layer 17, so that first electrodes in the first electrode layer 12 to be formed in step S105 are connected to drains of corresponding thin film transistors in the TFT array 16 through the via holes. In a condition where the first electrode layer is a pixel electrode layer, pixel electrodes in the pixel electrode layer are connected to the drains of the corresponding thin film transistors through the via holes. In this case, the black matrix 15 is formed on an area of the color filter 11 where the via holes do not pass.

(37) Of course, the black matrix may also be formed at a position on the color filter where the via bole is located, and in this case the manufacturing method of the color filter array substrate of the present invention further includes a step of: forming via holes passing through the color filter, the black matrix and the planarization layer, so that first electrodes in the first electrode layer to be formed in step S105 are connected to drains of corresponding thin film transistors in the TFT array through the via holes.

(38) In the present invention, the via holes may be formed by adopting a dry etching process distinct from a traditional wet etching process. As the color filter, the black matrix and the planarization layer are all polymer films, the via holes may be formed in one step by adopting the dry etching process, thus the problem that the via holes in the respective layers are difficult to be aligned in single layer etching is avoided.

(39) As to parameters of the above dry etching process, O.sub.2 flow may be controlled at 10000 mL/min-20000 mL/min, reaction time may be controlled at 120 s-200 s, and vacuum pressure may be controlled below 10 Pa. For example, the sum of thicknesses of the color filter, the black matrix and the planarization layer is between 3 m-4 m, and corresponding apertures of the via holes are between 5 m-10 m.

(40) It can be understood that the above embodiments are only exemplary embodiments for illustrating the principle of the present invention; however, the present invention is not limited thereto. Various variations and improvements may be made by a person skilled in the art without departing from the spirit and essence of the present invention, and these variations and improvements should also be considered to be within the protection scope of the present invention.