Methods and Systems for Dopant Activation Using Microwave Radiation
20170221713 ยท 2017-08-03
Inventors
- Chun-Hsiung Tsai (Hsinchu County, TW)
- Huai-Tei Yang (Hsinchu, TW)
- Kuo-Feng Yu (Hsinchu, TW)
- Kei-Wei Chen (Tainan, TW)
Cpc classification
H10D62/021
ELECTRICITY
H01L21/02694
ELECTRICITY
H10D30/6211
ELECTRICITY
H01L21/76895
ELECTRICITY
H10D30/797
ELECTRICITY
H01L21/2254
ELECTRICITY
H01L21/324
ELECTRICITY
International classification
H01L21/268
ELECTRICITY
H01L21/768
ELECTRICITY
H01L29/08
ELECTRICITY
H01L21/225
ELECTRICITY
Abstract
A semiconductor structure includes a substrate, a source/drain (S/D) junction, and an S/D contact. The S/D junction is associated with the substrate and includes a trench-defining wall, a semiconductor layer, and a semiconductor material. The trench-defining wall defines a trench. The semiconductor layer is formed over the trench-defining wall, partially fills the trench, substantially covers the trench-defining wall, and includes germanium. The semiconductor material is formed over the semiconductor layer and includes germanium, a percentage composition of which is greater than a percentage composition of the germanium of the semiconductor layer. The S/D contact is formed over the S/D junction.
Claims
1. A source/drain (S/D) junction associated with a substrate comprising: a semiconductor layer that is formed on the substrate and that includes germanium, and a semiconductor material that is formed over the semiconductor layer and that includes germanium, a percentage composition of which is greater than a percentage composition of the germanium of the semiconductor layer.
2. The S/D junction of claim 1, wherein the semiconductor layer comprises an outermost sublayer having a concentration of boron greater than a concentration of boron of an innermost sublayer.
3. The S/D junction of claim 1, wherein the semiconductor material includes a percentage composition of germanium between 50% and 95%.
4. The S/D junction of claim 1, wherein the germanium of the semiconductor material has a crystal defect density of less than about 1E12 atoms/cm.sup.3.
5. A S/D contact associated with the S/D junction of claim 1, wherein the contact resistivity between the S/D contact and the S/D junction is less than about 5E-9 Ohms-cm.sup.2.
6. A semiconductor structure comprising: a source/drain (S/D) junction associated with a substrate and including: a semiconductor layer having a plurality of sub-layers, wherein a concentration of boron of an outermost sub-layer of the plurality of sub-layers is greater than a concentration of boron of an innermost sub-layer of the plurality of sub-layers; and a semiconductor material that is formed over the semiconductor layer; and an S/D contact formed over the S/D junction.
7. A semiconductor structure of claim 6, wherein the semiconductor material includes a percentage composition of germanium between 50% and 95%.
8. The semiconductor structure of claim 7, wherein the semiconductor material includes germanium with a crystal defect density of less than about 1E12 atoms/cm.sup.3.
9. The semiconductor structure of claim 8, wherein the semiconductor layer comprises an innermost sublayer having a concentration of germanimum greater than a concentration of germanium of an outermost sublayer.
10. The semiconductor structure of claim 9, wherein the contact resistivity between the S/D contact and S/D junction is less than about 5E-9 Ohms-cm.sup.2.
11. The semiconductor structure of claim 6, wherein the semiconductor material includes germanium with a crystal defect density of less than about 1E12 atoms/cm.sup.3.
12. The semiconductor structure of claim 6, wherein the contact resistivity between the S/D contact and S/D junction is less than about 5E-9 Ohms-cm.sup.2.
13. A method of forming a source/drain junction above a substrate comprising: forming over the substrate a semiconductor layer that includes germanium, and forming over the semiconductor layer a semiconductor material that includes germanium, a percentage composition of which is greater than a percentage composition of the germanium of the semiconductor layer; and forming an S/D contact over the S/D junction.
14. The method of forming a S/D junction of claim 13, further comprising: forming microwave-absorption material on the S/D junction; applying microwave radiation to the microwave-absorption material; and etchably removing the microwave-absorption material.
15. The method of forming a S/D junction of claim 14, further comprising: doping the semiconductor material with boron such that an upper layer of the semiconductor material has a higher concentration of the boron than a lower layer of the semiconductor material.
16. The method of forming a S/D junction of claim 15, wherein forming the semiconductor layer includes: forming an innermost sublayer having a first percentage composition of germanium; and forming an outermost sublayer having a second percentage composition of germanium, wherein the first percentage composition of germanium, is greater than the second percentage composition of germanium.
17. The method of forming a S/D junction of claim 13, further comprising: doping the semiconductor material with boron such that an upper layer of the semiconductor material has a higher concentration of the boron than a lower layer of the semiconductor material.
18. The method of forming a S/D junction of claim 13, wherein forming the semiconductor layer includes forming an innermost sublayer and an outermost sublayer each comprising a percentage composition of germanium, wherein a percentage composition of germanium of the innermost sublayer is greater than a percentage composition of germanium of the outermost sublayer.
19. The method of forming a S/D junction of claim 13, wherein forming the semiconductor layer includes forming an outermost sublayer and an innermost sublayer each comprising a percentage composition of boron, wherein a percentage composition of boron of the outermost sublayer is greater than a percentage composition of boron of the inner most sublayer.
20. The method of forming an S/D junction of claim 13, wherein forming the semiconductor material includes forming a crystal defect density of the germanium thereof of less than about 1E12 atoms/cm.sup.3.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
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DETAILED DESCRIPTION
[0021] The conventional technology for dopant activation, such as RTA and MSA, often involves high processing temperatures. For example, RTA is usually performed at a temperature higher than 950 C., and MSA at a temperature higher than 1050 C. Such high processing temperatures may not be suitable for some modern semiconductor devices. For example, certain materials (e.g., germanium, tin) used in modern complementary metal-oxide-semiconductor (CMOS) devices have low melting points, which limits the processing temperature for fabricating the devices.
[0022]
[0023] The semiconductor structure 104 which has a small loss tangent may not absorb microwave radiation efficiently. On the other hand, the microwave-absorption material 102 which has a larger loss tangent (e.g., in a range of about 0.01 to about 2) may absorb sufficient microwave radiation and increase an electric field density over the semiconductor structure 104. At the raised electric field density, the loss tangent of the semiconductor structure 104 may increase, and the semiconductor structure 104 may absorb the microwave radiation more efficiently so that the dopants within the semiconductor structure 104 may be activated for fabrication of semiconductor devices.
[0024] For example, the semiconductor structure 104 may include a junction with a number of dopants. The junction including the dopants may be formed on a substrate at an elevated temperature (e.g., in a range of about 300 C. to about 600 C.) by epitaxial growth, for example, through chemical vapor deposition (CVD). In response to the applied microwave radiation, the microwave-absorption material 102 intensifies the electric field density over the semiconductor structure 104. More and more dipoles related to the dopants may be formed in the semiconductor structure 104, and these dipoles may vibrate and/or rotate in response to the applied microwave radiation. The semiconductor structure 104 may absorb more microwave radiation under the increased electric field density. Once the electric field density over the semiconductor structure 104 exceeds a threshold, the dipole formation and the dipole motions (e.g., vibration and/or rotation) may eventually break down the bonds between the dopants and the interstitial sites in the semiconductor structure 104, so that the dopants may be activated. The distance between the microwave-absorption material 102 and the semiconductor structure 104 may be adjusted to improve the dopant activation. For example, the dopants may include phosphorous, phosphorous-based molecules, germanium, helium, boron, boron-based molecules, or a combination thereof.
[0025] In one embodiment, the microwave radiation applied to the microwave-absorption material 102 may have a frequency in the range of about 2 GHz to about 10 GHz. For example, the microwave-absorption material 102 may include boron-doped silicon germanium, silicon phosphide, titanium, nickel, silicon nitride, silicon dioxide, silicon carbide, or a combination thereof. The microwave-absorption material 102 may have a much larger size than the semiconductor structure 104 so that the electric field density may be approximately uniform over the semiconductor structure 104. As an example, the semiconductor structure 104 may include a semiconductor substrate, a semiconductor-on-insulator structure, or a semiconductor thin film structure.
[0026] In another embodiment, to control dopant diffusion, the temperature of the semiconductor structure 104 may be kept within a range of about 500 C. to about 600 C. For example, the microwave radiation may be applied to the microwave-absorption material 102 and the semiconductor structure 104 for a time period within a range of about 40 seconds to about 300 seconds.
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[0034] At 720, a gate electrode, e.g., the gate electrode 1320 of the semiconductor structure of
[0035] At 730, a trench is formed that extends into the fin 1310b and that is defined by a trench-defining wall, e.g., the trench-defining wall 1330 of the semiconductor structure of
[0036] At 740, a semiconductor layer, e.g., the semiconductor layer 1340 of the semiconductor structure of
[0037] In one embodiment, operation 740 includes forming two or more sublayers of the semiconductor layer 1340 such that percentage compositions of germanium gradually increase from an outermost sublayer of the two or more sublayers to an innermost sublayer of the two or more sublayers. In another embodiment, operation 740 includes forming two or more sublayers of the semiconductor layer 1340 such that concentrations of boron gradually decrease from an outermost sublayer of the two or more sublayers to an innermost sublayer of the two or more sublayers.
[0038] At 750, a semiconductor material, e.g., the semiconductor material 1350 of the semiconductor structure of
[0039] At 760, the semiconductor material 1350 is doped with boron such that an upper layer 1360 of the semiconductor material 1350 has a higher concentration of the boron than a lower layer of the semiconductor material 1350. For example, the concentration of the boron of the upper layer 1360 is between about 1E21 atoms/cm.sup.3 and about 5E21 atoms/cm.sup.3. In one embodiment, the boron of the upper layer 1360 has a depth of between about 5 nm and about 15 nm from the surface of the fin 1310b.
[0040] It is noted that at least one of the trench-defining wall 1330, the semiconductor layer 1340, and the semiconductor material 1350 constitute a source/drain (S/D) junction 1370 of the semiconductor structure 104. In one embodiment, the S/D junction 1370 and the gate 1320a define therebetween a distance of between about 1 nm and about 9 nm.
[0041] In some embodiments, the S/D junction 1370 is formed above a substrate, e.g., a bulk substrate or a silicon-on-insulator (SOI) substrate. In other embodiments, the S/D junction 1370 extends from above into a substrate.
[0042] At 770, the dopants, i.e., the germanium and the boron of the semiconductor material 1350, are activated, in a manner that will be described hereinafter.
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[0044] During operation 830, the microwave-absorption material 102 increases absorption of the microwave radiation by the boron of the upper layer 1360 such that the boron of the upper layer 1360 generates heat at a temperature, e.g., higher than 1100 C., whereby the boron of the upper layer 1360 is activated. As a result, a relatively high concentration of the activated boron, i.e., substantially the same as the concentration of the boron of the upper layer 1360 prior to operation 770, is obtained for the upper layer 1360 of the semiconductor material 1350 of the S/D junction 1370 of the semiconductor structure 104 of the present disclosure.
[0045] In addition, during operation 830, i.e., the application of the microwave radiation to the microwave-absorption material 102 and the semiconductor structure 104, crystal defects created from prior operations are reduced and a relatively low crystal defect density is achieved for the activated germanium and the activated boron of the semiconductor material 1350 of the S/D junction 1370 of the semiconductor structure 104 of the present disclosure. In one embodiment, the crystal defect density of the activated germanium of the semiconductor material 1350 of the S/D junction 1370 of the semiconductor structure 104 is less than about 1E12 atoms/cm.sup.3. For example, the crystal defect density of the activated germanium of the semiconductor material 1350 of the S/D junction 1370 of the semiconductor structure 104 is about 1E7 atoms/cm.sup.3. In another embodiment, the crystal defect density of the activated boron of the upper layer 1360 of the semiconductor material 1350 of the S/D junction 1370 of the semiconductor structure 104 is between about 1E5 atoms/cm.sup.3 and about 1E7 atoms/cm.sup.3.
[0046] In some embodiments, the activated germanium of the semiconductor layer 1340 has substantially the same percentage composition, e.g., less than about 50%, as the germanium of the semiconductor layer 1340 prior to operation 770. In other embodiments, the activated germanium of the semiconductor material 1350 has substantially the same percentage composition, e.g., between about 50% and 95%, as the germanium of the semiconductor material 1350 prior to operation 770.
[0047] Moreover, during operation 830, i.e., the application of the microwave radiation to the microwave-absorption material 102 and the semiconductor structure 104, the substrate 1310 is kept at a temperature between about 500 C. and about 600 C. Thus, unlike the conventional technology for dopant activation, e.g., RTA, in which the entire semiconductor structure is heated at a temperature higher than e.g., 950 C., the boron of the upper layer 1360 of the S/D junction 1370 of the semiconductor structure 104 is selectively heated at a higher temperature, whereas the substrate 1310 of the semiconductor structure 104 at a lower temperature. The substrate 1310 thus serves as a heatsink and permits a temperature of the semiconductor structure 104 to ramp down at a faster rate. As a result, the activated boron of the upper layer 1360 of the semiconductor material 1350 of the S/D junction 1370 of the semiconductor structure 104 of the present disclosure has a relatively shallow depth, i.e., substantially the same as the depth of the boron of the upper layer 1360 prior to operation 770. In one embodiment, as shown in
[0048] In an embodiment, after operation 770, i.e., the activation of the dopants, the S/D junction 1370 has a depth of between about 30 nm and about 70 nm. In addition, after operation 770, the semiconductor layer 1340 is maintained at substantially the same thickness, e.g., between about 5 nm and about 15 nm. Moreover, after operation 770, as shown in
[0049] Referring back to
[0050] It is noted that, since the semiconductor material 1350 of the S/D junction 1370 has a high percentage composition of the germanium and since the boron of the upper layer 1360 of the semiconductor material 1350 of the S/D junction 1370 has a shallow depth and a high concentration, the S/D contact 1380 and the S/D junction 1370 of the semiconductor structure 104 of the present disclosure have a relatively low contact resistivity therebetween. In one embodiment, the contact resistivity between the S/D contact 1380 and the S/D junction 1370 of the semiconductor structure 104 is less than about 5E-9 Ohms-cm.sup.2. For example, the contact resistivity between the S/D contact 1380 and the S/D junction 1370 of the semiconductor structure 104 is about 8E-10 Ohms-cm.sup.2.
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[0054] In one embodiment, a lightly-doped S/D (LDD) associated with a substrate of a semiconductor structure is formed. The formation of an LDD includes: doping a region of the semiconductor structure with a plurality of dopants; receiving a microwave-absorption material or forming the microwave-absorption material on the semiconductor structure; adjusting the microwave-absorption material at a distance from the semiconductor structure or adjusting a thickness of the microwave-absorption material; and applying microwave radiation to the microwave-absorption material and the semiconductor structure.
[0055] In an embodiment, a semiconductor structure comprises a substrate, a source/drain (S/D) junction, and an S/D contact. The S/D junction is associated with the substrate and includes a trench-defining wall that defines a trench, a semiconductor layer that is formed over the trench-defining wall, that partially fills the trench, that substantially covers the trench-defining wall, and that includes germanium, and a semiconductor material that is formed over the semiconductor layer and that includes germanium, a percentage composition of which is greater than a percentage composition of the germanium of the semiconductor layer. The S/D contact is formed over the S/D junction.
[0056] In another embodiment, a semiconductor structure comprises a substrate, a source/drain (S/D) junction, and an S/D contact. The S/D junction is associated with the substrate and includes a trench-defining wall, a semiconductor layer that is formed over the trench-defining wall and that has a plurality of sublayers, and a semiconductor material that is formed over the semiconductor layer. A concentration of boron of an outermost sublayer of the sublayers is greater than a concentration of boron of an innermost sublayer of the sublayers. The S/D contact is formed over the S/D junction.
[0057] In another embodiment, a source/drain (S/D) junction comprises a semiconductor layer and a semiconductor material. The semiconductor layer is formed on a substrate and includes germanium. And a semiconductor material that is formed over the semiconductor layer and includes germanium. The percentage composition of the semiconductor material is greater than a percentage composition of the germanium of the semiconductor layer.
[0058] In another embodiment, a semiconductor structure comprising a S/D junction associated with a substrate and a S/D contact. The S/D junction includes a semiconductor layer and a semiconductor material having a plurality of sub-layers. The S/D contact is formed over the S/D junction. The sublayers include a concentration of boron of an outermost sub-layer greater than a concentration of boron of an innermost sub-layer of the plurality of sub-layers. The semiconductor material is over the semiconductor layer.
[0059] In another embodiment, a method comprises providing a semiconductor structure that includes a substrate, forming a source/drain (S/D) junction, and forming an S/D contact over the semiconductor material. Forming the S/D junction includes: forming in the substrate a trench that is defined by a trench-defining wall; forming over the trench-defining wall a semiconductor layer that partially fills the trench, that substantially covers the trench-defining wall, and that includes germanium; and forming over the semiconductor layer a semiconductor material that includes germanium, a percentage composition of which is greater than a percentage composition of the germanium of the semiconductor layer.
[0060] In another embodiment, a method comprises forming a source/drain junction above a substrate, forming over the substrate a semiconductor layer that includes germanium, and forming over the semiconductor layer a semiconductor material that includes germanium, and forming an S/D contact over the S/D junction. The percentage composition the semiconductor material is greater than a percentage composition of the germanium of the semiconductor layer.
[0061] This written description uses examples to disclose the invention, include the best mode, and also to enable a person skilled in the art to make and use the invention. The patentable scope of the invention may include other examples that occur to those skilled in the art. One skilled in the relevant art will recognize that the various embodiments may be practiced without one or more of the specific details, or with other replacement and/or additional methods, materials, or components. Well-known structures, materials, or operations may not be shown or described in detail to avoid obscuring aspects of various embodiments of the invention. Various embodiments shown in the figures are illustrative example representations and are not necessarily drawn to scale. Particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments. Various additional layers and/or structures may be included and/or described features may be omitted in other embodiments. Various operations may be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the invention. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation. Operations described herein may be performed in a different order, in series or in parallel, than the described embodiment. Various additional operations may be performed and/or described. Operations may be omitted in additional embodiments.
[0062] This written description and the following claims may include terms, such as left, right, top, bottom, over, under, upper, lower, first, second, etc. that are used for descriptive purposes only and are not to be construed as limiting. For example, terms designating relative vertical position may refer to a situation where a device side (or active surface) of a substrate or integrated circuit is the top surface of that substrate; the substrate may actually be in any orientation so that a top side of a substrate may be lower than the bottom side in a standard terrestrial frame of reference and may still fall within the meaning of the term top. The term on as used herein (including in the claims) may not indicate that a first layer on a second layer is directly on and in immediate contact with the second layer unless such is specifically stated; there may be a third layer or other structure between the first layer and the second layer on the first layer. The term under as used herein (including in the claims) may not indicate that a first layer under a second layer is directly under and in immediate contact with the second layer unless such is specifically stated; there may be a third layer or other structure between the first layer and the second layer under the first layer. The embodiments of a device or article described herein can be manufactured, used, or shipped in a number of positions and orientations. Persons skilled in the art will recognize various equivalent combinations and substitutions for various components shown in the figures.