SEMICONDUCTOR DEVICE AND METHOD OF MAKING A SEMICONDUCTOR DEVICE

Abstract

A semiconductor device and a method of making the same is disclosed. The device includes a substrate having an AlGaN layer located on a GaN layer for forming a two dimensional electron gas at an interface between the AlGaN layer and the GaN layer. The device also includes a plurality of contacts. At least one of the contacts includes an ohmic contact portion located on a major surface of the substrate. The ohmic contact portion comprises a first electrically conductive material. The at least one of the contacts also includes a trench extending down into the substrate from the major surface. The trench passes through the AlGaN layer and into the GaN layer. The trench is at least partially filled with a second electrically conductive material. The second electrically conductive material is a different electrically conductive material to the first electrically conductive material.

Claims

1. A semiconductor device comprising: a substrate having an AlGaN layer located on a GaN layer for forming a two dimensional electron gas at an interface between the AlGaN layer and the GaN layer; and a plurality of contacts, wherein at least one of the contacts comprises: an ohmic contact portion located on a major surface of the substrate, wherein the ohmic contact portion comprises a first electrically conductive material; and a trench extending down into the substrate from the major surface, wherein the trench passes through the AlGaN layer and into the GaN layer, wherein the trench is at least partially filled with a second electrically conductive material, and wherein the second electrically conductive material is a different electrically conductive material to the first electrically conductive material.

2. The semiconductor device of claim 1, wherein said at least one of the contacts includes a central part aligned with the trench, wherein the central part is at least partially filled with the second electrically conductive material and wherein the central part is substantially surrounded by the ohmic contact portion when viewed from above the major surface.

3. semiconductor device of claim 1, comprising a single contiguous portion of said second electrically conductive material at least partially filling the central part of the contact and the trench.

4. The semiconductor device of claim 2, wherein said second electrically conductive material comprises a layer that lines at least the trench.

5. The semiconductor device of claim 1, wherein the substrate further includes a GaN cap layer located on the AlGaN layer, and wherein the trench of said at least one of the contacts passes through the GaN cap layer.

6. The semiconductor device of claim 1, wherein the device comprises a High Electron Mobility Transistor (HEMT) comprising a gate contact located between a source contact and a drain contact, and wherein said at least one of the contacts is a drain contact of the HEMT.

7. The semiconductor device of claim 1, wherein the device comprises a Schottky diode and wherein said at least one of the contacts is a cathode of the Schottky diode.

8. The semiconductor device of claim 6, comprising at least one island located between the drain and the gate, wherein each island includes a trench extending down into the substrate from the major surface, wherein the trench passes through the AlGaN layer and into the GaN layer, wherein the trench is at least partially filled with said second electrically conductive material.

9. The semiconductor device of claim 6, wherein the gate of the HEMT or an anode of the Schottky diode contact comprises said second electrically conductive material.

10. The semiconductor device of claim 6, wherein the first electrically conductive material comprises an alloy of Ti/Al and/or wherein the second electrically conductive material comprises Ni, Pd, Pt or TiWN.

11. A method of making a semiconductor device, the method comprising: providing a substrate having an AlGaN layer located on a GaN layer for forming a two dimensional electron gas at an interface between the AlGaN layer and the GaN layer; and forming a plurality of contacts of the device, wherein forming at least one of said contacts comprises: depositing a first electrically conductive material on a major surface of the substrate to form an ohmic contact portion; forming a trench extending down into the substrate from the major surface, wherein the trench passes through the AlGaN layer and into the GaN layer; and at least partially filling the trench with a second electrically conductive material, wherein the second electrically conductive material is a different electrically conductive material to the first electrically conductive material.

12. The method of claim 11, comprising: removing at least part of the first electrically conductive material of the at least one said contact to form an opening in the ohmic contact portion, wherein the opening exposes a part of the major surface; forming the trench in the part of the major surface exposed by the opening in the ohmic contact portion; and at least partially filling the trench and the opening in the ohmic contact portion with said second electrically conductive material.

13. The method of claim 12, wherein the part of the first electrically conductive material of the at least one said contact that is removed to form said opening in the ohmic contact portion comprises a central part of said contact, and wherein after said at least partially filling the trench and the opening in the ohmic contact portion with said second electrically conductive material, the central part is substantially surrounded by the ohmic contact portion when viewed from above the major surface.

14. The method of claim 12, wherein the semiconductor device comprises a High Electron Mobility Transistor (HEMT), the method comprising forming a gate contact of the HEMT located between a source contact and a drain contact of the HEMT.

15. The method of claim 14, further comprising forming at least one island located between the drain contact and the gate contact by: forming one or more trenches extending down into the substrate from the major surface, wherein each trench passes through the AlGaN layer and into the GaN layer; and at least partially filling each trench with said second electrically conductive material.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Embodiments of this disclosure will be described hereinafter, by way of example only, with reference to the accompanying drawings in which like reference signs relate to like elements and in which:

[0034] FIG. 1 shows a semiconductor device according to an embodiment of this disclosure;

[0035] FIG. 2 shows a semiconductor device according to another embodiment of this disclosure;

[0036] FIGS. 3A to 3D show a method of making a semiconductor device incorporating a contact of the kind shown in FIG. 1;

[0037] FIGS. 4A to 4D show a method of making a semiconductor device incorporating a contact of the kind shown in FIG. 2; and

[0038] FIGS. 5A to 5D show a method of making a semiconductor device according to a further embodiment of this disclosure.

DETAILED DESCRIPTION

[0039] Embodiments of this disclosure are described in the following with reference to the accompanying drawings.

[0040] FIG. 1 shows a semiconductor device 10 according to an embodiment of this disclosure.

[0041] The device includes a substrate 2. The substrate 2 may, for instance, be a silicon substrate, although it is also envisaged that the substrate 2 may comprise a ceramic, glass, SiC or sapphire. The substrate 2 has an AlGaN layer 8 located on a GaN layer 6. In use, a two dimensional electron gas or 2DEG forms at an interface between the AlGaN layer and the GaN layer. Conduction of a current within the 2DEG forms the basis of operation of the device 10.

[0042] In this example, a number of buffer layers 4 comprising e.g. GaN and AlGaN may be located between the GaN layer and the underlying part of the substrate 2. These buffer layers 4 may form a super lattice acting as a stress relief region between the GaN layer 6 and the underlying part of the substrate 2.

[0043] In some examples, a GaN cap layer may be located on the AlGaN layer 8 (not shown in the Figures). A dielectric layer 14 may be provided on the AlGaN layer 8 (or on the GaN cap layer, if one is present). This dielectric layer may act as a passivation layer and/or may form a gate dielectric for the device 10 in the case of a MISHEMT. The dielectric layer 14 may, for instance, comprise SiN, SiOx or AlOx.

[0044] The device 10 includes a plurality of contacts, one of which is shown in FIG. 1. The device 10 may be a High Electron Mobility Transistor (HEMT) having a source contact, a drain contact and a gate contact. The gate contact of the HEMT may be a Schottky contact, or alternatively may be an insulated gate (accordingly, the HEMT may be a Metal Insulator Semiconductor High Electron Mobility Transistor (MISHEMT)). The contact 34 shown in FIG. 1 may be a drain contact of the HEMT. In other examples, the device 10 may be a Schottky diode having an anode and a cathode. The contact 34 shown in FIG. 1 may be a cathode of the Schottky diode, the anode of the Schottky diode being formed of a Schottky contact.

[0045] The contact 34 shown in FIG. 1 includes an ohmic contact portion 18. The ohmic contact portion 18 may be located on a major surface of the substrate 2. For instance, the ohmic contact portion 18 may be located on a surface of the AlGaN layer 8 (as is shown in FIG. 1) or may be located on the surface of a GaN cap layer on the AlGaN layer 8, if one is present. The ohmic contact portion 18 may make a good ohmic contact to allow current flowing within the 2DEG at the interface between the AlGaN layer 8 and the GaN layer 6 to enter and/or exit the device 10 through the contact 34.

[0046] The ohmic contact portion 18 comprises a first electrically conductive material that may be located on the major surface of the substrate 2. In some examples, it is envisaged that the contact 34 may be a recessed contact, in which the ohmic contact portion 18 extends through an opening in the AlGaN layer 8, thereby to directly contact the underlying GaN layer 6.

[0047] A layer 22 may be located on the ohmic contact portion 18. The first electrically conductive material of the ohmic contact portion 18 may, for instance, comprise Ti/Al. The layer 22 may, for instance, comprise TiW(N). The layer 22 may function as a diffusion barrier during manufacture of the device 10.

[0048] The contact 34 also includes a trench. The trench may extend down into the substrate 2 of the device 10 from the major surface upon which ohmic contact portion 18 is located (e.g. this may be the surface of the AlGaN layer 8 or the surface of a GaN cap layer, if one is present). In particular, and as shown in the example of FIG. 1, the trench passes through the AlGaN layer 8 (and any GaN cap layer) and into the GaN layer 6. This may allow the material filling the trench (as described below) to make direct contact with the GaN layer 6, for allowing holes located in the GaN layer 6 to pass freely into the contact 34. In the present example, the trench extends only partially into the GaN layer 6, although it is also envisaged that the trench may extend through the GaN layer 6 (e.g. to extend into the layers 4).

[0049] The trench is at least partially filled with a second electrically conductive material 50. The second electrically conductive material 50 may also at least partially fill (or, as shown in FIG. 1, completely fill) a central part of the contact 34 that is substantially surrounded by the ohmic contact portion. As will be described below, the configuration and location of the central part of the contact 34 may allow for convenient manufacture of the device 10. A portion of the second electrically conductive material 50 may be located above the ohmic contact portion 18. For instance, in the example of FIG. 1, a portion of the electrically conductive material 50 extends over an upper surface of the layer 22.

[0050] The trench that extends down into the GaN layer 6 of the device 10 can provide a leakage path for holes in the GaN layer 6 to exit the device 10 through the contact 34, which may lower the on state resistance of the device under dynamic (e.g. switching, pulsed, RF) conditions. This leakage path may short a pn junction formed between the two dimensional electron gas (2DEG) and the GaN layer 6. Moreover, in accordance with embodiments of this disclosure, the second electrically conductive material 50, which at least partially fills the trench, may be chosen so that a pn-junction is not formed at an interface between the second electrically conductive material 50 and the GaN of the GaN layer 6 (e.g. at the sidewalls and/or base of the trench). Such a pn junction may otherwise hinder the connection between the contact 34 and GaN of the GaN layer 6, inhibiting the flow of holes exiting the device 10 through the contact 34. Accordingly, the second electrically conductive material 50 may be chosen so as to lower the on state resistance of the device under dynamic (e.g. switching, pulsed, RF) conditions.

[0051] The second electrically conductive material is a different electrically conductive material to the first electrically conductive material. These materials may be chosen independently, to optimise the performance of the contact 34 of the device 10.

[0052] The first electrically conductive material, which forms the ohmic contact portion 18 may be chosen according to its suitability to make a good ohmic contact to the 2DEG. On the other hand, the second electrically conductive material 50 that at least partially fills the trench may be chosen so that it forms a low resistance contact with the GaN layer 6 (in particular, it may be chosen such that a pn junction may not form at the interface between the second electrically conductive material 50 and the GaN of the GaN layer 6, as noted above).

[0053] A material that makes a good ohmic contact may be suitable for forming the ohmic contact portion, but may not be suitable for use as the second electrically conductive material, as it may form a local n.sup.+ region in the part of the GaN layer 6 that surrounds the trench. This n.sup.+ region may form a reverse biased pn junction with the GaN layer 6 (which is p-type). The pn junction may surround the trench, thereby presenting a barrier to the flow of holes, as noted previously. Similarly, an electrically conductive material that is suitable for forming a low resistance path for holes to enter the contact 34 from the GaN layer 6 through the trench may not be suitable for forming the ohmic contact portion of the device 34.

[0054] As noted above, the first electrically conductive material, which may form the ohmic contact portion 18, may comprise an alloy of Ti/Al. This electrically conductive material is suited to the formation of an ohmic contact. However, were this material to be used to fill the trench of the contact 34, a reverse biased pn junction of the kind described above would form, presenting a barrier to the flow of holes into the contact 34. In accordance with an embodiment of this disclosure, the second electrically conductive material 50 may comprise Ni, Pd, Pt or TiW(N).

[0055] FIG. 2 shows a semiconductor device 10 according to another embodiment of this disclosure. The device in FIG. 2 is similar in some respects to the device 10 shown in FIG. 1, and only the differences will be described in detail here.

[0056] As shown in FIG. 2, the contact 34 includes a trench that is at least partially filled with a second electrically conductive material. In this example, the second electrically conductive material 86 is provided in the form of a layer 86 that lines the trench. As shown in FIG. 2, the layer 86 may also line sidewalls of an opening in the central part of the ohmic contact portion 18. The layer 86 of the second electrically conductive material may, in some examples, form a diffusion barrier elsewhere in the device 10 and/or may form part of a field plate elsewhere in the device 10, as will be explained below in relation to FIG. 4D. In the present embodiment, the second electrically conductive material comprises TiW(N), although as already noted above, other materials, such as Ni, Pd or Pt are envisaged. In this example, a third electrically conductive material 88 may also be provided, for filling the part of the trench and/or central part of the contact 34 that is not filled with the second electrically conductive material. The third electrically conductive material may, for instance, comprise Al.

[0057] The example contact 34 in FIG. 2 may also be a recessed contact as noted above in relation to FIG. 1, in which the ohmic contact portion 18 extends through an opening in the AlGaN 8 layer, thereby to directly contact the underlying GaN layer 6.

[0058] The example in FIG. 2 may also include a dielectric layer 60, the composition and purpose of which will be described below in relation to FIGS. 4A to 4D.

[0059] FIGS. 3A to 3D show a method of making a semiconductor device according to an embodiment of this disclosure. In this example, the device 10 comprises a HEMT having a Schottky gate contact, although it will be appreciated that processes similar to that described here may also be used to form a MISHEMT or Schottky diode. The method of FIGS. 3A to 3D may be used to make a device 10 including at least one contact of the kind shown in, for instance, FIG. 1. In this example, the contact of FIG. 1 forms a drain contact 34 of the device 10 to be manufactured.

[0060] In a first step, as shown in FIG. 3A, the method may include providing a substrate 2. The substrate 2 may be of the kind described above in relation to FIG. 1.

[0061] The substrate 2 may, for instance, be a silicon substrate, although it is also envisaged that the substrate 2 may comprise a ceramic or glass. The substrate 2 has an AlGaN layer 8 located on a GaN layer 6. A number of buffer layers 4 comprising GaN may be located between the GaN layer and the underlying part of the substrate 2. As noted previously, these buffer layers 4 may form a super lattice that matches the lattice of the GaN layer 6 to underlying part of the substrate 2. In some examples, a GaN cap layer may be located on the AlGaN layer 8 (not shown in the Figures). In the present example, isolation regions 12 (e.g. trenches filled with dielectric or implanted regions) are provided for isolating the HEMT from other electrical devices on the substrate 2.

[0062] A dielectric layer 14 may be deposited on a major surface of the substrate, e.g. on a surface of the AlGaN layer 8 or any GaN cap layer that may be provided on the AlGaN layer 8. As noted previously, the dielectric layer 14 may act as a passivation layer. The dielectric layer 14 may comprise, for instance, SiN, SiOx or AlOx.

[0063] Next, openings 16 may be formed in the dielectric layer 14. These openings 16 may allow access to the underlying layers, such as the AlGaN layer 8 for the source and drain contacts of the device. The openings 16 may be formed by etching.

[0064] After formation of the opening 16, a first electrically conductive material may be deposited and patterned to form the ohmic contact portion 18 of a source contact 32 and a drain contact 34 of the device 10. This step may also include depositing and patterning layers 22 on the source contact 32 and drain contact 34, which may act as a diffusion barrier. As noted previously, the first electrically conductive material that forms the ohmic contact portion 18 of the source contact 32 and the drain contact 34 may comprise, for instance, comprise Ti/Al, while the layers 22 of the source contact 32 and the drain contact 34 may, for instance, comprise TiW(N).

[0065] In a next step, shown in FIG. 3B, a masking and etching step (e.g. a dry etch) may be used to etch a trench 36 in the drain contact 34. The trench 36 may be located in a central part of the drain contact 34. The trench 36 may extend through the ohmic contact portion 18 and the layer 22. The trench 36 extends through the AlGaN layer 8 and any GaN cap layer that may be located on the AlGaN layer 8. The trench 36 further extends into the GaN layer 6.

[0066] In a next step shown in FIG. 3C, a further opening 15 may be formed (e.g. by etching) in the dielectric layer 14, to allow a Schottky gate contact of the device 10 to be formed. The opening 15 may be located between the source contact 32 and the drain contact 34 on the major surface of the substrate 2.

[0067] In a next step shown in FIG. 3D, a second electrically conductive material may be deposited and patterned. As noted previously, the second electrically conductive material may, for instance, comprise Ni, Pd, Pt or TiW(N).

[0068] The deposition and patterning of the second electrically conductive material may result in a drain contact 34 that is of the kind described above in relation to FIG. 1. In the present example, the second electrically conductive material is also used to form the Schottky gate electrode 40 of the HEMT of the device 10. In this way, the of process steps required to manufacture the device 10 may be reduced, since separate deposition steps need not be provided for forming the second electrically conductive material 50 of the contact 34 and the Schottky gate electrode 40. Nevertheless, if it is still desired to use a different electrically conductive materials for the Schottky gate electrode 40 and the contact 34, then different deposition step may still be used.

[0069] FIGS. 4A to 4D show a method of making a semiconductor device according to another embodiment of this disclosure. In this example, the device 10 comprises a HEMT having a Schottky gate contact, although it will be appreciated that processes similar to that described here may also be used to form a MISHEMT or Schottky diode. The method of FIGS. 4A to 4D may be used to make a device 10 including at least one contact of the kind shown in, for instance, FIG. 2. In this example, the contact of FIG. 2 forms a drain contact 34 of the device 10 to be manufactured.

[0070] In a first step, as shown in FIG. 4A, the method may include providing a substrate 2. The substrate 2 may be of the kind described above in relation to FIGS. 1 to 3.

[0071] The substrate 2 may, for instance, be a silicon substrate, although it is also envisaged that the substrate 2 may comprise a ceramic or glass. The substrate 2 has an AlGaN layer 8 located on a GaN layer 6. A number of buffer layers 4 comprising GaN may be located between the GaN layer and the underlying part of the substrate 2. As noted previously, these buffer layers 4 may form a super lattice that matches the lattice of the GaN layer 6 to underlying part of the substrate 2. In some examples, a GaN cap layer may be located on the AlGaN layer 8 (not shown in the Figures). In the present example, the substrate 2 includes isolation regions 12 (e.g. trenches filled with dielectric) for isolating the HEMT from other parts of the substrate 2.

[0072] A dielectric layer 14 may be deposited on a major surface of the substrate, e.g. on a surface of the AlGaN layer 8 or any GaN cap layer that may be provided on the AlGaN layer 8. As noted previously, the dielectric layer 14 may act as a passivation layer. The dielectric layer 14 may comprise, for instance, SiN, SiOx or AlOx.

[0073] Next, openings 16 may be formed in the dielectric layer 14. These openings 16 may allow access to the underlying layers, such as the AlGaN layer 8 for the source and drain contacts of the device. The openings 16 may be formed by etching.

[0074] After formation of the opening 16, a first electrically conductive material may be deposited and patterned to form the ohmic contact portions 18 of a source contact 32 and a drain contact 34 of the device 10. This step may also include depositing and patterning layers 22 on the source contact 32 and drain contact 34. As noted previously, the first electrically conductive material that forms the ohmic contact portions 18 of the source contact 32 and the drain contact 34 may comprise, for instance, comprise Ti/Al, while the layers 22 of the source contact 32 and the drain contact 34 may, for instance, comprise TiW(N).

[0075] Next, a further opening 15 may be formed (e.g. by etching) in the dielectric layer 14, to allow a Schottky gate contact of the device 10 to be formed. The opening 15 may be located between the source contact 32 and the drain contact 34 on the major surface of the substrate 2. After the opening 15 is formed, an electrically conductive material may be deposited and patterned to form the Schottky gate contact 40 of the HEMT. The electrically conductive material of the Schottky gate contact 40 may, for instance, comprise Ni.

[0076] Next a dielectric layer 60 may be deposited, e.g. by Plasma Enhanced Chemical Vapour Deposition (PECVD). The layer 60 may, for instance, comprise SiN. The layer 60 may have a thickness of around 100 nm.

[0077] In a next step shown in FIG. 4B, openings 42, 44 may be formed (e.g. by etching) in the layer 60, to obtain access to the underlying source contact 32 and the drain contact 34.

[0078] In a next step shown in FIG. 4C, a masking and etching step (e.g. a dry etch) may be used to etch a trench 38 in the drain contact 34. The trench 38 may be located in a central part of the drain contact 34. The trench 36 may extend through the ohmic contact portion 18 and the layer 22. The trench 36 may further extend through the AlGaN layer 8 and any GaN cap layer that may be located on the AlGaN layer 8. The trench 36 may further extend into the GaN layer 6.

[0079] In a next step, a layer 86 of a second electrically conductive material may be deposited. In this example, the second electrically conductive material comprises TiW(N), although in other examples, the second electrically conductive material may, for instance, comprise Ni, Pd or Pt. The layer 86 of the second electrically conductive material may have a thickness of around 100 nm. The layer 86 of the second electrically conductive material may line the trench 38 and/or sidewalls of the central part of the contact. The layer 86 may also cover an upper surface of the layer 22 of the drain contact 34. The layer 86 may further cover an upper surface of the layer 22 of the source contact 32 and an upper surface of the layer 60.

[0080] Thereafter, a third electrically conductive material 88, such as Al, may be deposited on the layer 86. In some examples, around 1 m of the third electrically conductive material may be deposited on the layer 86. Note that in the present example, the Schottky gate electrode 40 may be of a different material to the second electrically conductive material.

[0081] After the second and third electrically conductive materials have been deposited, they may be patterned to result in the structure shown in FIG. 4D. The second electrically conductive material may thus form a layer 86 that lines the trench in the drain contact 34 and may also form a layer 82 that covers an upper surface of the layer 22 of the source contact 32. A part 19 of the layer 82 may extend above the gate. The layer 82 may itself be covered by a portion 84 of the third electrically conductive material. The part 19 of the layer 82, and the overlying portion 84 may thus faun a source field plate for the device 10. Note that the structure of the drain contact 34 in FIG. 4D is of the kind described above in relation to FIG. 2. Note that the dielectric layer 60 may serve to separate and isolate the part 19 of the layer 82 and the overlying portion 84 from the underlying parts of the device 10, such as the gate contact 40.

[0082] FIGS. 5A to 5D show a method of making a semiconductor device according to a further embodiment of this disclosure. In this example, the device 10 comprises a HEMT having a Schottky gate contact, although it will be appreciated that processes similar to that described here may also be used to form a MISHEMT or Schottky diode. In this example, the contact of the HEMT that includes a trench of the kind described herein is the drain contact.

[0083] In a first step, as shown in FIG. 5A, the method may include providing a substrate 2. The substrate 2 may be of the kind described above in relation to FIGS. 1 to 4.

[0084] The substrate 2 may, for instance, be a silicon substrate, although it is also envisaged that the substrate 2 may comprise a ceramic or glass. The substrate 2 has an AlGaN layer 8 located on a GaN layer 6. A number of buffer layers 4 comprising e.g. GaN and AlGaN may be located between the GaN layer and the underlying part of the substrate 2. As noted previously, these buffer layers 4 may form a super lattice that matches the lattice of the GaN layer 6 to underlying part of the substrate 2. In some examples, a GaN cap layer may be located on the AlGaN layer 8 (not shown in the Figures). In the present example, isolation regions 12 (e.g. trenches filled with dielectric or implanted regions) are provided for isolating the HEMT from other electrical devices on the substrate 2.

[0085] A dielectric layer 14 may be deposited on a major surface of the substrate, e.g. on a surface of the AlGaN layer 8 or any GaN cap layer that may be provided on the AlGaN layer 8. As noted previously, the dielectric layer 14 may act as a passivation layer. The dielectric layer 14 may comprise, for instance, SiN, SiOx or AlOx.

[0086] Next, openings 16 may be formed in the dielectric layer 14. These openings 16 may allow access to the underlying layers, such as the AlGaN layer 8 for the source and drain contacts of the device. The openings 16 may be formed by etching.

[0087] After formation of the openings 16, a first electrically conductive material may be deposited and patterned to form the ohmic contact portions 18 of a source contact 32 and a drain contact 34 of the device 10. This step may also include depositing and patterning layers 22 on the source contact 32 and drain contact 34, as described previously. As also noted previously, the first electrically conductive material that forms the ohmic contact portions 18 of the source contact 32 and the drain contact 34 may comprise, for instance, comprise Ti/Al, while the layers 22 of the source contact 32 and the drain contact 34 may, for instance, comprise TiW(N).

[0088] In a next step shown in FIG. 5B, further openings 15, 17 may be formed (e.g. by etching) in the dielectric layer 14. The opening 15 may, as described in relation to previous embodiments, allow a Schottky gate contact of the device 10 to be formed. The opening 15 may be located between the source contact 32 and the drain contact 34 on the major surface of the substrate 2. One or more openings 17 may allow one of more islands to be formed between the gate contact and the drain contact of the device, as described in more detail below.

[0089] In a next step shown in FIG. 5C, a masking and etching process may be used to form a number of trenches. These trenches may include a trench 54 that extends through the drain contact 34 and into the GaN layer 6 as described above in relation to the preceding embodiments. In the present example, one or more trenches 52 may also be etched through the one or more openings 17 in the dielectric layer 14. The trenches 52 may extend down into the substrate 2 from the major surface thereof in a manner similar to that already described in relation to the trench 54 of the drain contact 34.

[0090] In a next step, a second electrically conductive material may be deposited and patterned, resulting in the device shown in FIG. 5D. In the present example, the second electrically conductive material comprises Ni, although as noted previously, it is envisaged that the second electrically conductive material may comprise, for instance, Pd, Pt or TiW(N).

[0091] As can be seen in FIG. 5D, the second electrically conductive material may at least partially fill the trench 54 of the drain contact 34 (as indicated using reference numeral 58 in FIG. 5D), resulting in a drain contact similar to the contacts described above in relation to the earlier embodiments. In some examples, the second electrically conductive material may be provided in the form of a layer that lines the trench 54 as described above in relation to FIG. 2.

[0092] Another part of the deposited and patterned second electrically conductive material, which is aligned with the opening 15 in the dielectric layer 14, may form a Schottky gate electrode 40 of the device 10.

[0093] A further part of the deposited and patterned second electrically conductive material may at least partially fill each of the one or more trenches 52 described above in relation to FIG. 5C. This may result in the formation of one or more islands 41 located between the gate contact and the drain contact 34, each island including a trench extending down into the substrate 2 from the major surface, with each trench being at least partially filled with the second electrically conductive material. In examples where the second electrically conductive material is provided in the form of a layer as noted above, the layer may also line the trenches 52. The remainder of the trench 54 and/or the trenches 52 may be filled with a third electrically conductive material such as Al.

[0094] As may be seen in FIG. 5D, a part of the second electrically conductive material of each island 41 may extend out of the trenches 52 and above the major surface of the substrate 2 (e.g. it may extend over the surface of the dielectric layer 14). The islands 41 may be electrically connected to the drain contact 32.

[0095] The islands 41 may provide a further route for holes located in the GaN layer 6 to exit the device 10.

[0096] The islands 41 and their associated trenches 52 may, when viewed from above the major surface of the substrate 2 be shaped as dots or stripes. The islands may be arranged in an array. For instance, the array may comprise on or more rows of substantially equally spaced islands.

[0097] In each of the examples described above in relation to FIGS. 3 to 5, it is envisaged that the opening 15 in the dielectric layer may be omitted, allowing a MISHEMT to be formed without necessarily requiring any other significant modification of the manufacturing process.

[0098] Accordingly, there has been described a semiconductor device and a method of making the same. The device includes a substrate having an AlGaN layer located on a GaN layer for forming a two dimensional electron gas at an interface between the AlGaN layer and the GaN layer. The device also includes a plurality of contacts. At least one of the contacts includes an ohmic contact portion located on a major surface of the substrate. The ohmic contact portion comprises a first electrically conductive material. The at least one of the contacts also includes a trench extending down into the substrate from the major surface. The trench passes through the AlGaN layer and into the GaN layer. The trench is at least partially filled with a second electrically conductive material. The second electrically conductive material is a different electrically conductive material to the first electrically conductive material.

[0099] Although particular embodiments of this disclosure have been described, it will be appreciated that many modifications/additions and/or substitutions may be made within the scope of the claims.